Analog Devices AN-410 Application Notes

AN-410

a

ONE TECHNOLOGY WAY • P.O. BOX 9106

Overcoming Converter Nonlinearities with Dither

Preface: This discussion is focused on the AD9042 , a
12-bit, 41 MSPS ADC. The AD9042 is the first commer­cially available converter specifically designed with a
wideband, high SFDR (spurious free dynamic range)
front end.

As communications technologies and services rapidly
expand, demands for digital receivers and transmitters
have grown as well. Whether the designs are focused
on wide band or narrow band solutions, the same
problems remain. Where can data converters be found
that exhibit near perfect dynamic performance? Where
can you find a data converter capable of digitizing a
GSM band for a wide band receiver which requires
better than 95 dB of spurious free dynamic range?
Although not possible today, the day is just around the
corner when wideband data converters will be available
that exhibit 95 dB spurious free dynamic range. How­ever through a technique know as “Dithering,” the
dynamic range of many good data converters, such as
the AD9042, can be greatly expanded to meet the
rigorous demands of today’s and tomorrow’s communi­cations needs.

Types of Distortion

There are two types of distortion that can be character­ized in a data converter. Traditionally, these have been
called static and dynamic. Static linearity has typically
been characterized by determining the transfer function
of the data converter and the results stated through INL
and DNL errors. Dynamic linearity has been character­ized through specifications such as SINAD, SFDR and
various other forms of noise and harmonic distortion.

Traditionally, dynamic linearity has been the limiting
factor when dealing with contemporary data converters.
Until the introduction of such products as the AD9027
and AD9042, dynamic converter performance was
usually far from what would have been expected based
on the number of bits that the converter represented.
Furthermore, harmonic performance degraded rapidly
as the analog input to the converter approached Nyquist
values. These problems rendered many converters

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NORWOOD, MASSACHUSETTS 02062-9106

by Brad Brannon

APPLICATION NOTE

617/329-4700

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useless in many potential applications. New converters
such as the AD9042 take advantage of advanced
architecture and processes to provide excellent ac
linearity through the first Nyquist zone.

90

80

70

60

50

WORST SPUR – dBFS

40

30

1 10010

2 4 20 40

ANALOG INPUT FREQUENCY – MHz

Figure 1. Typical AD9042 SFDR

Although the reasons are complex as to why many
converters fail to perform dynamically, one of the com­mon failures is the lack of the track and hold (or input
comparators) to exhibit adequate slew rate to keep up
with rapidly changing analog inputs. This is a key
reason why many converters fail to perform well beyond
several megahertz of signal bandwidth. Although all
converter designers would like to minimize the effects
that cause increased harmonic distortion as a function of
frequency, it can not always be achieved with the
processes and architectures that are available to them.

When examining the distortion, two components can be
identified. The distortion can be considered as a vector
with a magnitude and phase component. As the fre­quency increases, the magnitude of the distortion
typically increases as previously discussed. In addition,
the phase angle of this distortion will rotate due to the
fixed aperture delay that all converters possess and by
additional poles or zeros present in the analog chain of
the converter.

FREQUENCY 3

ALL FREQUENCIES

FREQUENCY 2

NET 0

3

0

0

% OCCURRENCE

4095

–30 dB CUSP

FULL SCALE CUSP

DNL PLOT

0 4095

2

1

0

–1

–2

4 BAD CODES WITH

DNL OF +0.25

PERFECT DNL

BAD CODE +2 LSBs

PROBABILITY OF CODE OCCURRENCE FOR A SINE INPUT

LSBs ERROR

FREQUENCY 2

FREQUENCY 1

Figure 2.

Static linearity is usually stated in terms of the dc
transfer function. There are many methods that can be
used to capture the transfer function of a given data
converter. Traditional evaluation of this function
includes specifications such as Integral Nonlinearity
(INL) and Differential Nonlinearity (DNL) errors.
However, stating that a converter has an INL error of
3/4 LSB and a DNL of 0.5 LSB is not very descriptive of
the device unless it is to be used as a digitizer in a
sampling application such as a CCD digitizer or samp­ling scope. In communications applications, the static
linearity results reported in a typical data sheet are all
but meaningless. This is not to say that the static
transfer function is unimportant. On the contrary, the
static transfer function of the data converters does
determine dynamic performance, and as such, some
analysis of how the static transfer function behaves
is worth discussion. Additionally, as designers have
focused on improving the characteristics of internal
track-and-holds, SFDR has become limited, not by
analog slew rate but DNL errors in the transfer function.

If the transfer function of the data converter is used to fit
an ideal sinusoidal signal, a spectral analysis can be
performed on the resulting data to determine how these
static characteristic of the device affect SFDR. These
results will show the magnitude and phase of the
harmonic distortion and can easily be swept over
amplitude. Since the static transfer function is not
frequency dependent in high performance converters
like the AD9042, the distortion vector is constant for all
frequencies as shown below, although each harmonic 2
through n has a different set of vectors.

menon is frequently observed as fluctuations in the
SFDR of a converter as the input frequency is swept
through the input bandwidth.

Figure 4.

High performance converters such as the AD9042 have
static transfer functions that do not change as a function
of frequency, and additionally the distortion due to slew
limited effects is typically much better than 80 dB as
shown in Figure 1. This is especially true when the
analog input is away from full scale. Since many
communications applications both wide and narrow
band frequently operate with signals well below full
scale, this is an important region to examine in high
performance converters.

Dynamic Effects of Static Linearity

As stated earlier, INL and DNL reports alone are not
sufficient to characterize a converter’s performance for
communications applications. For example, a converter
may have a worst case DNL of +2 LSB, 1 code from –FS.
Although this is quite a bad error, its effect on a
converter in a receiver application will be minimal since
the converter rarely uses codes near ± full scale.
Conversely, a converter may have a worst DNL error of
+0.25, near midscale. After careful examination, it is
revealed that there is a series of four codes together,
each of them +0.25 LSB. The net effect on the converter
is a transfer function error of +1 LSB at that location, a
rather significant error. As shown in Figure 5, a signal
that never reaches full scale may never hit the bad codes
unless the converter is clipped anyway. Likewise, a
converter with four typical errors in the middle of the
range will be repetitively exercised causing potential
dynamic troubles. Thus a blanket statement about the
INL or DNL of a converter without additional information
(location, frequency, etc.) is almost useless.

Since the distortion is now defined in terms of vectors,
the static and dynamic performance of a data converter
can be summed together. In fact, it is possible for the
terms to exactly cancel out as shown below, causing
such a converter to have better mid-band performance
than at either lower or higher frequency. This pheno-

ALL FREQUENCIES

Figure 3.

Figure 5.

–2–

+DNL: 0.36 AT 3967

+DNL: 0.16 AT 959

–DNL: –0.43 AT 1041

+INL: 0.66 AT 2586

–INL: –0.56 AT 3882

a.

High resolution data converters typically use multistage
techniques to achieve high bit resolution without large
comparator arrays that would be required if traditional
“flash” ADC techniques were employed. The multistage
converter typically provides more economic use of
silicon. However, since it is a multistage device, certain
portions of the circuit are used repetitively as the analog
input sweeps from one end of the converter to the other,
as shown in Figure 6. Although the worst DNL error may
be less than 0.25 LSB, the repetitive nature of the
transfer function can play havoc with low level dynamic
signals. Full-scale SFDR may be 88 dBFS, however 20 dB
below full scale, these repetitive DNL errors may cause
SFDR to fall to 80 dBFS.

The plots above were taken from two different AD9042s.
Although each is quite good, both the INL and DNL
plot pairs above show dramatically different linearity
characteristics. Both clearly show the repetitive nature
of linearity in multistage converters.

Probability

To begin to understand how DNL can possibly affect the
dynamic performance of a data converter, it is necessary
to examine the probability density function (PDF) of a
sinusoidal function stimulating the data converter. The
equation below expresses the probability of any
converter code occurring.

VI−2

(

N

A2

N−1



)







−sin



VI−1−2

(

−1













sin



−1







P(Ithcode)=

1

π

V

is the full-scale range of the converter.

N

is the number of bits in the converter.

I

is the code in question.

A

is the peak amplitude of the input sine wave.

A2

N

N−1





)















Figure 6.

–DNL: –0.22 AT 2784

+INL: 0.41 AT 3230

–INL: –0.44 AT 4082

b.

By using this equation with a full-scale signal, it is
shown that the probability of a full-scale code occurring
is 1 percent for a 12-bit converter. In contrast, the proba­bility of a midscale code occurring is only 0.015 percent,
defining the typical “cusp” associated with the PDF of a
sine wave. This is due to the fact that the slew rate of the
sine function is greatest at midscale and zero at the max/
min. Therefore, on a per sample basis, the likelihood of
sampling the signal at the max/min is greater that at the
zero crossing. In fact, if the PDF array is multiplied by
the DNL error array and integrated, the resultant is the
total error that could be expected for a full-scale sine
wave with the given DNL error.

max code

Error

= P(I)× DNL(I)

total

∫

I=min code

What about the case where the input signal is –30 dB
below full scale? In this case, only just over 3 percent of
the converter codes are exercised. In this example, the
codes at the peak of the sine wave now have a
probability of occurring of 3 percent, and midscale
codes 0.5 percent. As before, if the PDF array for the
reduced amplitude sine is multiplied by the DNL errors
for those same codes and integrated, then the resultant
is the total error that could be expected for the reduced
amplitude signal. If the process is again performed at
a signal at –60 dB below full scale, only 0.1 percent
(4 codes) are exercised. For this case the peak codes
occur about 28 percent, and the middle codes
22 percent. As before, if the PDF array is multiplied by
the DNL error array and integrated, the overall error
would result.

How does this relate to dynamic performance? Assume
for example that all converter codes exhibit perfect DNL
(i.e., 0 error) except for code number 1985 which has a
DNL error of +1.5 LSB. With a full-scale sinusoidal input,

–3–