Analog Devices AN-406 Application Notes
AN-406
PGA
TO
ADC
M
U
X
100nA
20µA
AIN1(+)
AIN1(–)
AIN2(+)
AIN2(–)
THERMISTOR
CJC SENSOR
COLD
JUNCTION
THERMOCOUPLE
AD7710
a
ONE TECHNOLOGY WAY • P.O. BOX 9106
Using the AD771x Family of 24-Bit Sigma-Delta A/D Converters
INTRODUCTION
The AD771x Series is a family of ADCs that are designed
specifically for low frequency, high accuracy industrial
transducer applications. Figure 1 shows a block diagram
of one of these devices. The analog front end, which in
some cases also includes excitation sources for sensors,
accepts low level signals that can be amplified by the
internal programmable gain amplifier before being
applied to a sigma-delta modulator. The pulse stream
appearing at the output of this modulator is applied to a
digital filter which produces a low-pass filtered, high
resolution, serial output.
•
NORWOOD, MASSACHUSETTS 02062-9106
by Eamon Nash
APPLICATION NOTE
617/329-4700
•
Figure 2 shows the AD7710 used in a thermocouple
application. The sensor is connected to AIN1 which
includes a burn-out detector current source. When this
100 nA current source is switched on, the AIN(+) pin will
be driven to saturation if the thermocouple is open
circuit.
While it is possible to use an analog technique to adjust
for the cold junction temperature, it may be simpler to
measure the temperature at the cold junction and
subtract this from the thermocouple reading in the
digital domain. The thermistor in Figure 2 which
measures the cold junction temperature is excited by an
onboard 20 µA current source.
AIN(+)
AIN(–)
PGA
AD771x
∑-∆
MODULATOR
DIGITAL
FILTER
SERIAL
OUTPUT
Figure 1. AD771x Block Diagram
TYPICAL APPLICATIONS
These devices are most often used to measure signals
from thermocouples, resistive bridges and resistance
temperature detectors (RTDs). These sensors, which
output low level signals, generally measure slowly
changing physical properties such as temperature,
pressure or weight. Due to the frequent presence of
common-mode voltages, differential signal measurement is desirable. If the sensor is located remotely,
connection to the ADC is often over a long transmission
line which can be susceptible to electromagnetically
induced interference (EMI).
Figure 2. Thermocouple Interface
The thermocouple is grounded at AIN1(–) in order to
provide a return path for the input leakage currents of
the differential inputs that must flow at all times. If the
voltage coming from the thermocouple has a commonmode voltage component, this short may be replaced by
a resistor to ground. Due to the Johnson noise which
this resistor generates, it should not be any larger than
about 100 kΩ. In applications where the thermocouple is
electrically connected to a chassis whose ground is
referred to the local ground, this connection is
unnecessary.
INPUT FILTERING CONSIDERATIONS
0
–10
–20
–30
–40
–50
0
80kHz
0
–10
–20
–30
–40
–50
0
160kHz
Before looking at some filtering schemes, it is important
to consider the internal filtering capabilities of the
converter itself as well as the nature of the noise that is
being filtered.
0
–10
–20
∑∆ MODULATOR
G = 2
G = 1
MCLK/256
MCLK/512
FREQUENCY DIVIDERMCLK
G = 8..128
G = 4
MCLK/64
MCLK/128
MCLK/512
Figure 3. Input Sampling
As we can see from Figure 3, the sigma-delta modulator
of the AD7710 operates at a frequency of f
(19.5 kHz @ f
= 10 MHz) which is independent of the
CLK IN
CLK IN
/512
gain of the programmable gain amplifier (PGA). The
PGA itself, however, samples the input signal at a rate
which increases as the programmed gain increases,
from 19.5 kHz (MCLK/512) at a gain of 1 up to a
maximum of 156 kHz (MCLK/64) for gains 8 through 128.
At a gain of 8, for example, the input signal is sampled 8
times per modulator cycle. The average of the resulting
samples is stored as a charge on a capacitor. Because
the AIN(+) and AIN(–) inputs are sampled alternately and
not simultaneously and because their samples are
stored on the same capacitor, the input signal is actually
being sampled at twice this rate (e.g., 16 times per
modulator cycle at a gain of 8) which results in an
overall sampling rate of 312 kHz at a gain of 8 (or 39 kHz
at a gain of 1). This averaging causes input signals to be
subjected to a low pass frequency response whose
shape will depend upon the programmed gain. Figure 4
shows these frequency responses for the various
programmed gains. Each response repeats itself at
multiples of the effective sampling rate at that particular
gain.
–30
–40
–50
0
40kHz
a. Gain = 1
b. Gain = 2
c. Gain = 4
0
The frequency response of the digital filter in the output
stage of the converter also repeats itself, but at
multiples of the modulator frequency (19.5 kHz for the
AD7710). Figure 5 shows this frequency response for the
frequency ranges 0 kHz to 40 kHz, 0 kHz to 80 kHz, 0 kHz
to 160 kHz and 0 kHz to 320 kHz. Combining these plots
with those of Figure 4 gives the overall frequency
response of the device, shown in Figure 6.
–2–
–10
–20
–30
–40
–50
0
d. Gain = 8–128
Figure 4. Frequency Response of PGA
320kHz
–50
0
–50
–100
–150
–200
0
40kHz
0
–50
–100
–150
–200
0
80kHz
–100
–150
0
–200
–10
–100
–150
–200
–50
–100
0
a. 0–40 kHz
0
0
b. 0–80 kHz
0
40kHz
a. Gain = 1
80kHz
b. Gain = 2
0
–50
–100
–150
–200
0
160kHz
c. 0–160 kHz
0
–50
–100
–150
–200
0
320kHz
d. 0–320 kHz
Figure 5. Frequency Response of Digital Filter
–150
–200
0
160kHz
c. Gain = 4
0
–50
–100
–150
–200
0
320kHz
d. Gain = 8–128
Figure 6. Overall Frequency Response of ADC
–3–
–50
AIN(+)
AIN(–)
AD771x
AIN(+)
AIN(–)
AD771x
–100
–150
–200
–50
–100
–150
0
38.5kHz
0
a. Gain = 1
39.5kHz
From Figure 6 it is clear that the device performs
significant low-pass filtering on its input signal, the
exact filter function being dependent upon the
programmed gain. In each case the plot repeats itself at
multiples of effective input sampling rate. At a gain of 2,
for example, there is a narrow 0 dB passband at about
78 kHz as shown in Figure 6b. Noise in this frequency
range will cause aliasing. However at all other frequencies (excluding multiples of 78 kHz), the device itself will
supply sufficient filtering to prevent aliasing.
At gains from 8 to 128, the filtering effect is even more
dramatic (Figure 6d). In this case input signals are
attenuated by 60 dB or better up to a frequency of 312 kHz
where there is a narrow 0 dB passband (Figure 7d).
Where external filtering is used, using two R-C networks
is recommended as shown in Figure 8a. This will have
good rejection of both differential noise and commonmode noise. Use of a differential filter as shown in
Figure 8b will result in no rejection of common-mode
noise and a maximum attenuation of –6 dB for
differential mode interference.
–200
77.5kHz
0
–50
–100
–150
–200
155.5kHz
0
–50
–100
–150
–200
312kHz
b. Gain = 2
c. Gain = 4
d. Gain = 8–128
78.5kHz
156.5kHz
313kHz
a. b.
Figure 8. External Passive Filter Schemes
When using external filtering, it is important to
remember the restrictions on the sizes of the passive
components used. This subject is discussed in detail in
the section “Antialias Considerations” in the AD771x
data sheets. Where large RC values are required, either
use active filtering to reduce source impedance or
choose the AD7714 which contains a high impedance
input buffer.
POST-FILTERING
It is also possible to reduce noise by post-filtering the
output data from the device. One simple way of doing
this is to implement a moving average digital filter in the
microcontroller or microprocessor/DSP which reads the
conversion results. For example, a 4-tap moving average
filter would calculate the average of the last four conversions, after each conversion. While this has the advantage
that the output data rate from the moving average filter
is the same as that of the ADC, the step response of the
overall system will be adversely affected.
Figure 7. Detail at 0 dB Passband
–4–
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