Analog Devices AN-398 Application Notes
AN-398
a
ONE TECHNOLOGY WAY • P.O. BOX 9106
Evaluation Boards for Single, Dual, and Quad Operational Amplifiers
INTRODUCTION
This application note describes evaluation boards for
single, dual, and quad operational amplifiers whose pinouts follow industry standard amplifier sockets. These
blank printed circuit boards are available to qualified
OEMs at no charge, and were designed to provide quick
and easy evaluation of precision and medium-speed
(gain-bandwidth products < 10 MHz) operational amplifiers in inverting and noninverting applications. Furthermore, provisions have been made on the boards to
evaluate operational amplifier capacitive loading effects
using inside-the-loop or outside-the-loop capacitive
load compensation techniques.
Figure 1 illustrates the basic circuit configuration for
each of the evaluation boards. Provisions have been
made to the board for optional components in addition
to the required feedback resistors and power supply bypass capacitors. For example, if the application requires
evaluating amplifier inside-the-loop capacitive load
compensation, then R
nal outside-the-loop compensation technique is used, a
jumper is substituted for R
C1
J1
V
IN
R1
J3
J2
R3
and CX can be used. If an exter-
X
, CX is removed completely,
X
C2
R4
R2
C
X
R
X
C3
J4
C
L
•
by Adolfo A. Garcia, Manager
ADSC Applications Engineering
V
R
L
APPLICATION NOTE
NORWOOD, MASSACHUSETTS 02062-9106
and R4 is inserted in series with the amplifier output.
Jumpers and open circuits are used throughout the
evaluation board as necessary to provide most any
circuit configuration. For example, if the application
requires an ac-coupled output voltage, then C3 can be
substituted for J4.
Power Supply Connections
Power supply connections for the evaluation boards are
shown in Figure 2. For optimal low frequency power
OUT
supply filtering, C
electrolytic capacitors. These capacitors should be of
the tantalum type with working voltages greater
than 25 V in ±15 V applications. C
ceramic capacitors and are located in close proximity to
the amplifier’s supply pins for optimal high frequency
filtering. They, too, should exhibit working voltages
greater than or equal to 25 V. For additional filtering,
provisions have been made for the use of resistors in
series with the amplifier power supply leads (R
R
). To avoid input/output voltage headroom issues,
S–
voltage drops due to these resistors should be limited to
less than 0.1 V. If these resistors are not needed, then
0.4” wire jumpers should be used.
V+
GND
V–
and CP2 should be 10 µF (or larger)
P1
R
S+ PIN 7 (SINGLE)
C
C
P1
10µF
C
10µF
R
S–
P3
0.1µF
C
P4
P2
0.1µF
•
and CP4 are 0.1 µ F
P3
PIN 8 (DUAL)
PIN 4 (QUAD)
PIN 4 (SINGLE, DUAL)
PIN 11 (QUAD)
617/329-4700
and
S+
Figure 1. Complete Circuit Schematic and Connections
for the Operational Amplifier Evaluation Board
Figure 2. Power Supply Connections and Bypassing Components for the Operational Amplifier Evaluation Board
Noninverting and Inverting Amplifier Configurations
Configuring the evaluation board for noninverting
amplifier applications is straightforward and is shown in
Figure 3. In this configuration, jumper J1 connects R1 to
GND, jumper J2 couples the input signal to the
noninverting terminal of the amplifier, C
together, and jumper J3 is substituted for R
is removed al-
X
. R3 can be
X
used as a termination/input bias current compensation
resistor, if required. The circuit‘s signal transfer equation, including the effects of finite amplifier open-loop
gain, is given by Equation 1:
R
2
R
1
Eq. 1
where
V
OUT
=1+
V
IN
A
= Amplifier open-loop gain, in Volts per
OL
R
2
R
1
1+
1
1
1+
A
OL
Volt (V/V);
and
R2, R1
= Amplifier feedback network resistors,
in ohms
C1
J1
V
IN
R1
J2
R3
C2
R2
J3
J4
R
L
V
OUT
Filter capacitors C2 and C1 can be used to tailor the response of the amplifier circuit. For either noninverting
or inverting applications, capacitor C2 works with R2 to
bandlimit the amplifier’s high frequency response and
places a pole in the response at:
2π×
1
R2×C
2
f
=
P
Eq. 3
On the other hand, capacitor C1 works with R1 to introduce a zero in the amplifier response. The location of
this low frequency corner is given by Equation 4:
2π×
1
R1×C
1
f
=
Z
Eq. 4
Note, capacitor C1 should be used only in noninverting
amplifier configurations, for, if it were used in inverting
amplifier applications, it would appear in parallel with
the input capacitance of the operational amplifier and
could cause instability.
In many applications, it is often necessary to evaluate
the total output voltage error of an amplifier configuration due to amplifier input offset voltage, commonmode rejection, input bias and offset currents, and
open-loop gain. Using either the noninverting or the inverting amplifier configuration, the total output voltage
error of an amplifier due to these parameters is given by
Equation 5:
V
OUT
=
1+
1
1
1+
()
A
OL
R
R
2
1
×
Figure 3. Circuit Configurations for Noninverting Amplifier Applications
For inverting amplifier applications, the circuit configuration is shown in Figure 4. The input signal is applied to
R1 through J1; thus, the circuit’s transfer equation is
given by Equation 2:
where A
V
IN
=−
R
R
2
1
1+
A
C2
R2
1
1
1+
()
OL
J2
V
OUT
V
IN
, R2, and R1 have been previously defined.
OL
R1
J1
R3
R
R
2
1
Eq. 2
J3
R
L
V
OUT
Figure 4. Circuit Connections for Inverting Amplifier
Applications
V
V
OS
()
[]
where
CM
+
CMRR
A
= Amplifier open-loop gain, in V/V;
OL
V
= Amplifier input offset voltage, in volts;
OS
V
= Applied input common-mode voltage,
CM
R
2
1+
()
R
1
I
OS
+
I
−
×
R
B
()
2
2
Eq. 5
in volts;
CMRR
= Amplifier common-mode rejection
ratio, in V/V;
I
= Amplifier input bias current, in amperes;
B
I
= Amplifier input offset current, in amperes;
OS
and
R2, R1
= Amplifier feedback network resistors,
in ohms.
In applications where large source/feedback resistors or
amplifiers with large input bias currents are used, then
R3 should be set to the parallel combination of R1 and
R2.
–2–
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