165 MHz, High Performance
Data Sheet
FEATURES
General
Incorporates HDMI v1.4 features, including
3D video support
165 MHz supports all video formats up to 1080p
and UXGA
Supports gamut metadata packet transmission
Integrated CEC buffer/controller
Compatible with DVI v1.0 and HDCP v1.4
Video/audio inputs accept logic levels from 1.8 V to 3.3 V
Digital video
3D video ready
Programmable, 2-way color space converter
Supports RGB, YCbCr, and DDR
Supports ITU-656-based embedded syncs
Automatic input video format timing detection (CEA-861-E)
Digital audio
Supports standard S/PDIF for stereo linear pulse code
modulation (LPCM) or compressed audio up to 192 kHz
High bit rate (HBR) audio
8-channel uncompressed LPCM I
Special features for easy system design
5 V tolerant I
2
C and Hot Plug™ detect (HPD) I/Os,
no extra device needed
No audio master clock needed for supporting S/PDIF
2
and I
S
On-chip MPU with I
2
C master performs HDCP operations
and EDID reading operations
On-chip MPU reports HDMI events through interrupts
and registers
APPLICATIONS
Gaming consoles
PCs
DVD players and recorders
Digital set-top boxes
A/V receivers
2
S audio up to 192 kHz
HDMI Transmitter
ADV7513
FUNCTIONAL BLOCK DIAGRAM
CEC
CEC_CLK
TX0+/TX0–
TX1+/TX1–
TX2+/TX2–
TXC+/TXC–
DDCSDA
DDCSCL
2
S audio.
4:2:2
4:4:4
AND
COLOR
SPACE
LOGIC
HDCP
AND EDID
CEC CONTROL LER/
BUFFER
HDCP KEYS
HDCP
ENCRYPTION
TMDS
OUTPUTS
2
I
C
MASTER
SPDIF
I2S[3:0]
MCLK
LRCLK
SCLK
D[23:0]
VSYNC
HSYNC
DE
CLK
HPD
INT
SDA
SCL
ADV7513
AUDIO
DATA
CAPTURE
VIDEO
DATA
CAPTURE
I
SLAVE
CONVERTER
REGISTERS AND
CONFIGURATION
2
C
MICROCONTROLLER
Figure 1.
GENERAL DESCRIPTION
The ADV7513 is a 165 MHz, High-Definition Multimedia
Interface (HDMI®) transmitter that is ideal for DVD players/
recorders, digital set-top boxes, A/V receivers, gaming consoles,
and PCs.
The digital video interface contains an HDMI v1.4/DVI v1.0compatible transmitter and supports all HDTV formats. The
ADV7513 supports HDMI v1.4-specific features, including 3D
video. The ADV7513 also supports x.v.Color™, high bit rate (HBR)
audio, and the programmable auxiliary video information (AVI)
InfoFrame features. With the inclusion of HDCP, the ADV7513
allows the secure transmission of protected content as specified
by the HDCP v1.4 protocol.
The ADV7513 supports both S/PDIF and 8-channel I
Its high fidelity 8-channel I
or 7.1 surround audio up to 768 kHz. The S/PDIF interface can
carry compressed audio, including Dolby® Digital, DTS®, and
THX®. Fabricated in an advanced CMOS process, the ADV7513
is provided in a 64-lead LQFP surface-mount plastic package
with exposed pad and is specified over the −25°C to +85°C
temperature range.
2
S interface can transmit either stereo
10225-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved.
ADV7513 Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Specifications ............................................................... 3
REVISION HISTORY
11/11—Revision 0: Initial Version
Absolute Maximum Ratings ............................................................5
Explanation of Test Levels ............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions ..............................6
Applications Information .................................................................8
Design Resources ..........................................................................8
Outline Dimensions ..........................................................................9
Ordering Guide .............................................................................9
Rev. 0 | Page 2 of 12
Data Sheet ADV7513
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
Table 1.
Parameter Symbol Temp Test Level1 Min Typ Max Unit
DIGITAL INPUTS
Data Inputs, Video and Audio, CEC_CLK
Input Voltage, High VIH Full VI 1.35 3.5 V
Input Voltage, Low VIL Full VI −0.3 +0.7 V
Input Capacitance 25°C VIII 1.0 1.5 pF
CEC_CLK Frequency2 Full VIII 3 12 100 MHz
CEC_CLK Accuracy Full VIII −2 +2 %
DDC I2C Lines (DDCSDA, DDCSCL)
Input Voltage, High VIH Full IV 1.4 5.5 V
Input Voltage, Low VIL Full IV −0.3 +0.7 V
I2C Lines (SDA, SCL)
Input Voltage, High VIH Full VI 1.4 5.5 V
Input Voltage, Low VIL Full VI −0.3 +0.7 V
CEC Pin
Input Voltage, High VIH Full VI 2.0 5.5 V
Input Voltage, Low VIL Full VI −0.3 +0.8 V
Output Voltage, High VOH Full VI 2.5 3.63 V
Output Voltage, Low VOL Full VI −0.3 +0.6 V
HPD Pin
Input Voltage, High VIH Full VI 1.3 5.5 V
Input Voltage, Low VIL Full VI −0.3 +0.8 V
THERMAL CHARACTERISTICS
Thermal Resistance
Junction-to-Case θJC Full V 20 °C/W
Junction-to-Ambient θJA Full V 43 °C/W
Ambient Temperature Full V −25 +25 +85 °C
DC SPECIFICATIONS
Input Leakage Current IIL 25°C VI −1 +1 μA
POWER SUPPLY
1.8 V Supply Voltage (DVDD, AVDD,
PVDD, BGVDD)
3.3 V Supply Voltage (DVDD_3V) Full IV 3.15 3.3 3.45 V
Power-Down Current 25°C IV 300 μA
Transmitter Total Power3
At 1.8 V Full VI 256 mW
At 3.3 V Full VI 1 mW
AC SPECIFICATIONS
TMDS Output Clock Frequency 25°C IV 20 165 MHz
TMDS Output Clock Duty Cycle 25°C IV 48 52 %
Input Video Clock Frequency Full IV 165 MHz
Input Video Data Setup Time4 t
Input Video Data Hold Time4 t
TMDS Differential Swing 25°C VII 800 1100 1200 mV
Differential Output Timing
Low-to-High Transition Time 25°C VII 75 95 ps
High-to-Low Transition Time 25°C VII 75 95 ps
VSYNC and HSYNC Delay
From DE Falling Edge 25°C IV 1 UI5
To DE Rising Edge 25°C IV 1 UI5
Full IV 1.71 1.8 1.90 V
Full IV 1.8 ns
VSU
Full IV 1.3 ns
VHLD
Rev. 0 | Page 3 of 12
ADV7513 Data Sheet
Parameter Symbol Temp Test Level1 Min Typ Max Unit
AUDIO AC TIMING
SCLK Duty Cycle
N/2 Is an Even Number Full IV 40 50 60 %
N/2 Is an Odd Number Full IV 49 50 51 %
I2S[3:0], S/PDIF Setup Time t
I2S[3:0], S/PDIF Hold Time t
LRCLK Setup Time t
LRCLK Hold Time t
I2C INTERFACE
SCL Clock Frequency Full 400 kHz
SDA Setup Time t
SDA Hold Time t
Setup Time for Start Condition t
Hold Time for Start Condition t
Setup Time for Stop Condition t
1
See the Explanation of Test Levels section.
2
12 MHz crystal oscillator for default register settings.
3
1080p, 24-bit typical random pattern.
4
The video data setup and hold times are measured at 0.9 V. The relationship between the clock and data is programmable in 400 ps steps.
5
UI is the unit interval.
Full IV 2 ns
ASU
Full IV 2 ns
AHLD
Full IV 2 ns
ASU
Full IV 2 ns
AHLD
Full 100 ns
DSU
Full 100 ns
DHO
Full 0.6 μs
STASU
Full 0.6 μs
STAH
Full 0.6 μs
STOSU
Rev. 0 | Page 4 of 12