ANALOG DEVICES ADV7401 Service Manual

10-Bit, Integrated, Multiformat SDTV/HDTV
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Video Decoder and RGB Graphics Digitizer

FEATURES

Four 10-bit ADCs sampling up to 140 MHz
(140 MHz speed grade only) 12 analog input channel mux SCART fast blank support Internal antialias filters NTSC/PAL/SECAM color standards support 525p-/625p-component progressive scan 720p-/1080i-component HDTV support Digitizes R
(140 MHz speed grade only) 24-bit digital input port supports data from DVI/HDMI Rx IC Any-to-any, 3 × 3 color-space conversion matrix Industrial temperature range (−40°C to +85°C) 12-bit 4:4:4/8-bit 4:2:2 DDR pixel output interface Programmable interrupt request output pin VBI data slicer (including teletext)
GB graphics up to 1280 × 1024 @ 75 Hz (SXGA)

APPLICATIONS

LCD/DLP™ rear projection HDTVs PDP HDTVs CRT HDTVs LCD/DLP front projectors LCD TV (HDTV ready) HDTV STBs with PVR Hard-disk-based video recorders Multiformat scan converters DVD recorders with progressive scan input support AVR receiver
support
ADV7401

GENERAL DESCRIPTION

The ADV7401 is a high quality, single chip, multiformat video decoder and graphics digitizer. This multiformat decoder supports the conversion of PAL, NTSC, and SECAM standards in the form of composite or S-video into a digital ITU-R BT.656 format. The ADV7401 also supports the decoding of a component RGB/YPrPb video signal into a digital YCrCb or RGB pixel output stream. The support for component video includes standards such as 525i, 625i, 525p, 625p, 720p, 1080i, 1250i, and many other HD and SMPTE standards. Graphic digitization is also supported by the ADV7401; it is capable of digitizing RGB graphics signals from VGA to SXGA rates and converting them into a digital RGB or YCrCb pixel output stream. SCART and overlay functionality are enabled by the ADV7401’s ability to simultaneously process CVBS and standard definition RGB signals. The mixing of these signals is controlled by the fast blank pin.
The ADV7401 contains two main processing sections. The first
standard definition processor (SDP), which processes all
is the PAL, NTSC, and SECAM signal types. The second is the component processor (CP), which processes YPrPb and RGB component formats, including RGB graphics. For more specific descriptions of the ADV7401 features, see the Detailed Functionality and Detailed Description sections.
Rev. SpA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
ADV7401
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TABLE OF CONTENTS
Functional Block Diagram .............................................................. 3
CP Pixel Data Output Modes ................................................... 13
Electrical Characteristics ................................................................. 4
Video Specifications......................................................................... 6
Timing Characteristics..................................................................... 7
Analog Specifications....................................................................... 8
Absolute Maximum Ratings............................................................ 9
Stress Ratings ................................................................................ 9
Package Thermal Performance................................................... 9
Thermal Specifications ................................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Timing Diagrams............................................................................ 12
Detailed Functionality ................................................................... 13
Analog Front End....................................................................... 13
SDP Pixel Data Output Modes ................................................. 13
Composite and S-Video Processing......................................... 13
Component Video Processing.................................................. 14
RGB Graphics Processing ......................................................... 14
Digital Video Input Port............................................................ 14
General Features......................................................................... 14
Detailed Description...................................................................... 15
Analog Front End....................................................................... 15
Standard Definition Processor (SDP)...................................... 15
Component Processor ............................................................... 15
Pixel Input/Output Formatting .................................................... 17
Recommended External Loop Filter Components.................... 18
Typical C o n necti on D i a g ram ....................................................... 19
Outline Dimensions ....................................................................... 20
Ordering Guide .......................................................................... 20
REVISION HISTORY
9/05—Rev. Sp 0 to Rev. SpA
Deleted EDTV.....................................................................Universal
Added AVR Receiver to Applications Section .............................. 1
Changes to Table 3............................................................................ 7
Changes to Figure 2........................................................................ 10
Changes to Function Descriptions of Pin 37 and Pin 38 .......... 11
Change Pin 70 Type........................................................................ 11
Change to Crystal MHz Unit Value............................................. 13
Added Pixel Input Information to Table 9 and Table 10........... 17
4/05—Revision Sp0: Initial Version
Rev. SpA | Page 2 of 20
ADV7401
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FUNCTIONAL BLOCK DIAGRAM

P29–P22
P19–P12
P9–P2
PIXEL
DATA
HS
VS
FIELD/DE
LLC1
SFL/
8
8
OUTPUT FIFO AND FORMATTER
8
SYNCOUT
INT
VBI DATA RECOVERY
STANDARD
AUTODETECTION
STANDARD DEFINITION PROCESSOR
DETECTION
MACROVISION
CVBS/Y
Y
LUMA
(5H MAX)
2D COMB
LUMA
RESAMPLE
LUMA
FILTER
EXTRACTION
DETECTION
AND
AGC
24
10
AV CODE
INSERTION
OFFSET
CONTROL
GAIN
CONTROL
FINE
CLAMP
DIGITAL
10
10
16
AND
FAST
BLANK
AV CODE
OVERLAY
CONTROL
INSERTION
(4H MAX)
RESAMPLE
FILTER
DEMOD
Y
Cr
Cb
CGMS DATA
COMPONENT PROCESSOR
MACROVISION
ACTIVE PEAK
Cb
Cr
CONTROL
RESAMPLE
SYNC
EXTRACT
SC
F
RECOVERY
Cr
CHROMA
CVBS
Cb
2D COMB
CHROMA
CHROMA
CHROMA
C
10
ADV7401
ANTI-
DATA
PREPROCESSOR
A/DCLAMP
ALIAS
101010
FILTER
12
AIN1
10
COLORSPACE
CONVERSION
AND
FILTERS
DECIMATION
DOWNSAMPLING
10
10
10
SOY
888
XTAL1
XTAL
DIGITAL INPUT
P40–P31
PORT
DVI or HDMI
24
P1–P0
P11–P10
P29–P20
05340-001
A/DCLAMP
A/DCLAMP
A/DCLAMP
ANTI-
ANTI-
ANTI-
ALIAS
FILTER
MUX
INPUT
CVBS
AIN12
S-VIDEO
YPrPb
TO
ALIAS
SCART–
FILTER
(RGB + CVBS)
GRAPHICS RGB
ALIAS
FILTER
FB
SCLK
SERIAL INTERFACE
SDA
SCLK2
CONTROL AND VBI DATA
SDA2
STDI
CLOCK GENERATION
SSPD
SYNC PROCESSING AND
ALSB
DCLK_IN
SOG
VS_IN
DE_IN
HS_IN
Figure. 1.
Rev. SpA | Page 3 of 20
ADV7401
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ELECTRICAL CHARACTERISTICS

@ AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V, nominal input range 1.6 V. Operating temperature range, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
Resolution (each ADC) N 10 Bits Integral Nonlinearity INL BSL at 27 MHz (at a 10-bit level) ±0.6 ±2.5 LSB Integral Nonlinearity INL BSL at 54 MHz (at a 10-bit level) −0.6/+0.7 LSB Integral Nonlinearity INL BSL at 74 MHz (at a 10-bit level) ±1.4 LSB Integral Nonlinearity INL BSL at 110 MHz (at an 8-bit level) Integral Nonlinearity INL BSL at 135 MHz (at an 8-bit level) Differential Nonlinearity DNL At 27 MHz (at a 10-bit level) −0.2/+0.25 −0.99/+2.5 LSB Differential Nonlinearity DNL At 54 MHz (at a 10-bit level) −0.2/+0.25 LSB Differential Nonlinearity DNL At 74 MHz (at a 10-bit level) ±0.9 LSB Differential Nonlinearity DNL At 110 MHz (at an 8-bit level) Differential Nonlinearity DNL At 135 MHz (at an 8-bit level)
DIGITAL INPUTS
Input High Voltage Input Low Voltage Input High Voltage V Input Low Voltage V Input Current I All other input pins −10 +10 μA Input Capacitance
DIGITAL OUTPUTS
Output High Voltage Output Low Voltage High Impedance Leakage Current I All other output pins 10 μA Output Capacitance
POWER REQUIREMENTS
Digital Core Power Supply DVDD 1.65 1.8 2 V Digital I/O Power Supply DVDDIO 3.0 3.3 3.6 V PLL Power Supply PVDD 1.71 1.8 1.89 V Analog Power Supply AVDD 3.15 3.3 3.45 V Digital Core Supply Current IDVDD CVBS input sampling at 54 MHz 105 mA Graphics RGB sampling at 135 MHz 137 mA SCART RGB FB sampling at 54 MHz 106 mA Digital I/O Supply Current IDVDDIO CVBS input sampling at 54 MHz 4 mA Graphics RGB sampling at 135 MHz 19 mA PLL Supply Current IPVDD CVBS input sampling at 54 MHz 11 mA Graphics RGB sampling at 135 MHz 12 mA Analog Supply Current Graphics RGB sampling at 135 MHz 242 mA SCART RGB FB sampling at 54 MHz 269 mA Power-Down Current IPWRDN 2.25 mA Green Mode Power-Down IPWRDNG Sync bypass function 16 mA Power-Up Time TPWRUP 20 ms
1
The min/max specifications are guaranteed over this range.
2
Temperature range T
3
All specifications obtained using programming scripts with the following sequence included: Addr 0x0E - data 0x80, Addr 0x54 - data 0x00, Addr 0x0E - data 0x00.
4
All ADC linearity tests performed at input range of full scale – 12.5%, and at zero scale + 12.5%.
1, , 2 3
4, 5
8
9
10
8
12
12
8
8
14
to T
MIN
: 40°C to +85°C (0°C to 70°C temperature range for ADV7401KSTZ-140).
MAX
6
±0.9 LSB
7
±1.5 LSB
6
7
−0.2/+1.5 LSB
−0.9/+3.0 LSB
V V
C
V V
C
IH
IL
IH
IL
IN
IN
OH
OL
LEAK
OUT
2 V
0.8 V HS_IN, VS_IN low trigger mode 0.7 V HS_IN, VS_IN low trigger mode 0.3 V Pins listed in Note 11 −60 +60 μA
10 pF
I
= 0.4 mA 2.4 V
SOURCE
I
= 3.2 mA 0.4 V
SINK
Pins listed in Note 13 60 μA
20 pF
IAVDD CVBS input sampling at 54 MHz 99 mA
Rev. SpA | Page 4 of 20
Symbol Test Conditions Min Typ Max Unit
ADV7401
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5
Max INL and DNL specifications obtained with part configured for component video input.
6
Specification for ADV7401BSTZ-110 and ADV7401KSTZ-140 only.
7
Specification for ADV7401KSTZ-140 only.
8
Guaranteed by characterization.
9
To obtain specified VIH level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V
on Pin 38 = 1.2 V.
IH
10
To obtain specified VIL level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V
on Pin 38 = 0.4 V.
IL
11
Pins 1, 2, 13, 14, 16, 19, 24, 29, 30, 31, 32, 33, 34, 35, 45, 79, 83, 84, 87, 88, 95, 96, 97, 100.
12
VOH and VOL levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.
13
Pins 3, 13, 14, 19, 24, 29, 30, 31, 32, 33, 34, 45.
14
Analog current measurements for CVBS made with ADC0 powered up only, For RGB, ADC0, ADC1 and ADC2 powered up only, for SCART FB, all ADCs powered up.
Rev. SpA | Page 5 of 20
ADV7401
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VIDEO SPECIFICATIONS

@ AVDD= 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V. Operating temperature range, unless otherwise noted.
Table 2.
Parameter
NONLINEAR SPECIFICATIONS
Differential Phase DP CVBS input, modulated 5 step 0.5 degree Differential Gain DG CVBS input, modulated 5 step 0.5 % Luma Nonlinearity LNL CVBS input, 5 step 0.5 %
NOISE SPECIFICATIONS
SNR Unweighted SNR Unweighted Luma flat field 58 60 dB
Analog Front End Crosstalk
LOCK TIME SPECIFICATIONS
Horizontal Lock Range −5 +5 % Vertical Lock Range 40
FSC Subcarrier Lock Range ±1.3 kHz Color Lock in Time 60 line Sync Depth Range Color Burst Range 5 200 % Vertical Lock Time 2 field Horizontal Lock Time 100 line
CHROMA SPECIFICATIONS
Hue Accuracy HUE 1 degree Color Saturation Accuracy CL_AC 1 % Color AGC Range 5 400 % Chroma Amplitude Error 0.5 % Chroma Phase Error
Chroma Luma Intermodulation
LUMA SPECIFICATIONS
Luma Brightness Accuracy Luma Contrast Accuracy
1
The min/max specifications are guaranteed over this range.
2
Temperature range T
3
Guaranteed by characterization.
4
Nominal sync depth is 300 mV at 100% sync depth range.
1, , 2 3
4
to T
MIN
: 40°C to +85°C (0°C to 70°C temperature range for ADV7401KSTZ-140).
MAX
Symbol Test Conditions Min Typ Max Unit
Luma ramp 54 56
60 dB
70 Hz
20 200 %
0.4 degree
0.2 %
CVBS, 1 V input 1 % CVBS, 1 V input 1 %
dB
Rev. SpA | Page 6 of 20
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