ANALOG DEVICES ADUM6132 Service Manual
Isolated Half-Bridge Gate Driver with
V
Integrated Isolated High-Side Supply
FEATURES
isoPower integrated isolated high-side supply
275 mW isolated dc-to-dc converter
200 mA output sink current, 200 mA output source current
High common-mode transient immunity: >50 kV/μs
Wide-body 16-lead SOIC package
Safety and regulatory approvals (pending)
UL recognition
3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
CSA/IEC 60950-1, 400 V rms
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
= 560 V peak
IORM
APPLICATIONS
MOSFET/IGBT gate drivers
Motor drives
Solar panel inverters
Power supplies
ADuM6132
GENERAL DESCRIPTION
The ADuM61321 is an isolated half-bridge gate driver that
employs the Analog Devices, Inc., iCoupler® technology to
provide an isolated high-side driver with an integrated 275 mW
high-side supply. This supply, provided by an internal isolated
dc-to-dc converter, powers not only the ADuM6132 high-side
output but also any external buffer circuitry that is commonly
used with the ADuM6132. This functionality eliminates the
cost, space, and performance issues associated with external
supply configurations such as a bootstrap circuit.
The architecture of the ADuM6132 isolates the high-side
channel and the high-side power from the control and lowside interface circuitry. Care has been taken to ensure close
matching between the high-side and low-side driver timing
characteristics to reduce the need for a dead time margin.
In comparison to gate drivers that employ high voltage level
translation methodologies, the ADuM6132 offers the benefit
of true, galvanic isolation. The differential voltage between
high-side and low-side channels can be as high as 800 V with
good insulation lifetime (see Tab l e 12).
isoPower® uses high frequency switching elements to transfer
power through its transformer. Special care must be taken
during printed circuit board (PCB) layout to meet emissions
standards. Refer to the AN-0971 Application Note for details on
board layout considerations.
FUNCTIONAL BLOCK DIAGRAM
1
V
DD
2
GND
3
V
DDL
4
V
IA
V
5
IB
V
6
OB
7
DDB
8
GND
1
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; 7,075,329; and other pending patents
Rev. 0
Information furnished by Analog Devices is believed to be acc
responsibility is assumed by Analog Devices for its use, nor for any
rights of third parties that may result from its use. Specifications subj
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
urate and reliable. However, no
infringements of patents or other
ect to change without notice. No
ENCODE
SHIFT
LEVEL-
ISOLATED
DC-TO-DC
CONVERTER
Figure 1.
LEVEL-SHIFT
DECODE AND
ADuM6132
One Technology Way, P
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved.
16
V
ISO
GND
15
ISO
14
GND
A
13
V
DDA
V
12
OA
11
NC
10
NC
GND
9
ISO
07393-001
.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
ADuM6132
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Package Characteristics ............................................................... 4
Regulatory Information ............................................................... 4
Insulation and Safety Related Specifications ............................ 4
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics .............................................................................. 5
Recommended Operating Conditions ...................................... 5
Absolute Maximum Ratings ............................................................ 6
REVISION HISTORY
7/08—Revision 0: Initial Version
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Terminology .................................................................................... 10
Applications Information .............................................................. 11
Typical Application Usage ......................................................... 11
PCB Layout ................................................................................. 11
Thermal Analysis ....................................................................... 12
Undervoltage Lockout ............................................................... 12
Propagation Delay-Related Parameters ................................... 13
Magnetic Field Immunity .......................................................... 13
Insulation Lifetime ..................................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
Rev. 0 | Page 2 of 16
ADuM6132
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground; 4.5 V ≤ VDD = V
specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at T
V
= V
DD
= 5.0 V, V
DDL
= 15 V, V
DDB
DDA
= V
ISO
.
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DC SPECIFICATIONS
Isolated Power Supply
Input Current, Quiescent I
280 mA I
DD(Q)
Input Current, Loaded IDD 350 mA I
Maximum Output Current
Output Voltage V
1
I
22 mA 12.5 V ≤ V
ISO(MAX)
12.5 15 17 V 0 mA ≤ I
ISO
Logic Supply
Input Current I
Output Supplies, Channel A or Channel B
Supply Current, Quiescent I
Supply Current, fIN = 20 kHz I
Supply Current, fIN = 100 kHz I
Supply Current, fIN = 1000 kHz I
1.8 3.0 mA
DDL
2
, I
DDA(Q)
DDA(20)
DDA(100)
DDA(1000)
1.0 2.0 mA
DDB(Q)
, I
1.1 2.1 mA CL = 200 pF
DDB(20)
, I
DDB(100)
, I
DDB(1000)
Logic Inputs, Channel A or Channel B
Input Current IIA, I
Logic High Input Voltage V
Logic Low Input Voltage V
IB
, V
0.7 × V
IAH
IBH
, V
IAL
IBL
Outputs, Channel A or Channel B
Channel A High Level Output Voltage V
Channel B High Level Output Voltage V
Low Level Output Voltages V
or V
3
3
I
Supply
DDB
High Level Output Current, Peak
Low Level Output Current, Peak
Undervoltage Lockout, V
DDA
Positive Going Threshold V
Negative Going Threshold V
Hysteresis V
Undervoltage Lockout, V
DDL
Supply
4
Positive Going Threshold V
Negative Going Threshold V
Hysteresis V
4
V
OAH
V
OBH
0.1 V I
OAL,VOBL
I
, I
200 mA
OAH
OBH
, I
200 mA
OAL
OBL
DDAUV+, VDDBUV+
DDAUV−, VDDBUV−
, V
DDAUVH
DDBUVH
DDLUV+
DDLUV−
DDLUVH
SWITCHING SPECIFICATIONS
Minimum Pulse Width
Maximum Switching Frequency
Propagation Delay
1
PW 50 ns C
1
1
f
1000 kHz CL = 200 pF
IN
t
, t
40 60 100 ns CL = 200 pF
PHL
PLH
Change vs. Temperature 100 ps/°C
Pulse Width Distortion, |t
Channel-to-Channel Matching, Rising or
Falling Matching Edge Polarity
Channel-to-Channel Matching, Rising vs.
Falling Opposite Edge Polarity
PLH
− t
| PWD 10 ns CL = 200 pF
PHL
1
1
tM2 20 ns CL = 200 pF
tM1 20 ns CL = 200 pF
≤ 5.5 V; 12.5 V ≤ V
DDL
≤ 17.0 V; V
DDB
DDA
= V
. All minimum/maximum
ISO
= 0 mA, dc signal inputs
ISO
= I
ISO
ISO(MAX)
ISO
ISO
1.3 2.3 mA CL = 200 pF
4.5 5.5 mA CL = 200 pF
−10 +0.01 +10 µA 0 V ≤ VIA, VIB ≤ 5.5 V
DDL
− 0.1
DDA
− 0.1 V I
DDB
0.3 × V
V I
V
V
DDL
= −1 mA
OAH
= −1 mA
OBH
, I
OAL
OBL
= 1 mA
11.0 11.7 12.3 V
10.0 10.7 11.2 V
1.0 V
3.5 4.2 V
3.1 3.8 V
0.5 V
= 200 pF
L
= 25°C,
A
≤ 17.0 V
≤ 22 mA
Rev. 0 | Page 3 of 16
ADuM6132
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Part-to-Part Matching
Output Rise Time (10% to 90%) tR 15 ns CL = 200 pF
Output Fall Time (10% to 90%) tF 15 ns CL = 200 pF
1
See the section. Terminology
2
I
is supplied by the output of the integrated isolated dc-to-dc power supply. I
DDA
3
Duration less than 1 second. Average output current must conform to the limit shown in the section. Absolute Maximum Ratings
4
Undervoltage lockout (UVLO) holds the outputs in a low state if the corresponding input or output power supply is below the referenced threshold. Hysteresis is built
into the detection threshold to prevent oscillations and noise sensitivity.
PACKAGE CHARACTERISTICS
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Resistance (Input Side to High-Side Output)
Capacitance (Input Side to High-Side Output)1 C
Input Capacitance CI 4.0 pF
Junction-to-Ambient Thermal Resistance θJA 45 °C/W 4-layer PCB
1
The device is considered a two-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM6132 is pending approval by the organizations listed in Tab l e 3.
1
60 ns CL = 200 pF
is supplied by an external power connection to the V
DDB
1
R
1012 Ω
I-O
2.0 pF
I-O
pin. See Figure . 16
DDB
Table 3.
UL (Pending) CSA (Pending) VDE (Pending)
Recognized under UL 1577
component recognition program
Double/reinforced insulation,
3750 V rms isolation voltage
Approved under CSA Component Acceptance
1
Notice #5A
Basic insulation per CSA 60950-1-03 and IEC 60950-1,
800 V rms (1131 V peak) maximum working voltage
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10):2006-12
2
Reinforced insulation, 560 V peak
Reinforced insulation per CSA 60950-1-03 and
IEC 60950-1, 400 V rms maximum working voltage
File E214100 File 205078 File 2471900-4880-0001
1
In accordance with UL 1577, each ADuM6132 is proof-tested by applying an insulation test voltage ≥4500 V rms for 1 second (current leakage detection limit = 10 µA).
2
In accordance with DIN V VDE V 0884-10, each ADuM6132 is proof-tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge detection
limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY RELATED SPECIFICATIONS
Table 4.
Parameter Symbol Value Unit Test Conditions/Comments
Rated Dielectric Insulation Voltage 3750 V rms 1 minute duration
Minimum External Air Gap (Clearance) L(I01) >8.0 mm
Minimum External Tracking (Creepage) L(I02) >8.0 mm
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
Measured from input terminals to output
terminals, shortest distance through air
Measured from input terminals to output
terminals, shortest distance path along body
Rev. 0 | Page 4 of 16
ADuM6132
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
The ADuM6132 is suitable for reinforced electrical isolation only within the safety limit data. Maintenance of the safety data is ensured by
protective circuits. The asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval.
Table 5.
Parameter Test Conditions/Comments Symbol Value Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms I to IV
For Rated Mains Voltage ≤ 300 V rms I to III
For Rated Mains Voltage ≤ 400 V rms I to II
Climatic Classification 40/105/21
Pollution Degree (DIN VDE 0110, Table 1) 2
Maximum Working Insulation Voltage V
Input-to-Output Test Voltage, Method B1
× 1.875 = VPR, 100% production test, tm = 1 sec,
V
IORM
partial discharge <5 pC
Input-to-Output Test Voltage, Method A VPR
After Environmental Tests Subgroup 1 V
After Input and/or Safety Test Subgroup 2
× 1.6 = VPR, tm = 60 sec, partial discharge <5 pC 896 V peak
IORM
× 1.2 = VPR, tm = 60 sec, partial discharge <5 pC 672 V peak
V
IORM
and Subgroup 3
Highest Allowable Overvoltage Transient overvoltage, tTR = 10 sec VTR 6000 V peak
Safety-Limiting Values
Maximum value allowed in the event of a failure
(see Figure 2)
Case Temperature TS 150 °C
Side 1 Current IS1 555 mA
Insulation Resistance at TS V
= 500 V RS >109 Ω
IO
600
RECOMMENDED OPERATING CONDITIONS
560 V peak
IORM
1050 V peak
V
PR
500
400
CURRENT (mA)
DD
300
200
100
SAFE OPERATING V
0
0 50 100 150 200
AMBIENT TEMPERATURE (°C)
Figure 2. Thermal Derating Curve, Dependence of Safety-Limiting Values
with Ambient Temperature per DIN V VDE V 0884-10
Table 6.
Parameter Rating
Operating Temperature Range, TA −40°C to +85°C
Input Supply Voltage, VDD and V
Channel A, Channel B Supply Voltage,
and V
V
DDA
DDB
1
1
4.5 V to 5.5 V
DDL
12.5 V to 17 V
Input Signal Rise and Fall Times 1 ms
Common-Mode Transient Immunity,
−50 kV/µs to +50 kV/µs
Input to Output
Minimum Power-On Slew Rate (P
and V
V
DD
1
07393-002
All voltages are relative to their respective ground.
2
The ADuM6132 power supply may fail to properly initialize if VDD and V
applied too slowly. The power supply slew rate must be faster than specified
over the entire turn-on ramp. Power-on should start from a completely
discharged state.
DDL
2
SLEW
1 V/ms
),
are
DDL
Rev. 0 | Page 5 of 16
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