ANALOG DEVICES ADUM5401 Service Manual

Quad-Channel, 2.5 kV Isolators with

V

Data Sheet

ADuM5401/ADuM5402/ADuM5403/ADuM5404

Integrated DC-to-DC Converter

FEATURES

isoPower integrated, isolated dc-to-dc converter Regulated 3.3 V or 5.0 V output Up to 500 mW output power Quad dc-to-25 Mbps (NRZ) signal isolation channels 16-lead SOIC package with 7.6 mm creepage High temperature operation: 105°C maximum High common-mode transient immunity: >25 kV/μs

GND VIA/V VIB/V VIC/V

Safety and regulatory approvals

UL recognition

2500 V rms for 1 minute per UL 1577

RC

GND

CSA Component Acceptance Notice #5A VDE certificate of conformity (pending)

IEC 60747-5-2 (VDE 0884, Part 2) V

= 560 V peak

IORM

APPLICATIONS

RS-232/RS-422/RS-485 transceivers Industrial field bus isolation Power supply start-up bias and gate drives Isolated sensor interfaces Industrial PLCs

GENERAL DESCRIPTION

The ADuM5401/ADuM5402/ADuM5403/ADuM54041 are quad-channel digital isolators with isoPower®, an integrated, isolated dc-to-dc converter. Based on the Analog Devices, Inc., iCoupler® technology, the dc-to-dc converter provides up to 500 mW of regulated, isolated power at either 5.0 V or 3.3 V from a 5.0 V input supply, or at 3.3 V from a 3.3 V supply at the power levels shown in Table 1. These devices eliminate the need for a separate, isolated dc-to-dc converter in low power, isolated designs. The iCoupler chip scale transformer technology is used to isolate the logic signals and for the power and feedback paths in the dc-to-dc converter. The result is a small form factor, total isolation solution.

The ADuM5401/ADuM5402/ADuM5403/ADuM5404 isolators provide four independent isolation channels in a variety of channel configurations and data rates (see the Ordering Guide for more information).

isoPower uses high frequency switching elements to transfer power through its transformer. Special care must be taken during printed circuit board (PCB) layout to meet emissions standards. See the AN-0971 Application Note for board layout recommendations.

1

Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

Table 1. Power Levels

Input Voltage (V) Output Voltage (V) Output Power (mW)

5.0 5.0 500

5.0 3.3 330

3.3 3.3 200

FUNCTIONAL BLOCK DIAGRAMS

1

V

DD1

2

1

3

OA

4

OB

5

OC

V

6

OD

7

OUT

8

1

OSC

4 CHANNEL iCOUPLER CORE

ADuM5401/ADuM5402/

ADuM5403/ADuM5404

IA

3

ADuM5401

V

IB

4

V

IC

5

V

OD

6

Figure 2. ADuM5401

IA

3

ADuM5402

V

IB

4

V

OC

5

V

OD

6

Figure 3. ADuM5402

IA

3

ADuM5403

V

OB

4

V

OC

5

V

OD

6

Figure 4. ADuM5403

OA

3

ADuM5404

V

OB

4

V

OC

5

V

OD

6

Figure 5. ADuM5404

Figure 1.

RECT

14

13

12

11

14

13

12

11

14

13

12

11

14

13

12

11

OA

V

OB

V

OC

V

ID

OA

V

OB

V

IC

V

ID

OA

V

IB

V

IC

V

ID

IA

V

IB

V

IC

V

ID

REG

16

V

ISO

15

GND

ISO

VOA/V

14

IA

VOB/V

13

IB

VOC/V

12

IC

V

11

ID

10

V

SEL

GND

9

ISO

06577-001

06577-100

06577-101

06577-102

06577-103

ADuM5401/ADuM5402/ADuM5403/ADuM5404 Data Sheet

REVISION HISTORY

6/12—Rev. B to Rev. C

Created Hyperlink for Safety and Regulatory Approvals

Entry in Features Section ................................................................. 1

Updated Outline Dimensions ........................................................ 26

9/11—Rev. A to Rev. B

Changes to Product Title, Features Section, and General

Description Section ........................................................................... 1

Added Table 1; Renumbered Sequentially ..................................... 1

Changes to Specifications Section ................................................... 3

Changes to Table 19 and Table 20 ................................................. 11

Changes to Table 21 ........................................................................ 12

Changes to Table 22 ........................................................................ 13

Changes to Table 23 ........................................................................ 14

Changes to Table 24 and Table 25 ................................................. 15

Changes to Figure 11 to Figure 13 ................................................ 16

Changes to Figure 11, Figure 12 Caption, Figure 14 Caption,

and Figure 16 Caption .................................................................... 16

Added Figure 19 and Figure 20; Renumbered Sequentially ...... 17

Changes to Figure 21 and Figure 22 ............................................. 17

Changes to Terminology Section .................................................. 19

Changes to Applications Information Section ............................ 20

Deleted Increasing Available Power, Figure 15, and Figure 16;

Renumbered Sequentially .............................................................. 20

Changes to PCB Layout Section .................................................... 20

Added Start-Up Behavior Section ................................................. 21

Moved and Changes to EMI Considerations Section ................ 21

Changes to DC Correctness and Magnetic Field Immunity

Section .............................................................................................. 21

Changes to Power Consumption Section and Figure 29 ........... 22

Changes to Power Considerations ................................................ 23

Added Increasing Available Power Section and Table 26 .......... 23

Added Table 27 ................................................................................ 24

Changes to Insulation Lifetime Section ....................................... 24

11/08—Rev. 0 to Rev. A

Changes to Figure 1 and General Description Section ................ 1

Changes to Table 1 ............................................................................ 3

Changes to Table 2 ............................................................................ 5

Changes to Table 4 ............................................................................ 7

Changes to Table 6 and Table 7 ....................................................... 8

Changes to Table 8 and Table 9 ....................................................... 9

Changes to Figure 7 and Table 10 ................................................. 10

Changes to Figure 8 and Table 11 ................................................. 11

Changes to Figure 9 and Table 12 ................................................. 12

Changes to Figure 10 and Table 13 ............................................... 13

Moved Truth Table Section ............................................................ 13

Changes to Applications Information Section and PCB Layout

Section .............................................................................................. 17

Changes to DC Correctness and Magnetic Field Immunity

Section .............................................................................................. 18

Changes to Power Considerations Section .................................. 20

Added Increasing Available Power Section, Table 15,

and Table 16 ..................................................................................... 20

5/08—Revision 0: Initial Version

Rev. C | Page 3 of 28

ADuM5401/ADuM5402/ADuM5403/ADuM5404 Data Sheet

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

ISO

ISO (LINE)

ISO

DD1

ISO (LOAD )

ISO

ISO (RIP)

ISO

ISO (NOISE)

ISO

OSC

PWM

ISO (MAX)

ISO

ISO (MAX)

ISO

DD1

ISO

DD1 (Q)

DD1

ISO

DD1 (MAX)

1 Mbps—A Grade, C Grade

25 Mbps—C Grade

DD1

ISO

ISO (LOAD)

ADuM5401

100

87 mA

PHL

PLH

Pulse Width Distortion

PWD

40 6 ns

|t

PLH

− t

PHL

|

PSK

PSKCD

PSKOD

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY

Typical specifications are at TA = 25°C, V operation range which is 4.5 V ≤ V tested with C

= 15 pF and CMOS signal levels, unless otherwise noted.

L

DD1

Table 2. DC-to-DC Converter Static Specifications

DC-TO-DC CONVERTER SUPPLY

Setpoint V Line Regulation V Load Regulation V Output Ripple V Output Noise V Switching Frequency f PWM Frequency f Output Supply Current I Efficiency at I I

, No V

I

, Full V

Load I

34 % I

Load I

= V

= 5 V. Minimum/maximum specifications apply over the entire recommended

ISO

, V

DD1

SEL

, V

≤ 5.5 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are

SEL

ISO

4.7 5.0 5.4 V I 1 mV/V I

1 5 % I

75 mV p-p 20 MHz bandwidth, CBO = 0.1 µF||10 µ F, I

200 mV p-p CBO = 0.1 µF||10 µ F, I

180 MHz

625 kHz

100 mA V

19 30 mA 290 mA

= 0 mA = 50 mA, V

= 4.5 V to 5.5 V

= 10 mA to 90 mA

> 4.5 V

= 100 mA

= 90 mA

Table 3. DC-to-DC Converter Dynamic Specifications

Parameter Symbol

Unit Test Conditions/Comments Min Typ Max Min Typ Max

SUPPLY CURRENT

Input I

ADuM5401 19 68 mA No V ADuM5402 19 71 mA No V ADuM5403 19 75 mA No V ADuM5404 19 78 mA No V

Available to Load I

load load load load

ADuM5402 100 85 mA ADuM5403 100 83 mA ADuM5404 100 81 mA

Table 4. Switching Specifications

A Grade C Grade

Parameter Symbol

Unit Test Conditions/Comments Min Typ Max Min Typ Max

SWITCHING SPECIFICATIONS

Data Rate 1 25 Mbps Within PWD limit Propagation Delay t

, t

55 100 45 60 ns 50% input to 50% output

Change vs. Temperature 5 ps/°C Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t

50 15 ns Between any two units

Channel Matching

Codirectional1 t

Opposing Directional2 t

1

7Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

2

Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the

isolation barrier.

50 6 ns 50 15 ns

Rev. C | Page 4 of 28

Data Sheet ADuM5401/ADuM5402/ADuM5403/ADuM5404

Table 5. Input and Output Characteristics

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC SPECIFICATIONS

Logic High Input Threshold VIH 0.7 × V Logic Low Input Threshold VIL

Logic High Output Voltages VOH V V Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 μA, VIx = V

0.2 0.4 V IOx = 4 mA, VIx = V Undervoltage Lockout UVLO V

Positive Going Threshold V Negative Going Threshold V Hysteresis V

2.7 V

UV+

2.4 V

UV−

0.3 V

UVH

Input Currents per Channel II −20 +0.01 +20 μA 0 V ≤ VIx ≤ V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient

Immunity

1

|CM| 25 35 kV/μs

Refresh Rate fr 1.0 Mbps

1

|CM | is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.7 × V

low output. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

− 0.3 or V

DD1

− 0.5 or V

DD1

or 0.7 × V

ISO

V

DD1

V

, V

DD1

= V

V

Ix

DDL

DD1

, V

or V

ISO

DDx

DD1

or 0.3 ×

ISO

0.3 × V V

− 0.3 5.0 V IOx = −20 μA, VIx = V

ISO

− 0.5 4.8 V IOx = −4 mA, VIx = V

ISO

transient magnitude = 800 V

or 0.7 × V

DD1

for a high output or VO < 0.3 × V

ISO

DD1

IxH

IxL

supplies

, VCM = 1000 V,

ISO

or 0.3 × V

ISO

for a

Rev. C | Page 5 of 28

ADuM5401/ADuM5402/ADuM5403/ADuM5404 Data Sheet

ISO

ISO (LINE)

ISO

DD1

ISO (LOAD)

ISO

ISO (RIP)

ISO

ISO (NOISE)

ISO

OSC

PWM

ISO (MAX)

ISO

Efficiency at I

ISO (MAX)

33 %

I

ISO

= 60 mA

DD1

ISO

DD1 (Q)

DD1

ISO

DD1 (M AX)

DD1

ISO

ISO (LOAD)

PHL

PLH

PHL

PSK

PSKCD

Opposing Directional2

t

PSKOD

50

15

ns

ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at TA = 25°C, V recommended operation range which is 3.0 V ≤ V specifications are tested with C

= 15 pF and CMOS signal levels, unless otherwise noted.

L

Table 6. DC-to-DC Converter Static Specifications

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint V Line Regulation V Load Regulation V Output Ripple V Output Noise V Switching Frequency f PWM Frequency f Output Supply Current I

I

, No V

Load I

I

, Full V

Load I

Table 7. DC-to-DC Converter Dynamic Specifications

Parameter Symbol

SUPPLY CURRENT

Input I

ADuM5401 14 44 mA No V

ADuM5402 14 46 mA No V

ADuM5403 14 47 mA No V

ADuM5404 14 51 mA No V

Available to Load I

ADuM5401 60 52 mA

ADuM5402 60 51 mA

ADuM5403 60 49 mA

ADuM5404 60 48 mA

= V

DD1

= 3.3 V, V

ISO

, V

DD1

3.0 3.3 3.6 V I 1 mV/V I

1 5 % I

= GND

SEL

, V

≤ 3.6 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching

SEL

ISO

. Minimum/maximum specifications apply over the entire

ISO

= 0 mA = 30 mA, V

= 3.0 V to 3.6 V

= 6 mA to 54 mA

50 mV p-p 20 MHz bandwidth, CBO = 0.1 µF||10 µF, I

130 mV p-p CBO = 0.1 µF||10 µF, I

= 54 mA

180 MHz

625 kHz

60 mA V

> 3 V

14 20 mA

175 mA

1 Mbps—A or C Grade 25 Mbps—C Grade

Unit Test Conditions/Comments Min Typ Max Min Typ Max

load load load load

= 54 mA

Table 8. Switching Specifications

Parameter Symbol

SWITCHING SPECIFICATIONS

Data Rate 1 25 Mbps Within PWD limit Propagation Delay t Pulse Width Distortion PWD 40 6 ns |t

Change vs. Temperature 5 ps/°C Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t Channel Matching

Codirectional1 t

1

7Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

2

Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the

isolation barrier.

A Grade C Grade

Unit Test Conditions/Comments Min Typ Max Min Typ Max

, t

60 100 45 60 ns 50% input to 50% output

− t

|

50 45 ns Between any two units

50 6 ns

Rev. C | Page 6 of 28

Data Sheet ADuM5401/ADuM5402/ADuM5403/ADuM5404

ISO

DD1

ISO

IxH

DD1

ISO

IxH

IxL

DD1

DDL

ISO

Positive Going Threshold

V

UV+

2.7 V

UV−

UVH

DDx

Table 9. Input and Output Characteristics

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC SPECIFICATIONS

Logic High Input Threshold VIH 0.7 × V Logic Low Input Threshold VIL 0.3 × V

Logic High Output Voltages VOH V V Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 µA, VIx = V

0.0 0.4 V IOx = 4 mA, VIx = V Undervoltage Lockout UVLO V

or 0.7 × V

− 0.3 or V

− 0.5 or V

V

or 0.3 ×

ISO

V

− 0.3 3.3 V IOx = −20 µA, VIx = V

− 0.5 3.1 V IOx = −4 mA, VIx = V

, V

supplies

Negative Going Threshold V Hysteresis V

2.4 V

0.3 V

Input Currents per Channel II −10 +0.01 +10 µA 0 V ≤ VIx ≤ V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient

Immunity

1

|CM| 25 35 kV/µs V

= V

Ix

transient magnitude = 800 V

Refresh Rate fr 1.0 Mbps

1

|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.7 × V

low output. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

or 0.7 × V

DD1

for a high output or VO < 0.3 × V

ISO

DD1

or V

ISO

or 0.3 × V

DD1

, VCM = 1000 V,

for a

ISO

Rev. C | Page 7 of 28

ADuM5401/ADuM5402/ADuM5403/ADuM5404 Data Sheet

ISO

ISO (LINE)

ISO

DD1

ISO (LOAD )

ISO

ISO (RIP)

ISO

ISO (NOISE)

ISO

OSC

PWM

ISO (MAX)

ISO

Efficiency at I

ISO (MAX)

30 %

I

ISO

= 90 mA

DD1

ISO

DD1 (Q)

DD1

ISO

DD1 (MAX)

DD1

ISO

ADuM5402

9

45 mA

No V

ISO

load

ISO

ISO (LOAD)

A Grade

C Grade

PHL

PLH

PHL

Change vs. Temperature

5

ps/°C

PSK

PSKCD

Opposing Directional2

t

PSKOD

50

15

ns

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

Typical specifications are at TA = 25°C, V recommended operation range which is 4.5 V ≤ V Switching specifications are tested with C

Table 10. DC-to-DC Converter Static Specifications

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC-TO-DC CONVERTER SUPPLY

Setpoint V Line Regulation V Load Regulation V Output Ripple V Output Noise V Switching Frequency f PWM Frequency f Output Supply Current I

I

, No V

Load I

I

, Full V

Load I

Table 11. DC-to-DC Converter Dynamic Specifications

Parameter Symbol

SUPPLY CURRENT

Input I

ADuM5401 9 44 mA No V

= 5.0 V, V

DD1

= 15 pF and CMOS signal levels, unless otherwise noted.

L

3.0 3.3 3.6 V I 1 mV/V I

1 5 % I

= 3.3 V, V

ISO

≤ 5.5 V, 3.0 V ≤ V

DD1

= GND

SEL

ISO

. Minimum/maximum specifications apply over the entire

ISO

≤ 3.6 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted.

= 0 mA = 50 mA, V

= 3.0 V to 3.6 V

= 6 mA to 54 mA

50 mV p-p 20 MHz bandwidth, CBO = 0.1 µF||10 µF, I

130 mV p-p CBO = 0.1 µF||10 µ F, I

= 90 mA

180 MHz

625 kHz

100 mA V

> 3 V

14 20 mA

230 mA

1 Mbps—A or C Grade 25 Mbps—C Grade

Unit Test Conditions/Comments Min Typ Max Min Typ Max

= 90 mA

load

ADuM5403 9 46 mA No V ADuM5404 9 47 mA No V

Available to Load I

load load

ADuM5401 100 92 mA ADuM5402 100 91 mA ADuM5403 100 89 mA ADuM5404 100 88 mA

Table 12. Switching Specifications

Parameter Symbol

Unit Test Conditions/Comments Min Typ Max Min Typ Max

SWITCHING SPECIFICATIONS

Data Rate 1 25 Mbps Within PWD limit Propagation Delay t Pulse Width Distortion PWD 40 6 ns |t

, t

60 100 45 60 ns 50% input to 50% output

− t

|

Pulse Width PW 1000 40 ns Within PWD limit Propagation Delay Skew t

50 15 ns Between any two units

Channel Matching

Codirectional1 t

1

Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation

barrier.

2

Opposing directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the

isolation barrier.

50 6 ns

Rev. C | Page 8 of 28

Data Sheet ADuM5401/ADuM5402/ADuM5403/ADuM5404

DD1

ISO

DD1

ISO

IxH

ISO

IxL

DD1

DDL

ISO

UV+

UV−

UVH

DDx

Common-Mode Transient

|CM|

25

35 kV/µs

VIx = V

or V

, VCM = 1000 V,

Table 13. Input and Output Characteristics

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC SPECIFICATIONS

Logic High Input Threshold VIH 0.7 × V

V

Logic Low Input Threshold VIL 0.3 × V

Logic High Output Voltages VOH V V

V

Logic Low Output Voltages VOL 0.0 0.1 V IOx = 20 µA, VIx = V

0.0 0.4 V IOx = 4 mA, VIx = V Undervoltage Lockout UVLO V

Positive Going Threshold V Negative Going Threshold V Hysteresis V

2.7 V

2.4 V

0.3 V

Input Currents per Channel II −10 +0.01 +10 µA 0 V ≤ VIx ≤ V

AC SPECIFICATIONS

Output Rise/Fall Time tR/tF 2.5 ns 10% to 90%

Immunity1

Refresh Rate fr 1.0 Mbps

1

|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.7 × V

low output. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

− 0.2, V

− 0.5 or

DD1

− 0.5

or 0.7 ×

ISO

− 0.2 V

V

DD1

V

or 0.3 ×

ISO

V

or V

V IOx = −20 µA, VIx = V

− 0.2 or

V IOx = −4 mA, VIx = V

− 0.2

or 0.7 × V

DD1

V

for a high output or VO < 0.3 × V

ISO

IxH

, V

supplies

DD1

ISO

transient magnitude = 800 V

or 0.3 × V

DD1

ISO

for a

Rev. C | Page 9 of 28

ANALOG DEVICES ADUM5401 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAMS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY

ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY

ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY