ANALOG DEVICES ADuM3220 Service Manual

Isolated 4 A Dual-Channel Gate Driver

FEATURES

4 A peak output current
Precise timing characteristics

60 ns maximum isolator and driver propagation delay
5 ns maximum channel-to-channel matching

High junction temperature operation: 125°C

3.3 V to 5 V input logic

4.5 V to 18 V output drive
UVLO at 2.5 V V

ADuM3220A/ADuM3221A UVLO at 4.1 V V

ADuM3220B/ADuM3221B UVLO at 7.0 V V
Thermal shutdown protection at >150°C
Output shoot-through logic protection on ADuM3220
Default low output
High frequency operation: dc to 1 MHz
CMOS input logic levels
High common-mode transient immunity: >25 kV/μs
Enhanced system-level ESD performance per IEC 61000-4-x
UL 1577 2500 V rms input-to-output withstand voltage

(pending)
Small footprint and low profile

Narrow body, RoHS-compliant, 8-lead SOIC

5 mm × 6 mm × 1.6 mm

APPLICATIONS

Isolated synchronous dc/dc converters
MOSFET/IGBT gate drivers

DD1

DD2

DD2

ADuM3220/ADuM3221

GENERAL DESCRIPTION

The ADuM3220/ADuM32211 are 4 A isolated, dual-channel
gate drivers based on the Analog Devices, Inc., iCoupler®
technology. Combining high speed CMOS and monolithic
transformer technology, these isolation components provide
outstanding performance characteristics superior to the alterna­tives, such as the combination of pulse transformers and gate
drivers.

The ADuM3220/ADuM3221 provide digital isolation in two
independent isolation channels. They have a maximum propaga­tion delay of 60 ns and 5 ns channel-to-channel matching. In
comparison to gate drivers employing high voltage level transla­tion methodologies, the ADuM3220/ADuM3221 offer the
benefit of true, galvanic isolation between the input and each
output, enabling voltage translation across the isolation barrier.
The ADuM3220 has shoot-through protection logic, which
prevents both outputs from being on at the same time, whereas
the ADuM3221 allows both outputs to be on at the same time.
They both offer a default output low characteristic as required
for gate drive applications.

The ADuM3220/ADuM3221 operate with an input supply
voltage ranging from 3.0 V to 5.5 V, providing compatibility
with lower voltage systems. The outputs of the ADuM3220A/
ADuM3221A can be operated at supply voltages from 5 V to
18 V. The outputs of the ADuM3220B/ADuM3221B can be
operated at supply voltages from 8 V to 18 V.

The ADuM3220/ADuM3221 specify the junction temperature
from −40°C to +125°C.

FUNCTIONAL BLOCK DIAGRAMS

ADuM3220

1

V

GND

DD1

V

V

2

IA

3

IB

4

1

ENCODE

ENCODE

DECODE

AND

LEVEL

SHIFT

DECODE

AND

LEVEL

SHIFT

Figure 1. Figure 2.

1

Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,239.

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

8

V

DD2

7

V

OA

6

V

OB

5

GND

2

1

V

DD1

2

V

IA

3

V

IB

4

GND

1

08994-001

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2010–2011 Analog Devices, Inc. All rights reserved.

ENCODE

ENCODE

ADuM3221

DECODE

AND

LEVEL

SHIFT

DECODE

AND

LEVEL

SHIFT

8

V

DD2

7

V

OA

6

V

OB

5

GND

2

08994-102

ADuM3220/ADuM3221

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagrams............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics—5 V Operation................................ 3

Electrical Characteristics—3.3 V Operation............................. 4

Package Characteristics ............................................................... 5

Regulatory Information............................................................... 5

Insulation and Safety-Related Specifications............................ 5

DIN V VDE V 0884-10 (VDE V 0884-10) Insulation

Characteristics .............................................................................. 6

Recommended Operating Conditions ...................................... 6

REVISION HISTORY

3/11—Rev. A to Rev. B

Added ADuM3220BRZ and ADuM3221BRZ models.. Universal
Changes to Features Section and General Description Section . 1

Changes to Table 1............................................................................ 3

Changes to Table 2............................................................................ 4

Changes to Ordering Guide.......................................................... 14

1/11—Rev. 0 to Rev. A

Added ADuM3221 .............................................................Universal

Changes to Features Section and General Description Section . 1

Added Figure 2; Renumbered Sequentially .................................. 1

Changes to Endnote 3, Endnote 4, and Endnote 5, Table 1 ........ 3

Changes to Endnote 3, Endnote 4, and Endnote 5, Table 2 ........ 4

Changes to Table 8............................................................................ 7

Changes to Figure 4, Table 10, and Table 11 ................................. 8

Added Table 12; Renumbered Sequentially .................................. 8

Added Figure 8.................................................................................. 9

Change to Figure 19 and DC Correctness and Magnetic Field

Immunity Section........................................................................... 12

Changes to Ordering Guide.......................................................... 14

4/10—Revision 0: Initial Version



Absolute Maximum Ratings ............................................................7

ESD Caution...................................................................................7

Pin Configuration and Function Descriptions..............................8

Typical Performance Characteristics..............................................9

Applications Information.............................................................. 11

PC Board Layout ........................................................................ 11

Propagation Delay-Related Parameters................................... 11

Thermal Limitations and Switch Load Characteristics......... 11

Output Load Characteristics..................................................... 11

DC Correctness and Magnetic Field Immunity........................... 12

Power Consumption .................................................................. 13

Insulation Lifetime..................................................................... 13

Outline Dimensions....................................................................... 14

Ordering Guide .......................................................................... 14

Rev. B| Page 2 of 16

ADuM3220/ADuM3221

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS—5 V OPERATION

All voltages are relative to their respective ground. 4.5 V ≤ V
maximum specifications apply over T

= −40°C to 125°C. All typical specifications are at TJ = 25°C, V

J

specifications are tested with CMOS signal levels.

Table 1.

Parameter Symbol Min Typ Max Unit Test Conditions/Comments

DC SPECIFICATIONS

Input Supply Current, Two Channels, Quiescent I

Output Supply Current, Two Channels, Quiescent I

Total Supply Current, Two Channels1

DC to 1 MHz

V

Supply Current I

DD1

V

Supply Current I

DD2

Input Currents IIA, IIB −10 +0.01 +10 μA 0 ≤ VIA, VIB ≤ V

Logic High Input Threshold VIH 0.7 × V

Logic Low Input Threshold VIL 0.3 × V

Logic High Output Voltages V

Logic Low Output Voltages V

Undervoltage Lockout, V

Supply

DD2

ADuM3220A/ADuM3221A

Positive-Going Threshold V
Negative-Going Threshold V
Hysteresis V

ADuM3220B/ADuM3221B

Positive-Going Threshold V
Negative-Going Threshold V
Hysteresis V

Output Short-Circuit Pulsed Current2 I

SWITCHING SPECIFICATIONS

Pulse Width3 PW 50 ns CL = 2 nF, V

Data Rate4 1 MHz CL = 2 nF, V

Propagation Delay5 t

t
Propagation Delay Skew6 t
Channel-to-Channel Matching7 t

t
Output Rise/Fall Time (10% to 90%) tR/tF 14 20 25 ns CL = 2 nF, V

t
Dynamic Input Supply Current per Channel I
Dynamic Output Supply Current per Channel I
Refresh Rate fr 1.2 Mbps

1

The supply current values for both channels are combined when running at identical data rates. Output supply current values are specified with no output load

present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 9 and Figure 10 for total V

2

Short-circuit duration less than 1 μs. Average power must conform to the limit shown under the Absolute Maximum Ratings.

3

The minimum pulse width is the shortest pulse width at which the specified timing parameter is guaranteed.

4

The maximum data rate is the fastest data rate at which the specified timing parameter is guaranteed.

5

t

propagation delay is measured from the time of the input rising logic high threshold, VIH, to the output rising 10% threshold of the VOx signal. t

DLH

delay is measured from the input falling logic low threshold, V
delay parameters.

6

t

is the magnitude of the worst-case difference in t

PSK

load within the recommended operating conditions. See Figure 18 for waveforms of propagation delay parameters.

7

Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier.

DD1

and V

supply currents as a function of data rate.

DD2

DLH

1.2 1.5 mA

DDI(Q)

4.7 10 mA

DDO(Q)

1.4 1.7 mA DC to 1 MHz logic signal frequency

DD1(Q)

11 17 mA DC to 1 MHz logic signal frequency

DD2(Q)

, V

OAH

OAH

, V

OAL

OBL

4.1 4.4 V

DD2UV+

3.2 3.7 V

DD2UV−

DD2UVH

7.0 7.5 V

DD2UV+

6.0 6.5 V

DD2UV−

DD2UVH

, I

OA(SC)

OB(SC)

DLH, tDHL

DLH, tDHL

12 ns CL = 2 nF, V

PSK

1 5 ns CL = 2 nF, V

PSKCD

1 7 ns CL = 2 nF, V

PSKCD

14 22 28 ns CL = 2 nF, V

R/tF

0.05 ns V

DDI(D)

1.5 ns V

DDO(D)

, to the output falling 90% threshold of the VOx signal. See Figure 18 for waveforms of propagation

IL

and/or t

DHL

≤ 5.5 V, 4.5 V ≤ V

DD1

V

DD1

V

− 0.1 V

DD2

DD2

0.0 0.15 V IOx = +20 mA, VIx = V

≤ 18 V, unless stated otherwise. All minimum/

DD2

V

DD1

= 5 V, V

DD1

= 10 V. Switching

DD2

DD1

V IOx = −20 mA, VIx = V

IxH

IxL

0.4 V

0.5 V

2.0 4.0 A V

35 45 60 ns CL = 2 nF, V

36 50 68 ns CL = 2 nF, V

that is measured between units at the same operating temperature, supply voltages, and output

DD2

DD2

DD2

= 10 V

= 10 V
= 10 V

= 10 V

DD2

= 10 V

DD2

= 10 V; see Figure 18

DD2

= 4.5 V; see Figure 18

DD2

= 10 V; see Figure 18

DD2

= 10 V; see Figure 18

DD2

= 4.5 V; see Figure 18

DD2

= 10 V; see Figure 18

DD2

= 4.5 V; see Figure 18

DD2

propagation

DHL

Rev. B| Page 3 of 16

ADuM3220/ADuM3221

ELECTRICAL CHARACTERISTICS—3.3 V OPERATION

All voltages are relative to their respective ground. 3.0 V ≤ V
maximum specifications apply over T

= −40°C to 125°C. All typical specifications are at TJ = 25°C, V

J

specifications are tested with CMOS signal levels.

Table 2.

Parameter Symbol Min Typ Max Unit Test Conditions

DC SPECIFICATIONS

Input Supply Current, Two Channels, Quiescent I
Output Supply Current, Two Channels,

Quiescent

Total Supply Current, Two Channels1

DC to 1 MHz

V

Supply Current I

DD1

V

Supply Current I

DD2

Input Currents IIA, IIB −10 +0.01 +10 μA 0 ≤ VIA, VIB ≤ V
Logic High Input Threshold VIH 0.7 × V
Logic Low Input Threshold VIL 0.3 × V
Logic High Output Voltages V
Logic Low Output Voltages V
Undervoltage Lockout, V

Supply

DD2

ADuM3220A/ADuM3221A

Positive-Going Threshold V
Negative-Going Threshold V
Hysteresis V

ADuM3220B/ADuM3221B

Positive-Going Threshold V
Negative-Going Threshold V
Hysteresis V

Output Short-Circuit Pulsed Current2 I

SWITCHING SPECIFICATIONS

Pulse Width3 PW 50 ns CL = 2 nF, V
Data Rate4 1 MHz CL = 2 nF, V
Propagation Delay5 t

t
Propagation Delay Skew6 t
Channel-to-Channel Matching7 t

t
Output Rise/Fall Time (10% to 90%) tR/tF 14 20 25 ns CL = 2 nF, V

t
Dynamic Input Supply Current per Channel I
Dynamic Output Supply Current per Channel I
Refresh Rate fr 1.1 Mbps

1

The supply current values for both channels are combined when running at identical data rates. Output supply current values are specified with no output load

present. The supply current associated with an individual channel operating at a given data rate can be calculated as described in the Power Consumption section. See
Figure 9 and Figure 10 for total V

2

Short-circuit duration less than 1 μs. Average power must conform to the limit shown under the Absolute Maximum Ratings.

3

The minimum pulse width is the shortest pulse width at which the specified timing parameter is guaranteed

4

The maximum data rate is the fastest data rate at which the specified timing parameter is guaranteed

5

t

propagation delay is measured from the time of the input rising logic high threshold, VIH, to the output rising 10% threshold of the VOx signal. T

DLH

delay is measured from the input falling logic low threshold, VIL, to the output falling 90% threshold of the VOx signal. See Figure 18 for waveforms of propagation
delay parameters.

6

t

is the magnitude of the worst-case difference in t

PSK

load within the recommended operating conditions. See Figure 18 for waveforms of propagation delay parameters.

7

Channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier.

DD1

and V

supply currents as a function of data rate.

DD2

0.7 1.0 mA

DDI(Q)

I

4.7 10 mA

DDO(Q)

0.8 1.0 mA DC to 1 MHz logic signal frequency

DD1(Q)

11 17 mA DC to 1 MHz logic signal frequency

DD2(Q)

, V

OAH

OAH

, V

OAL

OBL

4.1 4.4 V

DD2UV+

3.2 3.7 V

DD2UV−

DD2UVH

7.0 7.5 V

DD2UV+

6.0 6.5 V

DD2UV−

DD2UVH

,

OA(SC)

I

OB(SC)

36 48 62 ns CL = 2 nF, V

DLH, tDHL

37 53 72 ns CL = 2 nF, V

DLH, tDHL

12 ns CL = 2 nF, V

PSK

1 5 ns CL = 2 nF, V

PSKCD

1 7 ns CL = 2 nF, V

PSKCD

14 22 28 ns CL = 2 nF, V

R/tF

0.025 mA/Mbps V

DDI(D)

1.5 mA/Mbps V

DDO(D)

and/or t

DLH

DHL

≤ 3.6 V, 4.5 V ≤ V

DD1

V

DD1

V

− 0.1 V

DD2

V IOx = −20 mA, VIx = V

DD2

0.0 0.15 V IOx = +20 mA, VIx = V

≤ 18 V, unless stated otherwise. All minimum/

DD2

V

DD1

= 3.3 V, V

DD1

= 10 V. Switching

DD2

DD1

IxH

IxL

0.4 V

0.5 V

2.0 4.0 A V

that is measured between units at the same operating temperature, supply voltages, and output

= 10 V

DD2

= 10 V

DD2

= 10 V

DD2

= 10 V

DD2

= 10 V

DD2

DD2

DD2

DD2

DD2

DD2

DD2

DD2

= 10 V; see Figure 18
= 4.5 V; see Figure 18
= 10 V; see Figure 18
= 10 V; see Figure 18
= 4.5 V; see Figure 18
= 10 V; see Figure 18
= 4.5 V; see Figure 18

propagation

DHL

Rev. B| Page 4 of 16

ADuM3220/ADuM3221

PACKAGE CHARACTERISTICS

Table 3.

Parameter Symbol Min Typ Max Unit Test Conditions

Resistance (Input-to-Output)1 R
Capacitance (Input-to-Output)1 C
Input Capacitance CI 4.0 pF
IC Junction-to-Case Thermal Resistance, Side 1 θ

IC Junction-to-Case Thermal Resistance, Side 2 θ

1

The device is considered a 2-terminal device; Pin 1 through Pin 4 are shorted together, and Pin 5 through Pin 8 are shorted together.

REGULATORY INFORMATION

The ADuM3220/ADuM3221 approval is pending by the organizations listed in Tab l e 4 .

Table 4.

UL CSA VDE

Recognized under UL 1577

Component Recognition
Program1

Single/Basic 2500 V rms

Isolation Voltage

File E214100 File 205078 File 2471900-4880-0001

1

In accordance with UL 1577, each ADuM3220/ADuM3221 is proof tested by applying an insulation test voltage ≥3000 V rms for 1 second (current leakage detection

limit = 5 μA).

2

In accordance with DIN V VDE V 0884-10, each ADuM3220/ADuM3221 is proof tested by applying an insulation test voltage ≥ 1050 V peak for 1 second (partial

discharge detection limit = 5 pC). An asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.

Approved under CSA Component Acceptance Notice #5A

Basic insulation per CSA 60950-1-03 and IEC 60950-1,
400 V rms (566 V peak) maximum working voltage

Functional insulation per CSA 60950-1-03 and IEC 60950-1,
800 V rms (1131 V peak) maximum working voltage

1012 Ω

I-O

1.0 pF f = 1 MHz

I-O

46 °C/W

JCI

Thermocouple located at center
of package underside

41 °C/W

JCO

Thermocouple located at center
of package underside

Certified according to DIN V VDE V 0884-10
(VDE V 0884-10): 2006-12

Reinforced insulation, 560 V peak

2

INSULATION AND SAFETY-RELATED SPECIFICATIONS

Table 5.

Parameter Symbol Value Unit Conditions

Rated Dielectric Insulation Voltage 2500 V rms 1 minute duration
Minimum External Air Gap (Clearance) L(I01) 4.90 min mm

Minimum External Tracking (Creepage) L(I02) 4.01 min mm

Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)

Measured from input terminals to output terminals,
shortest distance through air

Measured from input terminals to output terminals,
shortest distance path along body

Rev. B| Page 5 of 16