High side or low side relative to input: ±700 V
High-side/low-side differential: 700 V
PEAK
0.1 A peak output current
CMOS input threshold levels
High frequency operation: 5 MHz maximum
High common-mode transient immunity: >75 kV/μs
High temperature operation: 105°C
Wide body, RoHS compliant, 16-lead SOIC
UL1577 2500 V rms input-to-output withstand voltage
The ADuM12341 is an isolated, half-bridge gate driver that
employs the Analog Devices, Inc. iCoupler® technology to
provide independent and isolated high-side and low-side
outputs. Combining high speed CMOS and monolithic
transformer technology, this isolation component provides
outstanding performance characteristics superior to
optocoupler-based solutions.
By avoiding the use of LEDs and photodiodes, this iCoupler
gate drive device is able to provide precision timing characteristics
not possible with optocouplers. Furthermore, the reliability and
performance stability problems associated with optocoupler
LEDs are avoided.
In comparison to gate drivers employing high voltage level
translation methodologies, the ADuM1234 offers the benefit
of true, galvanic isolation between the input and each output.
Each output can be operated up to ±700 V
input, thereby supporting low-side switching to negative voltages.
The differential voltage between the high side and low side can be
as high as 700 V
PEAK
.
As a result, the ADuM1234 provides reliable control over the
switching characteristics of IGBT/MOSFET configurations over
a wide range of positive or negative switching voltages.
relative to the
PEAK
FUNCTIONAL BLOCK DIAGRAM
ADuM1234
116
V
IA
215
V
IB
314
V
DD1
413
GND
1
DISABLE
5
6
NC
7
NC
8
V
DD1
NC = NO CONNECT
1
Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,329. Other patents pending.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
Part-to-Part Matching, Rising or Falling Edges
Part-to-Part Matching, Rising vs. Falling
Output Rise/Fall Time (10% to 90%) tR/tF 25 ns CL = 200 pF
1
Short-circuit duration less than 1 second.
2
The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3
The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4
t
propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. t
PHL
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5
Channel-to-channel matching, rising or falling edges, is the magnitude of the propagation delay diffe
are either both rising or falling edges. The supply voltages and the loads on each channel are equal.
6
Channel-to-channel matching, rising vs. falling edges, is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7
Part-to-part matching, rising or falling edges, is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8
Part-to-part matching, rising vs. falling edges, is the magnitude of the propagation delay difference between the same cha
is
a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
≤ 5.5 V, 12 V ≤ V
DD1
Current B, Quiescent
Current B, 10 Mbps
4
t
2
PW 100 ns C
≤ 18 V, 12 V ≤ V
DDA
1
I
3
10 Mbps C
≤ 18 V. All minimum/maximum specifications apply over the entire recommended
DDB
= 25°C, V
A
3.0 4.2 mA
DDI(Q)
I
,
DDA(Q)
I
DDB(Q)
6.0 9.0 mA
DDI(10)
I
,
DDA(10)
I
DDB(10)
, IIB,
I
IA
I
DISABLE
OAH,VOBH
OAL,VOBL
, I
OA(SC)
, t
PHL
PLH
0.3 1.2 mA
16 22 mA C
−10 +0.01 +10 μA 0 V ≤ VIA, VIB, V
V
DD1
V
V
DDA
DDB
− 0.1,
− 0.1
V
DDA
0.1 V IOA, I
100 mA
OB(SC)
97 124 160 ns CL = 200 pF
, V
= 5 V, V
DD1
V IOA, I
DDB
= 15 V, V
DDA
V
DD1
= 15 V. All voltages are
DDB
= 200 pF
L
= −1 mA
OB
= +1 mA
OB
= 200 pF
L
= 200 pF
L
Change vs. Temperature 100 ps/°C CL = 200 pF
− t
| PWD 8 ns CL = 200 pF
PHL
5 ns CL = 200 pF
6
13 ns CL = 200 pF
7
55 ns C
63 ns CL = 200 pF, Input tR = 3 ns
rence between two channels of the same part when the inputs
nnels of two different parts when one input
= 200 pF, Input tR = 3 ns
L
propagation delay is
PLH
Rising or Falling Edges
Rising vs. Falling Edges
8
Edges
PLH
5
DISABLE
≤ V
DD1
Rev. 0 | Page 3 of 12
ADuM1234
PACKAGE CHARACTERISTICS
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions
Resistance (Input-to-Output)
Capacitance (Input-to-Output)
Input Capacitance CI 4.0 pF
IC Junction-to-Ambient Thermal Resistance θJA 76 °C/W
1
The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM1234 has been approved by the organization listed in Table 3. Refer to Tab l e 7 and the Insulation Lifetime section for details
regarding recommended maximum working voltages for specific cross-isolation waveforms and insulation levels.
Table 3.
UL
Recognized under the 1577 component recognition program
Single/basic insulation, 2500 V rms isolation voltage
1
In accordance with UL1577, each ADuM1234 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 μA).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
1
R
1
C
1012 Ω
I-O
2.0 pF f = 1 MHz
I-O
1
Table 4.
Parameter Symbol Value Unit Conditions
Rated Dielectric Insulation Voltage 2500 V rms 1 minute duration
Minimum External Air Gap (Clearance) L(I01) 7.7 min mm
Measured from input terminals to output terminals,
shortest distance through air
Minimum External Tracking (Creepage) L(I02) 8.1 min mm
Measured from input terminals to output terminals,
shortest distance path along body
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
RECOMMENDED OPERATING CONDITIONS
Table 5.
Parameter Symbol Min Max Unit
Operating Temperature TA −40 +105 °C
Input Supply Voltage
Output Supply Voltages
Input Signal Rise and Fall Times 100 ns
Common-Mode Transient Immunity, Input-to-Output
Common-Mode Transient Immunity, Between Outputs
Transient Immunity, Supply Voltages
1
All voltages are relative to their respective ground.
2
See the section for additional data.Common-Mode Transient Immunity
1
V
1
V
2
−75 +75 kV/μs
2
2
−75 +75 kV/μs
−75 +75 kV/μs
4.5 5.5 V
DD1
, V
12 18
DDA
DDB
Rev. 0 | Page 4 of 12
Loading...
+ 8 hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.