High side or low side relative to input: ±700 V
High side/low side differential: 700 V
PEAK
0.1 A peak output current
High frequency operation: 5 MHz maximum
High common-mode transient immunity: >75 kV/μs
High temperature operation: 105°C
Wide body, 16-lead SOIC
UL1577 2500 V rms input-to-output withstand voltage
The ADuM12331 is an isolated, half-bridge gate driver that
employs the Analog Devices, Inc. iCoupler® technology to
provide independent and isolated high-side and low-side
outputs. Combining high speed CMOS and monolithic
transformer technology, this isolation component provides
outstanding performance characteristics superior to
optocoupler-based solutions.
By avoiding the use of LEDs and photodiodes, this iCoupler
gate drive device is able to provide precision timing characteristics
not possible with optocouplers. Furthermore, the reliability and
performance stability problems associated with optocoupler
LEDs are avoided.
In comparison to gate drivers employing high voltage level
translation methodologies, the ADuM1233 offers the benefit of
true, galvanic isolation between the input and each output. Each
output can be operated up to ±700 V
thereby supporting low-side switching to negative voltages. The
differential voltage between the high side and low side can be as
high as 700 V
PEAK
.
As a result, the ADuM1233 provides reliable control over the
switching characteristics of IGBT/MOSFET configurations over
a wide range of positive or negative switching voltages.
relative to the input,
PEAK
FUNCTIONAL BLOCK DIAGRAM
116
V
IA
215
V
IB
314
V
DD1
413
GND
1
DISABLE
5
6
NC
7
NC
8
V
DD1
1
Protected by U.S. Patents 5,952,849 and 6,291,907.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
All voltages are relative to their respective ground. 4.5 V ≤ V
specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at T
V
= 5 V, V
DD1
= 15 V, V
DDA
= 15 V.
DDB
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions
DC SPECIFICATIONS
Input Supply Current, Quiescent I
Output Supply Current A or Output Supply
DDI(Q)
I
DDA(Q)
Current B, Quiescent
Input Supply Current, 10 Mbps I
Output Supply Current A or Output Supply
DDI(10)
I
DDA(10)
Current B, 10 Mbps
Input Currents IIA, IIB, I
Logic High Input Threshold VIH 2.0 V
Logic Low Input Threshold VIL 0.8 V
Logic High Output Voltages V
Logic Low Output Voltages V
Output Short-Circuit Pulsed Current
1
OAH,VOBH
OAL,VOBL
I
OA(SC)
SWITCHING SPECIFICATIONS
Minimum Pulse Width
Maximum Switching Frequency
Propagation Delay
2
3
4
PW 100 ns CL = 200 pF
10 Mbps CL = 200 pF
t
PHL
Change vs. Temperature 100 ps/°C CL = 200 pF
Pulse Width Distortion, |t
Channel-to-Channel Matching,
Rising or Falling Edges
Channel-to-Channel Matching,
Rising vs. Falling Edges
Part-to-Part Matching, Rising or Falling Edges
Part-to-Part Matching, Rising vs. Falling Edges
PLH
5
− t
| PWD 8 ns CL = 200 pF
PHL
5 ns CL = 200 pF
6
13 ns CL = 200 pF
7
55 ns CL = 200 pF, Input tR = 3 ns
8
63 ns CL = 200 pF, Input tR = 3 ns
Output Rise/Fall Time (10% to 90%) tR/tF 25 ns CL = 200 pF
1
Short-circuit duration less than 1 second.
2
The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3
The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4
t
propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. t
PHL
measured from the 50% level of the rising edge of the V
5
Channel-to-channel matching, rising or falling edges is the magnitude of the propagation delay difference between two channels of the same part when the inputs
are either both rising or falling edges. The supply voltages and the loads on each channel are equal.
6
Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7
Part-to-part matching, rising or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8
Part-to-part matching, rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input
is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
signal to the 50% level of the rising edge of the VOx signal.
Ix
≤ 5.5 V, 12 V ≤ V
DD1
≤ 18 V, 12 V ≤ V
DDA
≤ 18 V. All min/max
DDB
3.0 4.2 mA
, I
0.3 1.2 mA
DDB(Q)
6.0 9.0 mA
, I
16 22 mA CL = 200 pF
DDB(10)
DISABLE
−10 +0.01 +10 μA 0 ≤ VIA, VIB, V
− 0.1,
V
DDA
− 0.1
V
DDB
, V
V
DDA
V IOA, I
DDB
0.1 V IOA, I
, I
100 mA
OB(SC)
, t
97 124 160 ns CL = 200 pF
PLH
= 25°C,
A
DISABLE
= −1 mA
OB
= +1 mA
OB
propagation delay is
PLH
≤ V
DD1
Rev. A | Page 3 of 12
ADuM1233
PACKAGE CHARACTERISTICS
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions
Resistance (Input-to-Output)
Capacitance (Input-to-Output)
Input Capacitance CI 4.0 pF
IC Junction-to-Ambient Thermal Resistance θJA 76 °C/W
1
The device is considered a 2-terminal device: Pin 1 through Pin 8 are shorted together, and Pin 9 through Pin 16 are shorted together.
REGULATORY INFORMATION
The ADuM1233 has been approved by the organization listed in Tabl e 3.
Table 3.
1
UL
Recognized under 1577 component recognition program
1
In accordance with UL1577, each ADuM1233 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 μA).
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 4.
Parameter Symbol Value Unit Conditions
Rated Dielectric Insulation Voltage 2500 V rms 1 minute duration
Minimum External Air Gap (Clearance) L(I01) 7.7 min mm
Minimum External Tracking (Creepage) L(I02) 8.1 min mm
Minimum Internal Gap (Internal Clearance) 0.017 min mm Insulation distance through insulation
Tracking Resistance (Comparative Tracking Index) CTI >175 V DIN IEC 112/VDE 0303 Part 1
Isolation Group IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
1
1
R
1012 Ω
I-O
C
2.0 pF f = 1 MHz
I-O
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
RECOMMENDED OPERATING CONDITIONS
Table 5.
Parameter Symbol Min Max Unit
Operating Temperature TA −40 +105 °C
Input Supply Voltage
Output Supply Voltages
Input Signal Rise and Fall Times 100 ns
Common-Mode Transient Immunity, Input-to-Output
Common-Mode Transient Immunity, Between Outputs
Transient Immunity, Supply Voltages
1
All voltages are relative to their respective ground.
2
See the Common-Mode Transient Immunity section for additional data.
1
1
2
2
2
Rev. A | Page 4 of 12
V
4.5 5.5 V
DD1
V
, V
DDA
12 18
DDB
−75 +75 kV/μs
−75 +75 kV/μs
−75 +75 kV/μs
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