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Specifications subject to change with
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6-Channel 14-bit or 12-bit ADC
Single ended and differential inputs
Programmable data rate up to 842kSPS
On-Chip Voltage Reference and Temperature Sensor
Power
Supply Range: 2.2 V to 3.6 V
Power Consumption
680 nA, in power down mode, non-retained state
1.6 µA, in power down mode, MCU memory and
transceiver memory retained
190 µA / MHz, Cortex in Active mode
12.8 mA transceiver in receive mode, Cortex in power
down mode
9 to 32 mA transceiver in transmit mode, Cortex in power
-107.5 dBm at 38.4 kbps, 2FSK
Single ended and differential PA
Low External BOM
Microcontroller
ARM Cortex™-M3 32-bit processor
Serial Wire download and debug
External Watch crystal for wakeup timer
16 MHz internal Oscillator with 8-way Programmable
Divider
FUNCTIONAL BLOCK DIAGRAM
Memory
128k/64k Bytes Flash/EE Memory, 16k/8k Bytes SRAM
20000 cycle Flash/EE endurance
10 year Flash/EE retention
In-circuit download via Serial Wire and UART
On-Chip Peripherals
2
UA RT, I
C and SPI Serial I/O
28-Pin GPIO Port
2 General Purpose Timers
Wake -up Ti mer
Watchdog Timer
8-Channel PWM
Packages and Temperature Range
64 lead LFCSP (9mm x 9mm) package –40°C to 85°C
Tools
Low-Cost Development System
Third-Party Compiler and emulator tool Support
APPLICATIONS
Battery powered wireless sensor
Medical telemetry systems
Industrial and home automation
Asset tracking
Security systems (access systems)
Health and fitness applications
Devices is believed to be accurate and reliable.
out notice. No license is granted by implication
Figure 1. ADuCF101 Block Diagram
www.analog.com
02062-9106, U.S.A.
ADuCRF101 Preliminary Technical Data
TABLE OF CONTENTS
Features .............................................................................................. 1
The ADuCRF101 is a fully integrated data acquisition solution
designed for low power wireless applications. It features an 14bit ADC, a low power Cortex™-M3 core from ARM®, a
431 MHz to 464 MHz and 862 MHz to 928 MHz RF transceiver,
and Flash/EE memory packaged in a 9 mm × 9 mm LFCSP.
The acquisition section consists of a 14 bit SAR ADC. The six
inputs can be configured as single ended or differential modes.
When configured in single ended mode, they can be used for
ratiometric measurements on sensors, powered when required
from the internal LDO. An internal battery monitor channel
and an on-chip temperature sensor are also available.
This wireless data acquisition system is designed to operate in
battery-powered applications where low power is critical. The
device can be configured in normal operating mode or different
low power modes under direct program control. In flexi mode
any peripheral can operate and wake-up the device. In
hibernate mode the internal wake-up timer remains active. In
shutdown mode only an external interrupt can wake-up the
device.
The ADuCRF101 integrates a low power Cortex-M3 core from
ARM. It is a 32-bit RISC machine, offering up to 1.25 DMIPS
peak performance. The Cortex-M3 MCU also has a flexible 14channel DMA controller supporting communication
peripherals SPI, UART and I
Flash/EE memory and 8 kB /16 kB of SRAM are also provided
on-chip.
2
C. 64 kB / 128 kB of nonvolatile
A 16 MHz on-chip oscillator generates the system clock. This
clock can be internally divided for the CPU to operate at lower
frequency for power saving reasons. A low power internal 32
kHz oscillator is available and can used to clock the timers.
There are two general-purpose timers, a wake-up timer and a
system watchdog timer.
A range of communication peripherals can be configured as
required in a specific application. These peripherals include
UA RT, I
The RF transceiver communicates in the 431 MHz to 464 MHz
and 862 MHz to 928 MHz frequency bands using multiple
configurations.
On-chip factory firmware supports in-circuit serial download
via the UART while nonintrusive emulation and program
download is also supported via the serial wire interface. These
features are incorporated into a low cost development system
supporting this precision analog microcontroller family.
The parts operate from 2.2 V to 3.6 V and are specified over an
industrial temperature range of −40°C to +85°C.
Three versions of the ADuCRF101 are available:
14-bit ADC, 128k Byte Flash and 16k Byte SRAM,
12-bit ADC, 128k Byte Flash and 16k Byte SRAM,
12-bit ADC, 64k Byte Flash and 8k Byte SRAM,
2
C, and SPI, GPIO ports, PWM and RF transceiver.
Rev. PrF| Page 3 of 13
ADuCRF101 Preliminary Technical Data
Integral Nonlinearity
±1 ±4 LSB
V
= 1.25V from internal reference
DC Code Distribution
2 8 LSB
ADC input is a DC voltage
Gain Error
±1.25
±5 LSB
Signal-to-Noise Ratio (SNR)
68 80 dB
SPECIFICATIONS
ANALOG FRONT END SPECIFICATIONS
AVDD = IOVDD = VDDBAT1 = VDDBAT2 = 2.2 V to 3.6 V, V
T
to T
MAX
, unless otherwise noted. Default ADC sampling frequency: eight acquisition clocks and ADC clock frequency of 4 MHz.
MIN
Table 1. ADC channel specifications
12-bit model 14-bit model
Parameter Typ Max Typ Max Unit Test Conditions/Comments
DC ACCURACY Single ended input mode. Applies to all
Resolution 12 14 Bits
±2 ±8 LSB V
Differential Nonlinearity±1 ±1 LSB Guaranteed no missing code
CALIBRATED ENDPOINT ERRORS Measured using the factory-set default
Total Harmonic Distortion TBD TBD
Peak Harmonic or Spurious
TBD TBD
Noise (PHSN)
Channel-to-Channel Crosstalk TBD TBD Measured on adjacent channels
Table 2. ADC channel specifications
Parameter Min Typ Max Unit Test Conditions/Comments
ANALOG INPUT
Input Voltage Ranges1
Single ended input 0 V
Differential input 0 VCM ± V
V
REF
/2 V
REF
Leakage Current 100 nA
Input Capacitance 20 pF During ADC Acquisition
ADC Power-up Time5 µs Excludes reference power up time
ON-CHIP VOLTAGE REFERENCE
Output Voltage 1.25 V
Accuracy ±5 mV Measured at TA = 25°C
Reference Temperature Co ±40 ppm/°C
Power Supply Rejection Ratio 60 dB
Output Impedance 2
Internal V
TEMPERATURE SENSOR
Power-On Time 5 ms 0.47µF external capacitor
REF
1
Indicates die temperature
Ω
Voltage Output at 25°C TBD mV
Voltage TC
Accuracy
TBD mV/°C TBD °C MCU in low power mode
Thermal impedance TBD
1
These numbers are not production tested, but are guaranteed by design and/or characterization data at production release.
Rev. PrF | Page 4 of 13
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