Input range: 0 V to 2.25 V, and 0 V to V
Temperature range: –40°C to +120°C
Temperature sensor accuracy of ±0.5°C
Supply range: 2.7 V to 5.5 V
Power-down current 1 µA
Internal 2.25 V
option
REF
Double-buffered input logic
2
C, SPI, QSPI™, MICROWIRE™, and DSP compatible
I
4-wire serial interface
SMBus packet error checking (PEC) compatible
16-lead QSOP package
APPLICATIONS
Portable battery-powered instruments
Personal computers
Smart battery chargers
Telecommunications systems electronic test equipment
Domestic appliances
Process control
DD
*
ADT7411
PIN CONFIGURATION
AIN6
1
AIN5
2
3
NC
ADT7411
CS
4
GND
D+/AIN1
D–/AIN2
TOP VIEW
5
(Not to Scale)
6
V
DD
7
8
NC = NO CONNECT
Figure 1.
AIN7
16
AIN8
15
14
AIN4
SCL/SCLK
13
SDA/DIN
12
11
DOUT/ADD
INT/INT
10
AIN3
9
02882-A-005
GENERAL DESCRIPTION
The ADT7411 combines a 10-bit temperature-to-digital converter and a 10-bit 8-channel ADC in a 16-lead QSOP package.
This includes a band gap temperature sensor and a 10-bit ADC
to monitor and digitize the temperature reading to a resolution
of 0.25°C. The ADT7411 operates from a single 2.7 V to 5.5 V
supply. The input voltage on the ADC channels has a range of
0 V to 2.25 V and the input bandwidth is dc. The reference for
the ADC channels is derived internally. The ADT7411 provides
two serial interface options: a 4-wire serial interface compatible
*Protected by the following U.S. Patent Numbers: 6,169,442; 5,867,012; 5,764174. Other patents pending.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
with SPI, QSPI, MICROWIRE, and DSP interface standards,
and a 2-wire SMBus/I
that is controlled via the serial interface.
The ADT7411’s wide supply voltage range, low supply current,
2
and SPI/I
C compatible interface make it ideal for a variety of
applications, including personal computers, office equipment,
and domestic appliances.
Accuracy @ VDD = 3.3 V ± 10% ±1.5 °C TA = 85°C.
±0.5 ±3 °C TA = 0°C to 85°C.
±2 ±5 °C TA = −40°C to +120°C.
Accuracy @ V
±3 ±5 °C TA = −40°C to +120°C.
Resolution 10 Bits Equivalent to 0.25°C.
Long-term Drift 0.25 °C Drift over 10 years if part is operated at 55°C.
External Temperature Sensor External transistor = 2N3906.
Accuracy @ VDD= 3.3 V ± 10% ±1.5 °C TA = 85°C.
±3 °C TA = 0°C to 85°C.
±5 °C TA = −40°C to +120°C.
Accuracy @ VDD = 5 V ± 5% ±2 ±3 °C TA = 0°C to 85°C.
±3 ±5 °C TA = −40°C to +120°C.
Resolution 10 Bits Equivalent to 0.25°C.
Output Source Current 180 µA High Level.
11 µA Low Level.
CONVERSION TIMES Single-channel Mode.
Slow ADC
VDD/AIN 11.4 ms Averaging (16 samples) on.
712 µs Averaging off.
Internal Temperature 11.4 ms Averaging (16 samples) on.
712 µs Averaging off.
External Temperature 24.22 ms Averaging (16 samples) on.
1.51 ms Averaging off.
Fast ADC
VDD/AIN 712 µs Averaging (16 samples) on.
44.5 µs Averaging off.
Internal Temperature 2.14 ms Averaging (16 samples) on.
134 µs Averaging off.
External Temperature 14.25 ms Averaging (16 samples) on.
890 µs Averaging off.
1
See the Terminology section.
= 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted. Temperature ranges are −40°C to +120°C.
DD
= 5 V ± 5% ±2 ±3 °C TA = 0°C to 85°C.
DD
Rev. A | Page 3 of 36
ADT7411
Parameter1 Min Typ Max Unit Conditions/Comments
ROUND ROBIN UPDATE RATE2
Slow ADC @ 25°C
Averaging On 125.4 ms AIN1 and AIN2 are selected on Pins 7 and 8.
Averaging Off 17.1 ms AIN1 and AIN2 are selected on Pins 7 and 8.
Averaging On 140.36 ms D+ and D– are selected on Pins 7 and 8.
Averaging Off 12.11 ms D+ and D− are selected on Pins 7 and 8.
Fast ADC @ 25°C
Averaging On 9.26 ms AIN1 and AIN2 are selected on Pins 7 and 8.
Averaging Off 578.96 µs AIN1 and AIN2 are selected on pins 7 and 8.
Averaging On 24.62 ms D+ and D− are selected on Pins 7 and 8.
Averaging Off 3.25 ms D+ and D− are selected on Pins 7 and 8.
ON-CHIP REFERENCE3
Reference Voltage 2.25 V
Temperature Coefficient 80 ppm/°C
DIGITAL INPUTS
1, 3
Input Current ±1 µA VIN = 0 V to VDD.
VIL, Input Low Voltage 0.8 V
VIH, Input High Voltage 1.89 V
Pin Capacitance 3 10 pF All Digital Inputs.
SCL, SDA Glitch Rejection 50 ns Input filtering suppresses noise spikes of less than 50 ns.
DIGITAL OUTPUT
Output High Voltage, VOH 2.4 V I
Output Low Voltage, VOL 0.4 V IOL = 3 mA.
Output High Current, IOH 1 mA VOH = 5 V.
Output Capacitance, C
INT/INT Output Saturation Voltage
I2C TIMING CHARACTERISTICS
50 pF
OUT
0.8 V I
4, 5
Serial Clock Period, t1 2.5 µs Fast-Mode I2C. See Figure 2.
Data In Setup Time to SCL High, t2 50 ns
Data Out Stable after SCL Low, t3 0 ns See Figure 2.
SDA Low Setup Time to SCL Low
(Start Condition), t4 50 ns See Figure 2.
SDA High Hold Time after SCL High
(Stop Condition), t5 50 ns See Figure 2.
SDA and SCL Fall Time, t6 90 ns See Figure 2.
SPI TIMING CHARACTERISTICS
CS to SCLK Setup Time, t1
1, 3, 6
0 ns See Figure 3.
SCLK High Pulse Width, t2 50 ns See Figure 3.
SCLK Low Pulse Width, t3 50 ns See Figure 3.
Data Access Time after SCLK
Falling Edge, t
6
35 ns See Figure 3.
4
Data Setup Time Prior to SCLK
Rising Edge, t5 20 ns See Figure 3.
Data Hold Time after SCLK
Rising Edge, t6 0 ns See Figure 3.
2
Round robin is the continuous sequential measurement of the following channels: VDD, internal temperature, external temperature (AIN1, AIN2), AIN3, AIN4, AIN5,
AIN6, AIN7, and AIN8.
3
Guaranteed by design and characterization, not production tested.
4
The SDA and SCL timing is measured with the input filters turned on so as to meet the FAST-Mode I2C specification. Switching off the input filters improves the transfer
rate, but has a negative effect on the EMC behavior of the part.
5
Guaranteed by design. Not tested in production.
6
All input signals are specified with tr = tf = 5 ns (10% to 90% of VDD), and timed from a voltage level of 1.6 V.
Time to complete one measurement cycle through all
channels.
= I
SOURCE
= 4 mA.
OUT
= 200 µA.
SINK
Rev. A | Page 4 of 36
ADT7411
T
Parameter1 Min Typ Max Unit Conditions/Comments
CS to SCLK Hold Time, t7
CS to DOUT High Impedance, t8
POWER REQUIREMENTS
VDD 2.7 5.5 V
VDD Settling Time 50 ms VDD settles to within 10% of its final voltage level.
IDD (Normal Mode)7 3 mA VDD = 3.3 V, VIH = VDD and VIL = GND.
2.2 3 mA VDD = 5 V, VIH = VDD and VIL = GND.
I
(Power-Down Mode) 10 µA VDD = 3.3 V, VIH =VDD and VIL = GND.
DD
10 µA VDD = 5 V, VIH = VDD and VIL = GND.
Power Dissipation 10 mW VDD = 3.3 V. Using normal mode.
33 µW VDD = 3.3 V. Using shutdown mode.
0 ns See Figure 3.
40 ns See Figure 3.
t
1
SCL
t
5
t
6
SDA
DATA IN
SDA
DATA OU
t
4
Figure 2. I
t
2
t
3
2
C Bus Timing Diagram
02882-A-002
CS
SCLK
D
D
OUT
t
1
IN
D7
XXXXXXXXD7D6D5D4D3D2D1 D0
t
2
t
3
D6D5D4D3D2D1D0XXXXXXXX
t
t
5
6
t
4
t
7
t
8
02882-A-003
Figure 3. SPI Bus Timing Diagram
200µAI
TO
OUTPUT
PIN
C
L
50pF
200µAI
Figure 4. Load Circuit for Access Time and Bus Relinquish Time
OL
1.6V
OH
02882-A-004
7
IDD specification is valid for full-scale analog input voltages. Interface inactive. ADC active. Load currents excluded.
Rev. A | Page 5 of 36
ADT7411
FUNCTIONAL BLOCK DIAGRAM
D+/AIN1
D–/AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
7
8
9
14
2
1
16
15
ON-CHIP
TEMPERATURE
SENSOR
ANALOG
MUX
V
DD
SENSOR
VALUE REGISTER
VALUE REGISTER
6
V
DD
INTERNAL
TEMPERATURE
EXTERNAL
TEMPERATURE
A-TO-D
CONVERTER
V
DD
VALUE REGISTER
AIN1
VALUE REGISTER
AIN2
VALUE REGISTER
AIN3
VALUE REGISTER
AIN4
VALUE REGISTER
AIN5
VALUE REGISTER
AIN6
VALUE REGISTER
AIN7
VALUE REGISTER
AIN8
VALUE REGISTER
5
GND
LIMIT
COMPARATOR
DIGITAL MUX
STATUS
REGISTERS
4
CS
SCL/SCLK
Figure 5. Functional Block Diagram
ADT7411
ADDRESS POINTER
REGISTER
T
HIGH
REGISTERS
T
LOW
REGISTERS
VDD LIMIT
REGISTERS
AIN
DIGITAL MUX
SPI/SMBus INTERFACE
13
HIGH
REGISTERS
AIN
LOW
REGISTERS
CONTROL CONFIG. 1
REGISTER
CONTROL CONFIG. 2
REGISTER
CONTROL CONFIG. 3
REGISTER
INTERRUPT MASK
REGISTERS
12
SDA/DIN
LIMIT
LIMIT
LIMIT
LIMIT
11
DOUT/ADD
10
INT/INT
02882-A-001
Rev. A | Page 6 of 36
ADT7411
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VDD to GND −0.3 V to +7 V
Analog Input Voltage to GND −0.3 V to VDD + 0.3 V
Digital Input Voltage to GND −0.3 V to VDD + 0.3 V
Operating Temperature Range −40°C to +120°C
Storage Temperature Range −65°C to +150°C
Junction Temperature 150°C
16-Lead QSOP Package
Power Dissipation8 (T
Thermal Impedance9
Peak Temperature 220°C (0°C/5°C)
Time at Peak Temperature 10 sec to 20 sec
Ramp-Up Rate 2°C/sec to 3°C/sec
Ramp-Down Rate −6°C/sec
− TA)/θJA
Jmax
Table 3. I2C Address Selection
ADD Pin I2C Address
Low 1001 000
Float 1001 010
High 1001 011
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
8
Values relate to package being used on a 4-layer board
9
Junction-to-case resistance is applicable to components featuring a
preferential flow direction, e.g., components mounted on a heat sink.
Junction-to-ambient resistance is more useful for air-cooled PCB-mounted
components.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electro-static discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 7 of 36
ADT7411
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTION
AIN6
AIN5
NC
CS
GND
V
D+/AIN1
D–/AIN2
DD
1
2
3
ADT7411
4
TOP VIEW
5
(Not to Scale)
6
7
8
NC = NO CONNECT
AIN7
16
AIN8
15
14
AIN4
SCL/SCLK
13
SDA/DIN
12
11
DOUT/ADD
INT/INT
10
AIN3
9
02882-A-005
Figure 6. Pin Configuration
Table 4. Pin Function Description
Pin
No.
Mnemonic Description
1 AIN6 Analog Input. Single-ended analog input channel. Input range is 0 V to 2.25 V or 0 V to VDD.
2 AIN5 Analog Input. Single-ended analog input channel. Input range is 0 V to 2.25 V or 0 V to VDD.
3 NC No Connection to This Pin.
4
SPI—Active Low Control Input. This is the frame synchronization signal for the input data. When CS goes low, it
CS
enables the input register and data is transferred in on the rising edges and out on the falling edges of the
subsequent serial clocks. It is recommended that this pin be tied high to V
when operating the serial interface in I2C
DD
mode.
5 GND Ground Reference Point for All Circuitry on the Part. Analog and digital ground.
6 VDD Positive Supply Voltage, 2.7 V to 5.5 V. The supply should be decoupled to ground.
7 D+/AIN
D+. Positive connection to external temperature sensor. AIN1. Analog Input. Single-ended analog input channel.
Input range is 0 V to 2.25 V or 0 V to 5 V.
8 D−/AIN2
D−. Negative connection to external temperature sensor. AIN2. Analog Input. Single-ended analog input channel.
Input range is 0 V to 2.25 V or 0 V to 5 V.
9 AIN3 Analog Input. Single-ended analog input channel. Input range is 0 V to 2.25 V or 0 V to VDD.
10
11 DOUT/ADD
Over Limit Interrupt. The output polarity of this pin can be set to give an active low or active high interrupt when
INT/INT
temperature, V
, or AIN limits are exceeded. Default is active low. Open-drain output, needs a pull-up resistor.
DD
SPI. Serial Data Output. Logic output. Data is clocked out of any register at this pin. Data is clocked out on the falling
edge of SCLK. Open-drain output, needs a pull-up resistor.
2
C serial bus address selection pin. Logic input. A low on this pin gives the Address 1001 000. Leaving it floating
ADD. I
gives the address 1001 010, and setting it high gives the Address 1001 011. The I
2
C address set up by the ADD pin is
not latched by the device until after this address has been sent twice. On the eighth SCL cycle of the second valid
communication, the serial bus address is latched in. Any subsequent changes on this pin will have no effect on the I2C
serial bus address.
12 SDA/DIN
2
C serial data input. I2C serial data to be loaded into the part’s registers is provided on this input. An open-drain
SDA. I
configuration, it needs a pull-up resistor.
DIN. SPI serial data input. Serial data to be loaded into the part’s registers is provided on this input. Data is clocked
into a register on the rising edge of SCLK. Open-drain configuration, needs a pull-up resistor.
13 SCL/SCLK
Serial Clock Input. This is the clock input for the serial port. The serial clock is used to clock data out of any register of
the ADT7411 and also to clock data into any register that can be written to. An open-drain configuration, it needs a
pull-up resistor.
14 AIN4 Analog Input. Single-ended analog input channel. Input range is 0 V to 2.25 V or 0 V to VDD.
15 AIN8 Analog Input. Single-ended analog input channel. Input range is 0 V to 2.25 V or 0 V to VDD.
16 AIN7 Analog Input. Single-ended analog input channel. Input range is 0 V to 2.25 V or 0 V to VDD.
Rev. A | Page 8 of 36
ADT7411
(
(
)
=
TERMINOLOGY
Relative Accuracy
Relative accuracy or integral nonlinearity (INL) is a measure of
the maximum deviation, in LSBs, from a straight line passing
through the endpoints of the ADC transfer function. A typical
INL versus code plot can be seen in Figure 10.
Total Unadjusted Error (TUE)
Total unadjusted error is a comprehensive specification that
includes the sum of the relative accuracy error, gain error, and
offset error under a specified set of conditions.
Offset Error
This is a measure of the offset error of the ADC. It can be
negative or positive. It is expressed in mV.
Gain Error
This is a measure of the span error of the ADC. It is the
deviation in slope of the actual ADC transfer characteristic
from the ideal expressed as a percentage of the full-scale range.
Offset Error Drift
This is a measure of the change in offset error with changes in
temperature. It is expressed in (ppm of full-scale range)/°C.
Gain Error Drift
This is a measure of the change in gain error with changes in
temperature. It is expressed in (ppm of full-scale range)/°C.
Long -term Temperature Drift
This is a measure of the change in temperature error with the
passage of time. It is expressed in degrees Celsius. The concept
of long-term stability has been used for many years to describe
by what amount an IC’s parameter would shift during its
lifetime. This is a concept that has been typically applied to both
voltage references and monolithic temperature sensors.
Unfortunately, integrated circuits cannot be evaluated at room
temperature (25°C) for 10 years or so to determine this shift. As
a result, manufacturers typically perform accelerated lifetime
testing of integrated circuits by operating ICs at elevated
temperatures (between 125°C and 150°C) over a shorter period
of time (typically, between 500 and 1,000 hours). As a result of
this operation, the lifetime of an integrated circuit is
significantly accelerated due to the increase in rates of reaction
within the semiconductor material.
DC Power Supply Rejection Ratio (PSRR)
The power supply rejection ratio (PSRR) is defined as the ratio
of the power in the ADC output at full-scale frequency f, to the
power of a 100 mV sine wave applied to the V
frequency fs:
)
Pf = power at frequency f in ADC output
PfsPfdBPSRRlog10
supply of
DD
Pfs = power at frequency fs coupled into the V
supply
DD
Round Robin
This term is used to describe the ADT7411 cycling through
the available measurement channels in sequence, taking a
measurement on each channel.
Rev. A | Page 9 of 36
ADT7411
TYPICAL PERFORMANCE CHARACTERISTICS
2.00
ADC OFF
1.95
1.90
(mA)
CC
I
1.85
1.80
1.75
2.73.13.53.94.34.75.12.93.33.74.14.54.95.3 5.5
V
(V)
CC
Figure 7. Supply Current vs. Supply Voltage at 25ºC