Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, Blackfin, CrossCore, EZ-Board, EZ-Extender, and
EZ-KIT Lite are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-BF609 EZ-KIT Lite is designed to be used solely in a laboratory environment. The board is not intended for use as a consumer end
product or as a portion of a consumer end product. The board is an open
system design which does not include a shielded enclosure and therefore
may cause interference to other electrical devices in close proximity. This
board should not be used in or near any medical equipment or RF devices.
The ADSP-BF609 EZ-KIT Lite is currently being processed for certification that it complies with the essential requirements of the European
EMC directive 2004/108/EC and therefore carries the “CE” mark.
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance degradation or loss of
functionality. Store unused EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
PREFACE
Product Overview .......................................................................... xii
Purpose of This Manual .................................................................. xv
Intended Audience .......................................................................... xv
Manual Contents ........................................................................... xvi
What’s New in This Manual ........................................................... xvi
Technical or Customer Support ..................................................... xvii
Supported Processors ..................................................................... xvii
Product Information .................................................................... xviii
Analog Devices Web Site ........................................................ xviii
EngineerZone ......................................................................... xviii
Related Documents ........................................................................ xix
Notation Conventions ..................................................................... xx
Power ........................................................................................ B-16
INDEX
ADSP-BF609 EZ-KIT Lite Evaluation System Manualix
Contents
xADSP-BF609 EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-BF609 EZ-KIT Lite®, Analog
Devices, Inc. low-cost evaluation system for the ADSP-BF60x Blackfin®
processors.
The ADSP-BF609 processor is a member of the Blackfin family of products, incorporating the Analog Devices/Intel Micro Signal Architecture
(MSA). Blackfin processors combine a dual-MAC state-of-the-art signal
processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and single-instruction, multiple-data (SIMD)
multimedia capabilities into a single instruction-set architecture.
ADSP-BF60x Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and
power constraints of today’s automotive systems, embedded industrial,
instrumentation, and power/motor control applications.
The evaluation board is designed to be used in conjunction with the
CrossCore
ities of the ADSP-BF60x Blackfin processors. The CCES development
environment aids advanced application code development and debug,
such as:
•Create, compile, assemble, and link application programs written
•Load, run, step, halt, and set breakpoints in application programs
•Read and write data and program memory
ADSP-BF609 EZ-KIT Lite Evaluation System Manualxi
®
Embedded Studio (CCES) development tools to test capabil-
in C++, C, and assembly
Product Overview
•Read and write core and peripheral registers
•Plot memory
Access to the processor from a personal computer (PC) is achieved
through a USB port (when a debug agent is mounted on the EZ-KIT Lite
board) or an external JTAG emulator. The USB interface provides unrestricted access to the ADSP-BF609 processor and evaluation board
peripherals. Analog Devices JTAG emulators offer faster communication
between the host PC and target hardware. Analog Devices carries a wide
range of in-circuit emulation products. To learn more about Analog
Devices emulators and processor development tools, go to:
http://www.analog.com/processors/tools/.
The ADSP-BF609 EZ-KIT Lite provides example programs to demonstrate the product capabilities.
The ADSP-BF609 EZ-KIT Lite software is part of the EZ-Board
BSP (Board Support Package) for the Blackfin ADSP-BF60x family
which needs to be installed after CrossCore Embedded Studio. The
EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for 90 days after activation. For more information,
refer to “Evaluation License Restrictions” on page 1-10 in this
manual and the Installation Quick Reference Card.
Product Overview
The board features:
•Analog Devices ADSP-BF609 Blackfin processor
•349-pin LFBGA package
•25 MHz CLKIN oscillator
•48 MHz USB CLKIN
xiiADSP-BF609 EZ-KIT Lite Evaluation System Manual
Preface
•Double Data Rate Synchronous Dynamic Random-Access Memory
(DDR2 SDRAM)
•Micron MT47H64M16HR-3
•64M x 16 bit (1 Gb)
•Burst flash memory
•Micron PC28F128P33T85B
•16M x 16-bit (32 MB) flash memory
•Quad Serial Peripheral Interface (SPI)
•Winbond W25Q32
•32 Mb serial flash memory
•Ethernet PHY
•National Semiconductor
•DP83848C 10/100 PHY
•Two LEDs integrated into the RJ-45 connector:
link/activity
ADSP-BF609 EZ-KIT Lite Evaluation System Manualxiii
Product Overview
•Controller Area Network (CAN)
•NXP TJA1041
•RJ-11 connector
•Debug interface
•JTAG header for use with ADI emulators
•Standalone debug agent
•LEDs
•Eight LEDs: one power (green), one board reset (red), one
temperature limit (amber), Ethernet speed (green), and four
general-purpose (amber)
•Push buttons
•Four push buttons: one reset, one wake, and two IRQ/flag
•Expansion Interface 3 (EI3)
•Next generation of the expansion interface design, provides
access to most of the processor signals
•Power supply
•CE approved
•5V @ 3.6 Amps
•Other features
•Link port connectors
•SD/MMC memory connector
•Rotary encoder
•MP JTAG in and out connectors
•0.05-ohm resistors for processor current measurement
xivADSP-BF609 EZ-KIT Lite Evaluation System Manual
•JTAG ICE 14-pin header
•USB cable
Preface
Traditional mechanical switches for changing the board’s factory setup
have been removed in favor of I
remaining mechanical switches are the JTAG switches, boot mode switch,
and push buttons. The JTAG switches are provided for setting up single-processor JTAG communications or multiple-processor
configurations.
For information about the hardware components of the EZ-KIT Lite,
refer to “ADSP-BF609 EZ-KIT Lite Bill Of Materials” on page A-1.
2
C controlled software switches. The only
Purpose of This Manual
The ADSP-BF609 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board). The text
describes operation and configuration of the board components and provides guidelines for running your own code on the ADSP-BF609 EZ-KIT
Lite. Finally, a schematic and a bill of materials are provided for reference.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture,
instruction set, and C/C++ programming languages.
Programmers who are unfamiliar with Analog Devices processors can use
this manual, but should supplement it with other texts (such as the
ADSP-BF60x Blackfin Processor Hardware Reference and Blackfin Processor
Programming Reference) that describe your target architecture.
ADSP-BF609 EZ-KIT Lite Evaluation System Manualxv
Manual Contents
Programmers who are unfamiliar with CrossCore Embedded Studio
should refer to the CCES online help.
Manual Contents
The manual consists of:
•Chapter 1, “Using ADSP-BF609 EZ-KIT Lite” on page 1-1.
Describes EZ-KIT Lite functionality from a programmer’s perspective and provides a simplified memory map of the processor.
•Chapter 2, “ADSP-BF609 EZ-KIT Lite Hardware Reference” on
page 2-1.
Provides information about the EZ-KIT Lite hardware
components.
•Appendix A, “ADSP-BF609 EZ-KIT Lite Bill Of Materials” on
page A-1.
Provides a list of hardware components used to manufacture the
EZ-KIT Lite board.
•Appendix B, “ADSP-BF609 EZ-KIT Lite Schematic” on page B-1.
Lists the resources for board-level debugging.
What’s New in This Manual
This is the first revision (Revision 1.0) of the ADSP-BF609 EZ-KIT Lite
Evaluation System Manual.
xviADSP-BF609 EZ-KIT Lite Evaluation System Manual
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
•Visit the Embedded Processing and DSP products Web site at
•Contact your Analog Devices, Inc. local sales office or authorized
distributor
Preface
•Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
This evaluation system supports Analog Devices ADSP-BF609 Blackfin
embedded processors.
ADSP-BF609 EZ-KIT Lite Evaluation System Manualxvii
Product Information
Product Information
Product information can be obtained from the Analog Devices Web site
and the CCES online help system.
Analog Devices Web Site
The Analog Devices Web site, www.analog.com, provides information
about a broad range of products—analog integrated circuits, amplifiers,
converters, and digital signal processors.
To access a complete technical library for each processor family, go to
http://www.analog.com/processors/technical_library. The manuals
selection opens a list of current manuals related to the product as well as a
link to the previous revisions of the manuals. When locating your manual
title, note a possible errata check mark next to the title that leads to the
current correction report against the manual.
Also note, myAnalog.com is a free feature of the Analog Devices Web site
that allows customization of a Web page to display only the latest information about products you are interested in. You can choose to receive
weekly e-mail notifications containing updates to the Web pages that meet
your interests, including documentation errata against all manuals.
myAnalog.com provides access to books, application notes, data sheets,
code examples, and more.
myAnalog.com (found on the Analog Devices home page) to sign up.
Visit
If you are a registered user, just log on. Your user name is your e-mail
address.
EngineerZone
EngineerZone is a technical support forum from Analog Devices. It allows
you direct access to ADI technical support engineers. You can search
xviiiADSP-BF609 EZ-KIT Lite Evaluation System Manual
Preface
FAQs and technical information to get quick answers to your embedded
processing and DSP design questions.
Use EngineerZone to connect with other DSP developers who face similar
design challenges. You can also use this open forum to share knowledge
and collaborate with the ADI support team and your peers. Visit
http://ez.analog.com to sign up.
Related Documents
For additional information about the product, refer to the following
publications.
Table 1. Related Processor Publications
TitleDescription
ADSP-BF606/ADSP-BF607/ADSP-BF608/
ADSP-BF609 Blackfin Dual Core Embedded
Processor Data Sheet
ADSP-BF60x Blackfin Processor Hardware
Reference
Blackfin Processor Programming ReferenceDescription of all allowed processor assembly
General functional description, pinout, and
timing of the processor
Description of the internal processor architecture and all register functions
instructions
Table 2. Related CCES Publications
TitleDescription
CrossCore Embedded Studio Assembler and
Preprocessor Manual
CrossCore Embedded Studio C/C++ Complier and
Library Manual for Blackfin Processors
CrossCore Embedded Studio Linker and Utilities
Manual
CrossCore Embedded Studio Loader and Utilities
Manual
Description of the assembler functions and
commands
Description of the complier functions and
commands for Blackfin processors
Description of the linker functions and commands
Description of the loader/splitter functions
and commands
ADSP-BF609 EZ-KIT Lite Evaluation System Manualxix
Notation Conventions
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
ExampleDescription
Close command
(File menu)
{this | that}Alternative required items in syntax descriptions appear within curly
[this | that]Optional items in syntax descriptions appear within brackets and sepa-
[this,…]Optional item lists in syntax descriptions appear within brackets delim-
.SECTIONCommands, directives, keywords, and feature names are in text with
filenameNon-keyword placeholders appear in text with italic style format.
Titles in reference sections indicate the location of an item within the
CCES environment’s menu system (for example, the Close command
appears on the File menu).
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
rated by vertical bars; read the example as an optional
ited by commas and terminated with an ellipse; read the example as an
optional comma-separated list of this.
letter gothic font.
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
this or that.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Wa rn in g
appears instead of this symbol.
xxADSP-BF609 EZ-KIT Lite Evaluation System Manual
1USING ADSP-BF609 EZ-KIT
LITE
This chapter provides information to assist you with development of programs for the ADSP-BF609 EZ-KIT Lite evaluation system.
The following topics are covered.
•“Package Contents” on page 1-2
•“ADSP-BF609 EZ-Board” on page 1-3
•“Default Configuration” on page 1-3
•“Supported Operating Systems ” on page 1-5
•“System Requirements” on page 1-5
•“EZ-KIT Lite Installation” on page 1-6
•“EZ-KIT Lite Session Startup” on page 1-7
•“Evaluation License Restrictions” on page 1-10
•“Memory Map” on page 1-10
•“DDR2 SDRAM” on page 1-12
•“SMC Interface” on page 1-13
•“Ethernet Interface” on page 1-13
•“USB OTG HS Interface” on page 1-14
•“CAN Interface” on page 1-14
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-1
Package Contents
•“UART Interface” on page 1-15
•“Rotary Encoder Interface” on page 1-16
•“Temperature Sensor Interface” on page 1-17
•“Link Ports Interface” on page 1-17
•“General-Purpose I/O (GPIO)” on page 1-18
•“JTAG Interface” on page 1-18
•“Power-On-Self Test” on page 1-20
•“Expansion Interface III” on page 1-20
•“Power Architecture” on page 1-21
•“Power Measurements” on page 1-21
•“Example Programs” on page 1-22
•“Reference Design Information” on page 1-22
For information about the CCES graphical user interface (GUI), including the boot loading, target options, and other facilities of the EZ-KIT
Lite system, refer to the online help.
For detailed information about the ADSP-BF609 Blackfin processor, see
documents referred to as Related Documents.
Package Contents
Your ADSP-BF609 EZ-KIT Lite package contains the following items.
•ADSP-BF609 EZ-KIT Lite board
•Standalone debug agent (SADA2)
1-2ADSP-BF609 EZ-KIT Lite Evaluation System Manual
•USB cable
•5 in 1 USB cable kit
•CE approved power supply
•Ethernet cable
•2 GB memory card
•4 nylon standoffs
•4 nylon hex nuts
Using ADSP-BF609 EZ-KIT Lite
Contact the vendor where you purchased your EZ-KIT Lite or contact
Analog Devices, Inc. if any item is missing.
With the standalone debug agent removed, the board can connect
to an Analog Devices emulator: USB, HP-USB, or ICE-100B.
ADSP-BF609 EZ-Board
The product ADSP-BF609 EZ-KIT Lite with the Stand Alone Debug
Agent removed is referred to as the ADSP-BF609 EZ-Board®
The EZ-Board requires an Analog Devices USB-based emulator (USB,
HP-USB, or ICE-100B).
.
Default Configuration
The ADSP-BF609 EZ-KIT Lite board is designed to run as a standalone
unit.
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which can damage some components.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-3
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge)
sensitive devices. Electrostatic charges readily accumulate on the human body
and equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.
Figure 1-1 shows the default jumper and switch settings and LED used in
installation.There are four nylon standoffs in a bag included in the box.
They can be installed in the four corner mounting holes (
MH9) if desired. Place the nylon standoff in the hole and tighten a hex nut
MH1, MH7, MH8,
on each. Confirm that your board is in the default configuration before
using the board.
Figure 1-1. EZ-KIT Lite Hardware Setup
1-4ADSP-BF609 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF609 EZ-KIT Lite
Supported Operating Systems
CCES 1.0.0 is supported on the following operating systems:
•Windows® XP Professional SP3 (32-bit only)
•Windows Vista™ Business, Enterprise, or Ultimate SP2 (32-bit
only)
•Windows 7 Professional, Enterprise, or Ultimate (32- and 64-bit)
Windows Vista and Windows 7 users may experience User Access
Control (UAC) related errors if the software is installed into a protected location, such as Program Files or Program Files (x86).
We recommend installing the software in a non-UAC-protected
location.
System Requirements
Verify that your PC has these minimum requirements for the CCSE 1.0.0
installation:
•2 GHz single-core processor
•1 GB RAM
•8 GB available disk space
•One open USB port
A faster disk drive decreases the build time, especially for a large
amount of source files.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-5
EZ-KIT Lite Installation
EZ-KIT Lite Installation
Follow these instructions to ensure correct operation of the product software and hardware.
Step 1: Attach the provided USB plugs (labeled Mini and Male) to the pro-
vided USB cable.
Step 2: Connect the EZ-KIT Lite board to a personal computer (PC) running CCES.
There are two connection options: using an Analog Devices emulator or
using the standalone debug agent.
Using an Emulator:
1. Plug one side of the assembled USB cable into the USB connector
of the emulator. Plug the other side into a USB port of the PC running CCES.
2. Attach the emulator to the header connector P1 (labeled JTAG) on
the EZ-KIT Lite board.
Using the Debug Agent:
1. Attach the standalone debug agent to connectors P1 and ZP1 of the
EZ-KIT Lite board.
2. Plug one side of the provided USB cable into the USB connector of
the debug agent ZP1 (labeled USB). Plug the other side of the cable
into a USB port of the PC running CCES.
1-6ADSP-BF609 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF609 EZ-KIT Lite
Step 3: Attach the provided cord and appropriate plug to the 5V power
adaptor.
1. Plug the jack-end of the assembled power adaptor into the power
connector
2. Plug the other side of the power adaptor into a power outlet. The
power LED (labeled LED6) lights green when power is applied to
the board.
3. Power the emulator. Plug the jack-end of the assembled power
adaptor into the emulator and plug the other side of the power
adaptor into a power outlet. The ENABLE/POWER indicator
lights green.
Step 4 (if connected through the debug agent): Verify that the yellow
USB monitor LED and the green power LED on the debug agent are both
on. This signifies that the board is communicating properly with the host
PC and ready to run CCES.
P18 (labeled 5V) on the EZ-KIT Lite board.
EZ-KIT Lite Session Startup
It is assumed that the CrossCore Embedded Studio software is installed
and running on your PC.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-7
Note: If you connect the board or emulator first (before installing
CCES) to the PC, the Windows driver wizard may not find the
board drivers.
1. Navigate to the CCES environment via the Start menu.
Note that CCES is not connected to the target board.
EZ-KIT Lite Session Startup
2. Use a debug configuration to connect to the EZ-KIT Lite board.
If a debug configuration exists already, select the appropriate
configuration and click Apply and Debug or Debug. Go to step 9.
To create a debug configuration:
•Click the down arrow next to the little bug icon, select
Debug Configurations, or
•Choose Run > Debug Configurations.
3. (To create a new debug configuration) Select CrossCore Embed-ded Studio Application and click (New launch configuration).
The Select Processor page of the Session Wizard appears on the
screen.
4. Ensure Blackfin is selected in Processor family. In Processor type,
select ADSP-BF609. Click Next.
The Select Connection Type page of the Session Wizard appears
on the screen.
5. Select one of the following:
•For standalone debug agent connections, EZ-KIT Lite and
click Next.
•For emulator connections, Emulator and click Next.
The Select Platform page of the Session Wizard appears on the
screen.
1-8ADSP-BF609 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF609 EZ-KIT Lite
6. Do one of the following:
•For standalone debug agent connections, ensure that the
selected platform is ADSP-BF609 EZ-KIT Lite via Debug Agent.
•For emulator connections, choose the type of emulator that
is connected to the board.
7. Click Finish to close the wizard.
The new debug configuration is created and added to the program(s) to load list.
8. In the Program(s) to load section, choose the program to load
when connecting to the board. If not loading any program upon
connection to the target, do not make any changes.
Note that while connected to the target, there is no way to choose a
program to download. To load a program once connected, terminate the session.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-9
To delete a configuration, go to the Debug Configurations dialog
box and select the configuration to delete. Click and choose Yes
when asked if you wish to delete the selected launch configuration.
Then Close the dialog box.
To disconnect from the target board, click the terminate button
(red box) or choose Run > Terminate.
To delete a session, choose Target > Session > Session List. Select
the session name from the list and click Delete. Click OK.
Evaluation License Restrictions
Evaluation License Restrictions
The ADSP-BF609 EZ-KIT Lite software is part of the EZ-Board BSP
(Board Support Package) for the Blackfin ADSP-BF60x family. The
EZ-KIT Lite is a licensed product that offers an unrestricted evaluation
license for 90 days after activation. Once the evaluation period ends, the
evaluation license becomes permanently disabled. If the evaluation license
is installed but not activated, it allows 10 days of unrestricted use and then
becomes disabled. The license can be re-enabled by activation.
An evaluation license can be upgraded to a full license. Licenses can be
purchased from:
•Analog Devices directly. Call (800) 262-5645 or 781-937-2384 or
go to:
•Analog Devices, Inc. local sales office or authorized distributor. To
locate one, go to:
http://www.analog.com/salesdir/continent.asp.
The EZ-KIT Lite hardware must be connected and powered up to
use CCES with a valid evaluation or full license.
Memory Map
The ADSP-BF609 processor has a single unified 4G memory space for
instructions and data storage. See Figure 1-2. The processor’s memory
details can be found in the ADSP-BF60x Blackfin Processor Hardware Reference.
1-10ADSP-BF609 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF609 EZ-KIT Lite
Figure 1-2. ADSP-BF609 Processor Memory Map
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-11
DDR2 SDRAM
The board has a 16M x 16-bit burst flash memory connected to the processor’s Static Memory Controller (SMC). The processor also is connected
to a 32 Mb quad serial flash memory via the Serial Peripheral Interface
(SPI). Both flash memories can be used for non-volatile data storage and
processor boot.
DDR2 SDRAM
The ADSP-BF609 processor connects to a 128 MB Micron
MT47H64M16HR-3 chip through the Double Data Rate Synchronous
Dynamic Random-Access Memory (DDR2 SDRAM) controller. The
DDR2 memory controller on the processor and DDR2 memory chip are
powered by the on-board 1.8V regulator. Data is transferred between the
processor and DDR2 on both the rising and falling edges of the DDR2
clock. The DDR2 controller on the processor can operate at a maximum
clock frequency of 250 MHz.
With a CCES session running and connected to the EZ-KIT Lite via the
USB standalone debug agent, the DDR2 registers are configured automatically each time the processor is reset. The values are used whenever
DDR2 is accessed through the debugger (for example, when viewing
memory or loading a program).
To disable the automatic setting of the DDR2 registers, select Target
Options from the Session menu in CCES and uncheck Use XML reset
values.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to setup and access the DDR2 interface. For more
information on how to initialize the registers after a reset, refer to the
hardware reference manual.
1-12ADSP-BF609 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF609 EZ-KIT Lite
SPI Interface
The ADSP-BF609 processor has two SPI interfaces, SPI0 and SPI1. SPI0 is
connected to a Winbond W25Q32BV 32 Mb serial flash memory with
dual and quad SPI support.
Quad mode is enabled by default. The processor flag signals, PD00 and
PD01 (SPI0 D2 and D3), can be disconnected by using SoftConfig. Refer to
“Software-Controlled Switches (SoftConfig)” on page 2-3 for more infor-
mation. By default, the SPI0 chip select 1 is connected to the memory
device. This can also be disconnected by using SoftConfig.
SMC Interface
The Static Memory Controller (SMC) interface of the ADSP-BF609
EZ-KIT Lite contains a 32 MB (16M x 16) Numonyx PC28F128P33B
parallel flash chip. Flash memory is connected to the 16-bit data bus and
address lines 1–23. Chip enable is decoded by using SMC0_AMS0.
The flash memory is bottom boot and provides One-Time-Programmable
(OTP) memory.
Flash memory is pre-loaded with boot code for the POST program. For
more information, refer to “Power-On-Self Test” on page 1-20.
Ethernet Interface
The ADSP-BF609 processor has two Reduced Media Independent Interfaces (RMIIs), one of which connects to an external Ethernet PHY device.
The EZ-KIT Lite provides a National DP83848C, Auto-MDIX, fully
compliant PHY with IEEE 802.2/802.2u standards. The PHY supports
10BASE-T and 100BASE-TX operations. The PHY and processor support
IEEE 1588 time stamping, available on the EZ-KIT Lite via a standard
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-13
USB OTG HS Interface
RJ-45 connector. For more information, see “Ethernet Connector (J1)”
on page 2-27.
The MAC address is stored in parallel flash (U44) at address 0x0106
0000, and can be found on a sticker on the bottom side of the board.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to use the Ethernet interface.
If a program is written over this area of the flash, the MAC address
will be lost.
USB OTG HS Interface
The ADSP-BF609 processor has an integrated USB PHY, and the
EZ-KIT Lite provides a mini AB connector. A 48 MHz oscillator provides
the clocking for the high-speed USB 2.0 On-the-Go (OTG) interface.
The board allows 5V at 500 mA to a peripheral by enabling the FET
switch U50. The USB controller has native support for controlling the
FET through the USB_VBC signal.
A test point also is provided for the USB clock input of the processor. A
user can remove the series resistor and feed an external clock from a function generator.
Use the example programs in the EZ-KIT Lite installation directory to
learn about the processor’s device and host modes. For more information,
refer to the ADSP-BF60x Blackfin Processor Hardware Reference.
CAN Interface
The Controller Area Network (CAN) interface of the EZ-KIT Lite is connected to the NXP TJA1041 high-speed CAN transceiver. The transceiver
1-14ADSP-BF609 EZ-KIT Lite Evaluation System Manual
Using ADSP-BF609 EZ-KIT Lite
is attached to the CAN0 port of the ADSP-BF609 processor via an RJ-11
connector. See “CAN Connector (J4)” on page 2-27.
The
PE02 programmable flag connects to the error and power on indica-
tion output of the CAN transceiver, CAN0. The transmit and receive pins
of the transceiver are connected to the dedicated CAN0 transmit and receive
pins of the processor.
To disconnect the CAN IC signals CAN0RX and CAN0_ERR, change the
appropriate settings via SoftConfig. See “Software-Controlled Switches
(SoftConfig)” on page 2-3.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate CAN circuit operation.
UART Interface
The ADSP-BF609 processor has two built-in universal asynchronous
transmitters (UARTs), with only UART0 connected to a UART line transmitter. UART0 has full RS-232 functionality via the Analog Devices
ADM3315 line driver and receiver (U39).
Pin PD07/UART0_TX/TM0_ACI3 of the processor is connected to the
ADM3315 device directly. Pin PD08/UART0_RX/TM0_ACI0 is connected as
well by the default setting of SoftConfig. (This can be changed by the
SoftConfig switch).
By default, UART0
RTS and CTS signals are not connected (but can be
through SoftConfig). The SoftConfig switches also allow the loopback of
CTS and RTS. UART CTS can be added as an input to the reset circuit
through SoftConfig. Pins 1, 4 and 6 of the UART connector (
J2) can be
enabled as an input to the on-board reset circuit through SoftConfig.
Refer to “Software-Controlled Switches (SoftConfig)” on page 2-3 for
more information.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-15
SD Interface
An example program demonstrating UART0 in POST is included in the
EZ-KIT Lite installation directory. Note that the loopback of
data is done through an external connector.
TX and RX
SD Interface
The ADSP-BF609 processor has a secure digital (SD) interface. The SD
interface consists of a clock pin, command pin, card detect pin, write protect pin, and an 8-bit data bus. SoftConfig controls the connection of
processor pins PG10 and PG13 to the card detect and write protect features
of the SD interface. Refer to “Software-Controlled Switches (SoftConfig)”
on page 2-3 and “SD Connector (J5)” on page 2-27for more details.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to set up and access the SD interface.
Rotary Encoder Interface
The ADSP-BF609 processor has a built-in, up-down counter with support
for a rotary encoder. The three-wire rotary encoder interface connects to
the rotary switch (SW9). The rotary encoder can be turned clockwise for
the up function, counter clockwise for the down function, or can be
pushed towards the center of the board to clear the counter.
The rotary switch is a two-bit quadrature (gray code) counter with detent,
meaning that both the down signal (
gle when the count register increases on a rotation to the right. Upon
rotating to the left,
decreases.
If the processor pins are needed on the expansion interface III, disconnect
the rotary encoder switch via SoftConfig. See “Software-Controlled
Switches (SoftConfig)” on page 2-3 for details.
1-16ADSP-BF609 EZ-KIT Lite Evaluation System Manual
CNT0_DG and CNT0_UD toggle, and the overall count
CNT0_DG) and up signal (CNT0_UD) tog-
Using ADSP-BF609 EZ-KIT Lite
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how to set up and access the rotary encoder.
Temperature Sensor Interface
Two external pins (SYS_TDA and SYS_TDK) of the processor are connected
to an internal thermal diode. The EZ-KIT Lite uses ON Semiconductor
ADM1032 digital thermometer and under/over temperature alarm to
monitor the processor’s temperature as well as the thermal diodes inside
the ADM1032 device. The thermometer uses the I2C bus and flag pins of
the processor. The following software-controlled signals are used for temperature monitoring.
•TEMP_IRQ_EN (programmable flag pin PG9)
•TEMP_THERM_EN (programmable flag pin PB15)
The thermal limit flag is connected to an LED (LED5) for a visual alarm if
the temp exceeds the limit. The thermal limit flag and ADM1032 IRQ
connect to flag pins of the processor, but are nonessential for temperature
monitoring. Consequently, the software-controlled switches have these
signals disconnected from the ADSP-BF609 processor by default.
See “Thermal Limit LED (LED5)” on page 2-23 and “Software-Con-
trolled Switches (SoftConfig)” on page 2-3 for more information.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate temperature sensor operations.
Link Ports Interface
The ADSP-BF609 processor has four dedicated link ports. Each link port
has a clock pin, an acknowledgment pin, and eight data pins. The ports
can operate at up to 83 MHz and act as either a receiver or a transmitter.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-17
General-Purpose I/O (GPIO)
The ports are used to interface gluelessly to other ADSP-BF609 processors
which also have the link ports pins brought out.
The EZ-KIT Lite enables access to link ports 0 and 1 (referred to as
and LP1 in schematics) via connectors P8 and J3, respectively. Two
ADSP-BF609 EZ-KIT Lites can mate gluelessly via the link port connectors. The processors communicate via the link ports, all while performing
independent tasks on each of the EZ-KIT Lite. To loopback the link port
connectors on one EZ-KIT Lite or connect three or more EZ-KIT Lites,
obtain a standard, off the shelf connector from Samtec. For more information, see “Link Port /JTAG Connectors (J3 and P8)” on page 2-25.
By default, the EZ-KIT Lite boots from the parallel flash memory. Link
port 0 can be selected as the boot source by setting the boot mode select
switch (SW2) to position 6. See “Boot Mode Select Switch (SW2)” on
page 2-19.
General-Purpose I/O (GPIO)
Four LEDs are available via programmable pins PG14, PG15, PE14, and
PB11. The connections are on by default and can be shut off through
SoftConfig.
Two push buttons are available on programmable flags PB10 and PE01.
The push buttons are connected to the processor by default. Use SoftConfig to disconnect the push buttons. Refer to “Software-Controlled
Switches (SoftConfig)” on page 2-3 for more information.
LP0
JTAG Interface
The EZ-KIT Lite design enables a multi-processor JTAG session using
connectors
mode. In single-processor mode, create a CCES session based on a standalone debug agent or an external emulator. To use the EZ-KIT Lite in
1-18ADSP-BF609 EZ-KIT Lite Evaluation System Manual
P8 and J3. By default, the board is set up in single-processor
Using ADSP-BF609 EZ-KIT Lite
multi-processor mode, install an external emulator. Only one external
emulator is required for the main EZ-KIT Lite; other EZ-KIT Lites in the
JTAG chain do not require an emulator. In this mode, create a CCES
platform based on the number of JTAG devices in the JTAG chain using
the CCES Target Configurator. Then create a session for the EZ-KIT Lite
based on the newly created platform.
For a dual ADSP-BF609 EZ-KIT Lite session, connect two EZ-KIT Lites
via connectors
J3 and P8. Flip one of the two EZ-KIT Lites by
180 degrees to allow the boards to mate. To switch between single- and
multi-processor modes, use DIP switches SW1 and SW3-5. The switch settings can be found in “JTAG Interface Switches (SW1, SW3–5)” on
page 2-18.
For three or more ADSP-BF609 EZ-KIT Lite sessions, connect each of
the boards with JTAG cables. The cables connect JTAG pins of each
board and put the EZ-KIT Lites in a JTAG serial chain. For three EZ-KIT
Lites, three JTAG cables are required. Similarly, for four EZ-KIT Lites,
four JTAG cables are required. Note that each respective EZ-KIT Lite
board also requires its own power supply.
The standalone debug agent can be replaced by an external emulator, such
as the Analog Devices high-performance USB-based emulator. Be careful
not to damage the connectors when removing the debug agent. The emulator is connected to P1 on the top side of the board. See “EZ-KIT Lite
Installation” on page 1-6 for more information.
Part numbers for Samtec standard, off the shelf link port cables can be
found in “Link Port /JTAG Connectors (J3 and P8)” on page 2-25.
For more information about emulators, contact Analog Devices or go to:
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-19
Power-On-Self Test
Power-On-Self Test
The Power-On-Self-Test Program (POST) tests all EZ-KIT Lite peripherals and validates functionality as well as connectivity to the processor.
Once assembled, each EZ-KIT Lite if fully tested for an extended period
of time with POST. All EZ-KIT Lite boards are shipped with POST preloaded into one of their on-board flash memories. The POST is executed
by resetting the board and pressing the proper push button(s). The POST
also can be used as a reference for a custom software design or hardware
troubleshooting. Note that the source code for the POST program is
included in the EZ-KIT Lite installation directory along with the
readme.txt file, which describes how the board is configured to run
POST.
Expansion Interface III
The Expansion Interface III (EI3) allows an Analog Devices
EZ-Extender® or a custom-design daughter board to be tested across various hardware platforms that have the same expansion interface.
The EI3 implemented on the ADSP-BF609 EZ-KIT Lite consists of five
connectors, P1A, P1B, P1C, P2A, and P3A. The connectors contain a majority of the processor's signals. For pinout information, go to “ADSP-BF609
EZ-KIT Lite Schematic” on page B-1. The mechanical dimensions of the
expansion connectors can be obtained by contacting “Technical or Cus-
tomer Support”.
For more information about daughter boards, visit the Analog Devices
Web site at:
Limits to current and interface speed must be taken into consideration
when using the EI3. Current for the EI3 can be sourced from the EZ-KIT
1-20ADSP-BF609 EZ-KIT Lite Evaluation System Manual
.
Using ADSP-BF609 EZ-KIT Lite
Lite; therefore, the current should be limited to 200 mA for 5V and
300 mA for the 3.3V planes. If more current is required, then a separate
power connector and a regulator must be designed on the daughter card.
Additional circuitry can add extra loading to signals, decreasing their maximum effective speed.
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
Power Architecture
The ADSP-BF609 EZ-KIT Lite has three primary voltage domains: 3.3V,
1.25V and 1.8V.
The Analog Devices ADP1864 controller provides 3.3V for the VDD_USB,
VDD_EXT, and the 3.3V power requirements of the board. The Analog
Devices ADP1715 regulator provides 1.8V for VDD_DMC. The processor’s
VDD_INT is regulated to 1.25V by the ADP2119 controller.
Power Measurements
Locations are provided for measuring the current draw from various power
planes. Precision 0.05 ohm shunt resistors are available on the
VDD_INT, VDD_DDR2, VDD_USB, 3.3V, and USB_VBUS voltage domains. For
current draw, the jumper is removed, voltage across the resistor can be
measured using an oscilloscope, and the value of the resistor can be measured using a precision multi-meter. Once voltage and resistance are
measured, the current can be calculated by dividing the voltage by the
resistance. For the highest accuracy, a differential probe should be used for
measuring the voltage across the resistor. For more information, refer to
“Power Jumpers” on page 2-21.
VDD_EXT,
ADSP-BF609 EZ-KIT Lite Evaluation System Manual1-21
Example Programs
Example Programs
Example programs are provided with the ADSP-BF609 EZ-KIT Lite to
demonstrate various capabilities of the product. The programs are
installed with CCES and can be found in the CrossCore Embedded Studio directory. Refer to a readme file provided with each example for more
information.
Reference Design Information
A reference design info package is available for download on the Analog
Devices Web site. The package provides information on the design, layout, fabrication, and assembly of the EZ-KIT Lite.
1-22ADSP-BF609 EZ-KIT Lite Evaluation System Manual
2ADSP-BF609 EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-BF609 EZ-KIT
Lite board.
The following topics are covered.
•“System Architecture” on page 2-2
Describes the board’s configuration and explains how the board
components interface with the processor.
•“Software-Controlled Switches (SoftConfig)” on page 2-3
Lists and describes the processor signals routed through the software-controlled switches.
•“Push Buttons and Switches” on page 2-17
Shows the locations and describes the push buttons and switches.
•“Power Jumpers” on page 2-21
Shows the locations and describes the configuration jumpers.
•“LEDs” on page 2-22
Shows the locations and describes the LEDs.
•“Connectors” on page 2-24
Shows the locations and provides part numbers for the on-board
connectors. In addition, the manufacturer and part number information is provided for the mating parts.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-1
System Architecture
ADSP-BF609
500 MHz
Dual Core
349-lead LFBGA
0.80mm 19x19mm pkg
JTAG
Port
25 MHz
Oscillator
Power
Regulation
SMC0
32 MB
Burst Flash
(16M x 16 )
CLK
JTAG
Conn
Quad SPI
Flash
32Mb
ADM3315
RS232
DB9
Conn
5V
PWR
IN
3.30V (Adjustable)
1.25V (Adjustable)
Expansion Interface III
PBs/LEDs
Ext
Clock
Test Point/
Crystal
128 MB
DDR2
(64M x 16)
DDR2
USB OTG
Circuitry
Ethernet
RMII
PHY
SD/MMC
Conn
Rotary
Encoder
Conn
ADM1032
Temp
Sensor
CAN
RJ11
Conn
TJA 1041
Transceiver
10/100
MAC
SPI
RJ45
CONN
USB
Mini
Conn
USB
2.0
(HS)
Temp
Sensor /
TWI
MMC
RSI
GP
COUNTER
GPIOs
CAN
2.0
UART
Link
Ports
1.80V (Adjustable)
Serial
Ports
EPPI
Ports
Link Port 0/
MPJTAG Out
Conn
DIP
SWTs
Link Port 1 /
MPJTAG In
Conn
EPPIs
UART
SPI
Power
ACMPWM
TWI
EBIU
Serial
Ports
GPIOs
USB
CLK
48 MHz
Oscillator
Ext
Clock
Test Point/
Crystal
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (Figure 2-1).
Figure 2-1. EZ-KIT Lite Block Diagram
The EZ-KIT Lite is designed to demonstrate the ADSP-BF609 Blackfin
processor’s capabilities.
The clock rate can be set up on the fly by the processor. The input clock is
25 MHz. The core clock runs at a maximum of 500 MHz. The default
boot mode for the processor is parallel flash boot. See “Boot Mode Select
Switch (SW2)” on page 2-19 for information on how to change the
default boot mode.
2-2ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
Software-Controlled Switches
(SoftConfig)
On the ADSP-BF609 EZ-KIT Lite, most of the traditional mechanical
switches have been replaced by I2C software-controlled switches. The
remaining mechanical switches are provided for setting up a single- or
multiprocessor JTAG session, changing the boot mode, and push buttons.
Reference any SoftConfig*.c file found in the installation directory of
CCES for an example of how to set up the SoftConfig feature of the
ADSP-BF609 EZ-KIT Lite through software.
The SoftConfig section of this manual serves as a reference to any user
that intends to modify an existing software example. If software provided
from ADI is used there should be little need to reference this section.
Care should be taken when changing SoftConfig settings not to
create a conflict with interfaces. This is especially true when connecting extender cards. There is one possible conflict on the
EZ-KIT Lite when using SoftConfig—the wake push button must
be disconnected when using the SD card interface. The wake push
button is disabled by default, but if making changes, the signal
~WAKE_PUSHBUTTON_EN must be set to high if the SD card function is
desired.
Overview of SoftConfig
In order to further clarify the use of electronic single FET switches and
multi-channel bus switches, an example of each is illustrated and compared to a traditional mechanical switching solution. This is a generic
example that uses the same FET and bus switch components that are on
the EZ-KIT Lite. After this generic discussion there is a detailed explanation of the SoftConfig interface specific to the ADSP-BF609 EZ-KIT
Lite.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-3
Software-Controlled Switches (SoftConfig)
Figure 2-2 shows two individual FET switches (Pericom PI3A125CEX)
with reference designators UA and UB. Net names
B
control UA and UB. The default FET switch enable settings in this
ENABLE_A and ENABLE_
example are controlled by resistors RA and RB which pull the enable pin 1
of UA and UB to ground (low). In a real example, these enable signals are
controlled by the Microchip IO expander. The default pull-down resistors
connects the signals EXAMPLE_SIGNAL_A and EXAMPLE_SIGNAL_B and also
connects signals EXAMPLE_SIGNAL_C and EXAMPLE_SIGNAL_D. To disconnect
EXAMPLE_SIGNAL_A from EXAMPLE_SIGNAL_B, the Microchip IO expander is
used to change ENABLE_A to a logic 1 through software that interfaces with
the Microchip. The same procedure for ENABLE_B would disconnect
EXAMPLE_SIGNAL_C from EXAMPLE_SIGNAL_D.
Figure 2-2. Example of Individual FET Switches
Figure 2-3 shows the equivalent circuit to Figure 2-2 but utilizes mechan-
ical switches that are in the same package. Notice the default is shown by
black boxes located closer to the ON label of the switches. In order to disconnect these switches, physically move the switch to the
OFF position.
2-4ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
Figure 2-3. Example of Mechanical Switch Equivalent to Figure 2-2
Figure 2-4 shows a bus switch example, reference designator UC (Pericom
PI3LVD512ZHE), selecting between lettered functionality and numbered
functionality. The signals on the left side are multiplexed signals with
naming convention
letter_number. The right side of the circuit shows the
signals separated into letter and number, with the number on the lower
group (eg. 0B1) and the letter on the upper group (eg. 0B2). The default
setting is controlled by the signal CONTROL_LETTER_NUMBER which is pulled
low. This selects the number signals on the right to be connected to the
multiplexed signals on the left by default. In this example, the Microchip
IO expander is not shown but controls the signal CONTROL_LETTER_NUMBER
and allows the user to change the selection through software.
Figure 2-5 shows the equivalent circuit to Figure 2-4 but utilizes mechan-
ical switches. Notice the default for reference designators SWC and SWD is
illustrated by black boxes located closer to the ON label of the switches to
enable the number signals by default. Also notice the default setting for
reference designators
SWE and SWF is OFF. In order to connect the letters
instead of the numbers, the user physically changes all switches on SWC and
SWD to the OFF position and all switches on SWE and SEF to the ON position.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-5
Software-Controlled Switches (SoftConfig)
Figure 2-4. Example of Bus Switch
2-6ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
Figure 2-5. Example of Mechanical Switch Equivalent to Figure 2-4
SoftConfig on the ADSP-BF609 EZ-KIT LITE
The Microchip MCP23017 GPIO expander provides control for individual and 10-bit electronic switches. The TWI0 interface of the processor
communicates with the Microchip device. Two 10-bit switches, U40-41
are connected to the link port 1 and 0 interfaces, respectively. There are
an additional 27 individual switches with default settings that enable basic
board functionality.
Table 2-1 lists the ADSP-BF609 processor and EZ-KIT Lite interfaces
that are available by default. Note that only interfaces affected by software
switches are listed in Table 2-1.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-7
2-8ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
•By default, the Microchip MCP23017 GPIO signals function as
input signals.
The signals must be programmed as output signals to override their
default values. The following table shows the Microchip register
addresses and the values that must be written to them to program
the signals as output signals.
IODIR Register IODIR Register Address Value to be Written to Program Signals
as Outputs
IODIRA0x000
IODIRB0x010
Each of the examples in Cross Core Embedded Studio include source files
that program the soft switches, even if the default settings are being used.
The
README for each example identifies only the signals that are being
changed from their default values. The code that programs the soft
switches is located in the SoftConfig_BF609.c file in each example.
The following tables (Table 2-2, Table 2-3, and Table 2-4) outline the
default values for each of the three Microchip MCP23017 devices.
Table 2-2. I2C Hardware Address 0x21
GPIOMCP23017 Register AddressDefault Value
GPIOA0x120x07
GPIOB0x130xFC
Table 2-3. I2C Hardware Address 0x22
GPIOMCP23017 Register AddressDefault Value
GPIOA0x120x0A
GPIOB0x130x00
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-9
Software-Controlled Switches (SoftConfig)
Table 2-4. I2C Hardware Address 0x23
GPIOMCP23017 Register AddressDefault Value
GPIOA0x120x00
GPIOB0x130x00
Page 12 of the “ADSP-BF609 EZ-KIT Lite Schematic” on page B-1
shows how the three Microchip GPIO expanders are connected to the
board’s ICs.
U41, a 10-bit bus switch, connects the link port 0 processor interface to J3
(link port connector) when the select input signal (pin 12) is high. By
default, the U41 select input is controlled by the boot mode switch (SW2).
When the boot mode switch is set to 1 (parallel flash boot), the select line
is high, enabling the system memory controller (SMC) signals, connected
through pins PA0-7 and PB0-1 of the processor. Setting the boot mode
switch to 6 (link port boot) drives the select line low and enables the link
port 0 connection to the J3 connector.
The U41 output selection, which is based on the boot mode selection, can
be overridden by the Microchip (U46) signal GPA0. This override is useful
in a case where the application needs to boot from parallel flash but then
use the link port 0 afterwards. After setting the signal high (to disable
U29), use GPA3 to control the output of U41.
The processor signals connected to
U41 can be disconnected from the link
port to support other features. The selection line must be low in order to
disconnect the signals from the link port connector
J3. This allows the
signals to connect to the on-board parallel flash memory and EI3 connectors. See “ADSP-BF609 EZ-KIT Lite Schematic” on page B-1 for details.
2-10ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
U40, a 10-bit bus switch, controls the link port 1 connection to P8 (link
port connector), EI3 (expansion interface), and SMC address signals. The
default setting is high, which connects the SMC address bus to the parallel
flash memory and connects the link port pins PA8-15 and PB2-3 to the
expansion interface. The link port 1 can be selected by setting U46 signal
GPA1 low.
Table 2-5 and Table 2-6 show the output signals of the Microchip GPIO
expander (U45), with a TWI address of 0100 001X, where X represents the
read or write bit. The signals that control an individual FET have an entry
under the FET column. The Component Connected column shows the
board IC that is connected if the FET is enabled. Note that some of the
Microchip (U45) output signals are connected directly to components on
the board. However, in most cases, the Microchip (U45) is controlling the
enable signal of a FET switch. Also note that if a particular functionality
of the processor signal is being used, it will be in bold font under the “Processor Signal” column.
Table 2-5. Output Signals of Microchip GPIO Expander
(U45 Port A)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
0
CAN_ENEnable CAN IC, enabled by
default
1
~CAN_STBCAN standby control input U55High
~CAN0_ERR_ENGPIO PE02 for CAN0 error U33 PE02/SPI1_
2
RDY/PPI0_
D22/SPT1_ACLK
~CAN0RX_ENCAN0RX connected to
3
CAN IC U55
~CNT0UD_ENRotary counter 0 count up
4
connected to rotary connector
U34 PG04/SPT2_
ACLK/TM0_
TMR1/
CAN0_
/TM0_ACI2
RX
U30 PG11/SPT2_
BD1/TM0_
TMR6/CNT0_UD
Component
Connected
U55High
U55High
U55Low
SW9Low
Default
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-11
Software-Controlled Switches (SoftConfig)
Table 2-5. Output Signals of Microchip GPIO Expander
(U45 Port A) (Cont’d)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
5~CNT0DG_ENRotary counter 0 count
down connected to rotary
connector
6
~CNT0ZM_ENRotary counter 0 count zero
connected to rotary connector
7
RMII_CLK_ENRMII clock for EMAC0 dis-
U31 PG12/SPT2_
BD0/TM0_
TMR7/CNT0_DG
U32 PG07/SPT2_
BFS/TM0_
TMR5/CNT0_ZM
abled
Table 2-6. Output Signals of Microchip GPIO Expander
(U45 Port B)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
0
~UART0RTS_ENUART0 RTS connected to
UART transceiver U39
1
~UART0RX_ENUART0 RX connected to
UART transceiver U39
2
~UART0CTS_ENUART0 CTS disconnected
from UART transceiver U39
by default
U21 PD09/~SPI0_
SEL5/UART0_
/SPI1_SEL4
RTS
U20 PD08/~UART0_
RX~/TM0_ACI0
U19 PD10/SPI0_
~UART0_
RDY/
CTS/SPI1_SEL3
Component
Default
Connected
SW9Low
SW9Low
U43Low
Component
Default
Connected
U39Low
U39Low
U39
High
3
~UART0CTS_RTS_LPBK UART0 CTS and RTS not
U18High
connected. Change to low
for looping back UART0
CTS and RTS signals
4
~UART0CTS_RST_ENUART0 CTS signal not con-
U17High
nected to input of reset IC
(U48)
2-12ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
Table 2-6. Output Signals of Microchip GPIO Expander
(U45 Port B) (Cont’d)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
5~UART0CTS_146_ENAllows pins 1, 4 and 6 of
UART connector (J2) to be
connected together and used
as input to reset IC (U48).
This is disabled by default.
6~TEMP_IRQ_ENPG09 can be used as TEMP
interrupt, disconnected by
default
7
~TEMP_THERM_ENPB15 can be used as TEMP
thermal limit, disconnected
by default
U16High
U9PG09/SPT2_
AD0/TM0_TMR4
U10 PB15/ETH0_
PTPPPS/PPI1_FS3
Component
Connected
U54High
U54High
Table 2-7 and Table 2-8 show the output signals of the Microchip GPIO
expander (
U46), with a TWI address of 0100 010X, where X represents the
read or write bit. The signals that control an individual FET have an entry
under the FET column. The Component Connected column shows the
board IC that is connected if the FET is enabled. Note that some of the
Microchip (U46) output signals are connected directly to components on
the board. However, in most cases, the Microchip (U46) is controlling the
enable signal of a FET switch. Also note that if a particular functionality
of the processor signal is being used, it will be in bold font under the “Processor Signal” column.
Default
Table 2-7. Output Signals of Microchip GPIO Expander
(U46 Port A)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
0
OVERRIDE_SMC0_LP0_BOOT Overrides U41 selectU29Low
SMC0_EPPI2_LP1_SWITCHControls U40 select line U28High
1
Component
Connected
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-13
Default
Software-Controlled Switches (SoftConfig)
Table 2-7. Output Signals of Microchip GPIO Expander
(U46 Port A) (Cont’d)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
3SMC0_LP0_ENControls U41 select if
U28High
Override High
4
~LED1_GPIO_ENPG14 is used as GPIO
output for LED1,
enabled by default
5
~LED2_GPIO_ENPG15 is used as GPIO
output for LED2,
enabled by default
6~LED3_GPIO_ENPE14 is used as GPIO
output for LED3,
enabled by default
7
~LED4_GPIO_ENPB11 is used as GPIO
output for LED4,
enabled by default
U27 PG14/~UART1_
RX~/~SYS_
IDLE1~/TM0_ACI1
U26 PG15/~UART1_
TX/SYS_
IDLE0~/SYS_
SLEEP/TM0_ACI4
U25 PE14/ETH1_
RXERR/SPT2_
ATDV/TM0_TMR0
U24 PB11/SMC0_
A25/SPT0_
BD0/TM0_ACLK3
Table 2-8. Output Signals of Microchip GPIO Expander
(U46 Port B)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
~PUSHBUTTON1_ENPB10 is used as GPIO
0
input for push button 1,
enabled by default
1
~PUSHBUTTON2_ENPE01 is used as GPIO
input for push button 2,
enabled by default
2
~SD_CD_ENSD memory card detect
connected to GPIO
PG10, enabled by
default
U23 PB10/SMC0_
A24/SPT0_
BD1/TM0_ACLK0
U22 PE01/SPI1_
D2/PPI0_
D19/SPT1_BD0
U15 PG10/~UART1_
RTS~/SPT2_BCLK
Component
Default
Connected
LED1Low
LED2Low
LED3Low
LED4Low
Component
Default
Connected
SW6Low
SW7Low
J5Low
2-14ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
Table 2-8. Output Signals of Microchip GPIO Expander
(U46 Port B) (Cont’d)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
3~SD_WP_ENSD memory write pro-
tect connected to GPIO
PG10, enabled by
default
4
~SPIFLASH_CS_ENSPI flash chip select
SPI0SEL1 connection to
U38 SPI flash, connected
by default
5~SPI0D2_ENSPI flash data 2 connec-
tion to U38 SPI flash,
connected by default.
This is needed for quad
access mode.
6
~SPI0D3_ENSPI flash data 3 connec-
tion to U38 SPI flash,
connected by default.
This is needed for quad
access mode.
U14 PG13/~UART1_
CTS~/TM0_CLK
U13 PD11/~SPI0_
/SPI0_SS
SEL1
U12 PD00/SPI0_
D2/PPI1_
D16/~SPI0_SEL3
U16 PD01/SPI0_
/PPI1_
D3
D17/~SPI0_SEL2
Component
Connected
J5Low
U38Low
U38Low
U38Low
Table 2-9 and Table 2-10 show the output signals of the Microchip GPIO
expander (
U47), with a TWI address of 0100 011X, where X represents the
read or write bit. The signals that control an individual FET have an entry
under the FET column. The Component Connected column shows the
board IC that is connected if the FET is enabled.Note that some of the
Microchip (
U47) output signals are connected directly to components on
the board. However, in most cases, the Microchip (U47) is controlling the
enable signal of a FET switch. Also note that if a particular functionality
of the processor signal is being used, it will be in bold font under the “Processor Signal” column.
Default
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-15
Software-Controlled Switches (SoftConfig)
Table 2-9. Output Signals of Microchip GPIO Expander (U47 Port A)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
0
PHYINT_EN
1
Connects Ethernet 0
interrupt signal to
Ethernet PHY, con-
U35 PD06/~ETH0_
PHYINT~/PPI1_
FS2/TM0_ACI5
nected by default
1
PHY_PWR_DWN_INT
2
Controls power down
of the Ethernet PHY if
PHYINT_EN high
PHYAD0
3
Allows the PHY to be
2
placed in isolate mode
3
~ETHERNET_ENDisconnects EMAC0
signals from U49
~WAKE_PUSHBUTTON_EN Enables push button
4
input to processor
~PD0_SPI0D2_
5
EPPI1D16_SPI0SEL3_
EI3_EN
6
~PD1_SPI0D3_
EPPI1D17_SPI0SEL2_
EI3_EN
7
~PD2_SPI0MISO_EI3_
EN
Connects processor signal to EI3 connectors,
disabled by default
Connects processor signal to EI3 connectors,
disabled by default
Connects processor signal to EI3 connectors,
U7PE12/~ETH1_
PHYINT~/PWM1_
CL/RSI0_D5
U36 PD00/SPI0_
D2/PPI1_
D16/~SPI0_SEL3
U51 PD01/SPI0_
D3/PPI1_
D17/~SPI0_SEL2
U57 PD02/SPI0_MISOEI3High
disabled by default
Component
Default
Connected
U49Low
U49High-Z
U49High-Z
U4/U5Low
U1High
EI3High
EI3High
1 This is an active low signal but the signal name does not show this.
2 This signal defaults to an input setting, putting the signal in High-Z. Must be used in concert with
PHYINT_EN. Set PHYINT_EN high first and then control PHY_PWR_DWN_INT.
3 This signal defaults to an input setting, putting the signal in High-Z. There is a 2.21k resistor pull-up,
which sets the PHY address appropriately. If isolate mode is desired, the signal needs to be set as an output and driven appropriately.
2-16ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
Table 2-10. Output Signals of Microchip GPIO Expander (U47 Port B)
Bit Signal NameDescriptionFET Processor Signal
(if applicable)
0
~PD3_SPI0MOSI_EI3_EN Connects processor sig-
nal to EI3 connectors,
disabled by default
1
~PD4_SPI0CK_EI3_ENConnects processor sig-
nal to EI3 connectors,
disabled by default
U56 PD03/SPI0_MOSI EI3High
U58 PD04/SPI0_CLKEI3High
Component
Connected
Push Buttons and Switches
This section describes operation of the push buttons and switches. The
push button and switch locations are shown in Figure 2-6.
Default
Figure 2-6. Push Button and Switch Locations
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-17
Push Buttons and Switches
JTAG Interface Switches (SW1, SW3–5)
The JTAG switches (SW1, SW3, SW4, and SW5) select between a single-processor (one board) and multi-processor (more than one board)
configurations. By default, the four DIP switches are set up for a single
EZ-KIT Lite configuration. See Table 2-11.
The default configuration applies to either a debug agent or an external
emulator, such as the Analog Devices high-performance USB-based emulator (HP-USB) or ICE-100B emulator.
To use an external emulator and multiple EZ-KIT Lites simultaneously in
one CrossCore Embedded Studio (CCES) multi-processor session, set up
the boards as shown in Table 2-12. Attach the boards to each other via
connectors J3 and P8. For two EZ-KIT Lites, no external cables are
required. For three or more EZ-KIT Lites, obtain Samtec JTAG cables
described in “Link Port /JTAG Connectors (J3 and P8)” on page 2-25.
Table 2-11. Single-Processor Configuration
Switch PositionSingle EZ-KIT Lite Use (Default)
SW1.1ON
SW1.2OFF
SW1.3ON
SW1.4OFF
SW1.5ON
SW1.6OFF
SW1.7ON
SW1.8OFF
SW3.1ON
SW3.2OFF
SW4.1ON
SW4.2OFF
2-18ADSP-BF609 EZ-KIT Lite Evaluation System Manual
The rotary boot mode select switch (SW2) determines the boot mode of the
processor. Table 2-13 shows the available boot mode settings. By default,
the ADSP-BF609 processor boots from 8-bit flash memory (parallel flash
boot).
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-19
Push Buttons and Switches
Table 2-13. Boot Mode Select Switch (SW2)
SW2 Position Processor Boot Mode
0Idle—no boot
1Parallel flash boot (default)
2RSI master boot
3SPI0 master boot
4SPI0 slave boot
5Reserved
6Link port 0 slave boot
7UART0 slave boot
IRQ/Flag Enable Switches (SW6–7)
The IRQ/flag enable switches (SW6–7) are push buttons which provide a
momentary low signal on processor signals PB10_A24_SP1D1 and PE1_
SPI1D2_EPPI0D19_SP3D0
switch.
when enabled through the software-controlled
Reset Switch (SW8)
The reset switch (SW8) is a push button which provides a reset pulse to the
ADSP-BF609 processor (U1), Ethernet PHY (U49), GPIO extenders
U45-47), and the expansion interface (EI3) connectors.
(
Rotary Encoder With Momentary Switch (SW9)
The rotary encoder (SW9) can be turned clockwise for an up count or
counter-clockwise for a down count. The encoder also features a momentary switch, activated by pushing the switch towards the center of the
board, that can be used to set the counter to zero. The rotary encoder is a
two-bit quadrature (Gray code) encoder.
2-20ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
The rotary encoder can be disconnected from the processor by setting
SoftConfig, see “Software-Controlled Switches (SoftConfig)” on page 2-3
for more information.
Wake Push Switch (SW10)
One of the wake input signals (PE12/~ETH1_PHYINT/PWM1_CL/RSI0_D5) is
connected to a push button switch (
default and can be enabled through SoftConfig. Refer to “Software-Con-
trolled Switches (SoftConfig)” on page 2-3 for more details.
SW10). This feature is disabled by
Power Jumpers
This section describes functionality of the power jumpers (P10-15).
Figure 2-7 shows the jumper locations.
Figure 2-7. Configuration Jumper Locations
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-21
LEDs
Remove jumpers listed in Table 2-14 to measure the respective voltage
domain.
Table 2-14. Power Jumpers (P10-15)
JumperPower Domain
P15VDD_DMC
P14VDD_INT
P133.3V
P12VDD_EXT
P11VDD_USB
P10USB_VBUS
LEDs
This section describes the on-board LEDs. Figure 2-7 shows the LED
locations.
Figure 2-8. LED Locations
2-22ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
GPIO LEDs (LED1–4)
Four LEDs (LED1, LED2, LED3, and LED4) are connected to four general-purpose I/O pins of the processor (see Table 2-15). The LEDs are
active high and lit (amber) by writing a “1” to the corresponding programmable flag signal.
Table 2-15. GPIO LEDs
LED Reference DesignatorProcessor Programmable Flag Pin
LED1PG14
LED2PG15
LED3PE14
LED4PB11
Thermal Limit LED (LED5)
The thermal limit LED (LED5) reports the status of the thermal sensor,
ADM1032 (U54). The thermal sensor monitors the processor’s temperature. When the high temperature limit set by the IC is violated, LED5 is
turned on (amber) as a visual indicator. The ADM1032 device has
built-in hysteresis, which causes the LED to de-activate only when the
temperature is significantly within the limit. For more information, see
“Temperature Sensor Interface” on page 1-17.
Power LED (LED6)
When LED6 is lit solid (green), it indicates that power is being supplied to
the board properly.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-23
Connectors
Components with a dotted outline are on the back side of the board
Reset LED (LED7)
When LED4 is lit (red), it indicates that the master reset of the processor is
active. The reset signal is controlled by the Analog Devices ADM13305
supervisory reset circuit.
SPD LED (LED6)
SPD LED indicates the speed of the Ethernet port. When LED6 is lit
(green), the speed is 100 Mb/s and when not lit, the speed is 10 Mb/s.
Connectors
This section describes connector functionality and provides information
about mating connectors. The connector locations are shown in
Figure 2-9.
Figure 2-9. Connector Locations
2-24ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
DCE UART Connector (J2)
The pinout of the J2 connector can be found in “ADSP-BF609 EZ-KIT
Lite Schematic” on page B-1.
Part DescriptionManufacturerPart Number
IDC headerFCI68737-410HLF
Mating Connector
IDC socketDIGI-KEYS4205-ND
Link Port /JTAG Connectors (J3 and P8)
The J3 and P8 connectors provide access to the Link Port and JTAG signals of the ADSP-BF609 processor. J3 supports link port 0 and the P8
connector is for link port 1.
Part DescriptionManufacturerPart Number
ERF8 10X2, RA female (J3)SAMTECERF8-010-01-S-D-RA-L
ERm8 10x2, RA male (P8)SAMTECERM8-010-01-S-D-RA-TR
Mating Cable
6" cable ERF8 to ERM8 10X2SAMTECERCD-010-06.00-TBL-SBR-1
JTAG Connector (P1)
The JTAG interface of the ADSP-BF609 processor is connected to the
14-pin 0.1” header,
mating connector must have a plug. For more information, see “JTAG
Interface” on page 1-18.
Remove the standalone debug agent when an emulator is used with the
board. Follow the installation instructions provided in “EZ-KIT Lite
Installation” on page 1-6, using
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-25
P1. Pin 3 is missing to provide keying. Pin 3 in the
P1 as the JTAG connection point.
Connectors
JTAG Connector (ZP1)
ZP1 is the connecting point for the SADA2 debug interface and is a 14-pin
0.1” header.
Expansion Interface III Connectors (P1A–C, P2A,
P3A)
Five board-to-board connectors (P1A, P1B, P1C, P2A, and P3A) provide signals from the SPI, TWI, UART, SPORT, and GPIO interfaces of the
processor. The connectors are located on the bottom side of the board.
For more information, see “Expansion Interface III” on page 1-20.
Part DescriptionManufacturerPart Number
120-pin, 0.6 mmHIROSEFX8-120P-SV1(91)
Mating Connector
120-pin, 0.6 mmHIROSEFX8-120S-SV(21)
USB Connector (P7)
Part DescriptionManufacturerPart Number
USB mini-AbMOLEX 56579-0576
Power Connector (P18)
Part DescriptionManufacturerPart Number
0.65 mm power jackCUI045-0883R
Mating Connector
5.0VDC@3.6A power supply GLOBETEK GS-1750(R)
2-26ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Hardware Reference
CAN Connector (J4)
Part DescriptionManufacturerPart Number
RJ-11 4-pin modular jack TYCO5558872-1
Mating Cable
4-conductor modular jack cable L-COMTSP3044
SD Connector (J5)
Part DescriptionManufacturerPart Number
SD 8-bit, 2 GBSANDISKMHC-W21-601
Memory Card
2 GBSANDISKSDSDB-2048-A11
Ethernet Connector (J1)
Part DescriptionManufacturerPart Number
RJ-45 Ethernet jackPulse EngineerPN J0011D21BNL
Mating Cable
Standard Ethernet cable
Ethernet Connectors (P16-17)
P16 and P17 allow connection to the Ethernet port IEEE 1588 signals.
They are 6-pin 0.1” headers. The pinout of the
can be found in “ADSP-BF609 EZ-KIT Lite Schematic” on page B-1.
ADSP-BF609 EZ-KIT Lite Evaluation System Manual2-27
P16 and P17 connectors
Connectors
2-28ADSP-BF609 EZ-KIT Lite Evaluation System Manual
AADSP-BF609 EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-BF609 EZ-KIT Lite Schematic”
on page B-1.
Ref. Qty. DescriptionReference
Designator
11 ADM708SARZ
SOIC8
21ADM3315
TSSOP24
31ADSP-BF609
BGA349C80P22X2
2_1900X1900
41ADP1864AUJZ
SOT23-6
51ADP1715 MSOP8VR3ADIADP1715ARMZ-1.8-R7
6174LVC14A SOIC14U3TI74LVC14AD
71IDT74FCT3244AP
Y SSOP20
82SN74LVC1G08
SOT23-5
91TJA1041 SOIC14U55NXPTJA1041T/VM,512
101SN74LVC1G04
SOT23-5
U48ADIADM708SARZ
U39ADIADM3315EARUZ
U1ADIADSP-BF609-ENG
VR1ADIADP1864AUJZ-R7
U8IDTIDT74FCT3244APYG
U52-U53TISN74LVC1G08DBVR
U59TISN74LVC1G04DBVT
Manufacturer Part Number
112SN74CB3Q3245
TSSOP20
121MIC2025-1 SOIC8U50DIGI-KEY576-1057-ND
U4-U5DIGI-KEY296-19130-1-ND
ADSP-BF609 EZ-KIT Lite Evaluation System ManualA-1
Ref. Qty. DescriptionReference
Designator
Manufacturer Part Number
131MT47H64M16
FBGA84
141ADM1032
SOIC_N8
151DP83848 LQFP48U49NATIONAL
16150MHZ OSC012U43DIGI-KEY300-8264-2-ND
1733PI3A125 SC70_5U7,U9-U36,U51,
183MCP23017
QFN65P600X600-2
9N
192PI3LVD512
QFN50P350X900-4
3N
201BF609
PC28F128P33B
U44
211BF609 W25Q32
U38
221SI7403BDN ICS010U6VISHAYSI7403BDN
U37MICRONMT47H64M16HR-3 L
U54ON SEMIADM1032ARZ
DP83848CVV/NOPB
SEMI
PERICOMPI3A125CEX
U56-U58
U45-U47DIGI-KEYMCP23017-E/ML-ND
U40-U41PERICOMPI3LVD512ZHE
U44MICRONPC28F128P33BF60D
U38WINBONDW25Q32BVSSIG
23125MHZ OSC003U42DIGI-KEYSG-8002CA-SCB-ND
24148MHZ OSC003U2DIGI-KEYSG-8002CA-SCB-ND(48.00M)
251ADP2119ACPZ-R7
DFN50P300X300-1
1N
261DIP8 SWT016SW1C&KTDA08H0SB1
272IDC 3X2
IDC3X2_SMT
281DB9 9PIN CON038 J2NORCOMP191-009-213-L-571
VR2ANA00ADP2119ACPZ-R7
P16-P17SAMTECTSM-103-01-T-DV
A-2ADSP-BF609 EZ-KIT Lite Evaluation System Manual
ADSP-BF609 EZ-KIT Lite Bill Of Materials
Ref. Qty. DescriptionReference
Designator
291RJ11 4PIN
CON039
303DIP2 SWT020SW3-SW5C&KCKN9064-ND
316IDC 2X1 IDC2X1P10-P15FCI90726-402HLF
3213A RESETABLE
FUS004
336IDC
2PIN_JUMPER_SH
ORT
341PWR .65MM
CON045
351USB_MINI-AB
5PIN CON052
364MOMENTARY
SWT024
371ROTARY_ENC_ED
GE SWT025
382IDC 7x2
IDC7x2_SMTA
J4TYCO5558872-1
F1TYCOSMD300F-2
SJ1-SJ6DIGI-KEYS9001-ND
P18DIGCP1-023-ND
P7MOLEX56579-0576
SW6-SW8,SW10PANA-
SW9PANA-
P1,ZP1SAMTECTSM-107-01-T-DV-A
Manufacturer Part Number
EVQ-Q2K03W
SONIC
EVQ-WKA001
SONIC
391ROTARY SWT027SW2COPALS-8110
401ERM8 10X2
ERM8_10X2_SMT
411ERF8 10X2
ERF8_10X2_SMT
421RJ45 W/LEDS
CON065
431SD_CONN 8-BIT
CON067
445.6MM 120PIN
HIROSE_FX8-120P
-SV1(91)
P8SAMTECERM8-010-01-S-D-RA-TR
J3SAMTECERF8-010-01-S-D-RA-L-TR
J1PULSE
ENG.
J5MORETHA-
NALL
P1A,P1B,P1C,P2A,
P3A
HIROSEFX8-120P-SV1(91)
J0011D21BNL
MHC-W21-601-LF
ADSP-BF609 EZ-KIT Lite Evaluation System ManualA-3
LED7 (reset), 2-24
license restrictions, xii, 1-10
Link Port / JTAG connectors (J3 and P8), 2-25
link ports interface, 1-17
M
mechanical switch, 2-5, 2-7
memory map, of this EZ-KIT Lite, 1-10
Micro Signal Architecture (MSA), xi
N
notation conventions, xx
O
operating systems, supported, 1-5
P
package contents, 1-2
power
architecture, 1-21
LED (LED6), 2-23
measurements, 1-21
power connector (P18), 2-26
power jumpers, 2-21
power-on-self test (POST), 1-20
product overview, xii
programming SoftConfig switches, 2-8
push buttons and switches, 2-17
R
Reduced Instruction Set Computing (RISC), xi
related documents, xix
reset
MULTI PROCESSOR JTAG SETTINGS VIA HP-USB EMUALTOR
SINGLE PROCESSOR JTAG SETTINGSUSING TWO OR MORE EZ-BOARDS (LINK PORT CABLES
EMUALTOR OR DEBUG AGENT (DEFAULT)