Analog Devices ADSP-BF538F User Manual

ADSP-BF538F EZ-KIT Lite
®
Evaluation System Manual
Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106
Revision 1.2, April 2008
Part Number
82-000945-01
a
Copyright Information
©2008 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc.
Printed in the USA.
Limited Warranty
The EZ-KIT Lite evaluation system is warranted against defects in materi­als and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by impli­cation or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices icon bar and logo, VisualDSP++, the VisualDSP++ logo, Blackfin, the Blackfin logo, the CROSSCORE logo, EZ-KIT Lite, and EZ-Extender are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of their respective owners.
Regulatory Compliance
The ADSP-BF538F EZ-KIT Lite is designed to be used solely in a labora­tory environment. The board is not intended for use as a consumer end product or as a portion of a consumer end product. The board is an open system design which does not include a shielded enclosure and therefore may cause interference to other electrical devices in close proximity. This board should not be used in or near any medical equipment or RF devices.
The ADSP-BF538F EZ-KIT Lite has been certified to comply with the essential requirements of the European EMC directive 89/336/EEC amended by 93/68/EEC and therefore carries the “CE” mark.
The ADSP-BF538F EZ-KIT Lite has been appended to Analog Devices, Inc. Technical Construction File (TCF) referenced ‘DSPTOOLS1’ dated December 21, 1997 and was awarded CE Certification by an appointed European Competent Body as listed below.
Technical Certificate No: Z600ANA1.028
Issued by: Technology International (Europe) Limited
60 Shrivenham Hundred Business Park Shrivenham, Swindon, SN6 8TY, UK
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.

CONTENTS

PREFACE
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents ........................................................................... xiv
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ....................................................... xv
Supported Processors ....................................................................... xv
Product Information ...................................................................... xvi
MyAnalog.com ......................................................................... xvi
Processor Product Information .................................................. xvi
Related Documents ................................................................. xvii
Online Technical Documentation ........................................... xviii
Printed Manuals ........................................................................ xx
Notation Conventions .................................................................... xxi
USING ADSP-BF538F EZ-KIT LITE
Package Contents .......................................................................... 1-3
Default Configuration ................................................................... 1-3
Installation and Session Startup ..................................................... 1-5
ADSP-BF538F EZ-KIT Lite Evaluation System Manual v
CONTENTS
Evaluation License Restrictions ..................................................... 1-7
Memory Map ............................................................................... 1-7
SDRAM Interface ......................................................................... 1-8
Flash Memory ............................................................................ 1-10
CAN Interface ............................................................................ 1-11
ELVIS Interface .......................................................................... 1-12
Audio Interface ........................................................................... 1-12
LEDs and Push Buttons .............................................................. 1-13
Example Programs ...................................................................... 1-14
Background Telemetry Channel .................................................. 1-14
ADSP-BF538F EZ-KIT LITE HARDWARE REFERENCE
System Architecture ...................................................................... 2-2
External Bus Interface Unit ..................................................... 2-3
SPORT0 Interface .................................................................. 2-4
SPI Interface ........................................................................... 2-4
UART Interface ...................................................................... 2-4
Programmable Flags ................................................................ 2-4
UART Port ............................................................................. 2-8
Expansion Interface ................................................................. 2-8
JTAG Emulation Port ............................................................. 2-9
Jumper and Switch Settings ........................................................... 2-9
CAN Enable Switch (SW2) ................................................... 2-10
UART Enable Switch (SW4) ................................................. 2-10
Push Button Enable Switch (SW5) ........................................ 2-11
vi ADSP-BF538F EZ-KIT Lite Evaluation System Manual
CONTENTS
Flash Enable Switch (SW6) .................................................... 2-11
FCE Enable Switch (SW14) ................................................... 2-12
Audio Enable Switch (SW7) .................................................. 2-12
Boot Mode Select Switch (SW3) ............................................ 2-13
PPI Direction Control (JP1) .................................................. 2-13
UART Loop Jumper (JP9) ..................................................... 2-14
ELVIS Oscilloscope Configuration Switch (SW1) ................... 2-14
ELVIS Function Generator Configuration Switch (SW8) ........ 2-15
ELVIS Voltage Selection Jumper ( JP6) ................................... 2-16
ELVIS Select Jumper (JP8) .................................................... 2-16
LEDs and Push Buttons .............................................................. 2-17
Reset Push Button (SW9) ...................................................... 2-17
Programmable Flag Push Buttons (SW10–13) ........................ 2-18
Power LED (LED7) ............................................................... 2-18
Reset LED (LED8) ................................................................ 2-18
User LEDs (LED2–6) ............................................................ 2-19
USB Monitor LED (ZLED3) ................................................. 2-19
Connectors ................................................................................. 2-20
Audio Connectors (J9 and J10) .............................................. 2-21
CAN Connectors (J5 and J11) ............................................... 2-21
RS-232 Connector (J6) .......................................................... 2-21
Power Connector (J7) ............................................................ 2-22
Expansion Interface Connectors (J1–3) .................................. 2-22
JTAG Connector (ZP4) ......................................................... 2-23
ADSP-BF538F EZ-KIT Lite Evaluation System Manual vii
CONTENTS
SPORT0 and SPORT1 Connectors (P6 and P7) .................... 2-23
PPI Connector (P8) .............................................................. 2-23
SPI Connector (P9) ............................................................... 2-24
2-Wire Interface Connector (P10) ......................................... 2-24
TIMERS Connector (P11) .................................................... 2-24
UART1 Connector (P12) ...................................................... 2-25
ADSP-BF538F EZ-KIT LITE BILL OF MATERIALS ADSP-BF538F EZ-KIT LITE SCHEMATIC
Title Page ..................................................................................... B-1
Processor ...................................................................................... B-2
Processor Power ............................................................................ B-3
SDRAM and Flash ....................................................................... B-4
ADC and Audio In ....................................................................... B-5
DAC and Audio Out .................................................................... B-6
CAN ............................................................................................ B-7
Push Buttons, LEDs, and Boot Mode ............................................ B-8
ELVIS Interface ............................................................................ B-9
Expansion Interface and JTAG .................................................... B-10
Stamp Connectors ...................................................................... B-11
Misc Connectors ........................................................................ B-12
Power ......................................................................................... B-13
INDEX
viii ADSP-BF538F EZ-KIT Lite Evaluation System Manual

PREFACE

Thank you for purchasing the ADSP-BF538F EZ-KIT Lite®, Analog Devices, Inc. evaluation system for Blackfin® processors.
Blackfin processors embody a new type of embedded processor designed specifically to meet the computational demands and power constraints of today’s embedded audio, video, and communications applications. They deliver breakthrough signal-processing performance and power efficiency within a reduced instruction set computing (RISC) programming model.
Blackfin processors support a media instruction set computing (MISC) architecture. This architecture is the natural merging of RISC, media functions, and digital signal processing (DSP) characteristics. Blackfin processors deliver signal-processing performance in a microprocessor-like environment.
Based on the Micro Signal Architecture (MSA), Blackfin processors com­bine a 32-bit RISC instruction set, dual 16-bit multiply accumulate (MAC) DSP functionality, and 8-bit video processing performance that had previously been the exclusive domain of very-long instruction word (VLIW) media processors.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual ix
The evaluation board is designed to be used in conjunction with the Visu­alDSP++ ADSP-BF538F Blackfin processors. The VisualDSP++ development envi­ronment gives you the ability to perform advanced application code development and debug, such as:
Access to the ADSP-BF538F processor from a personal computer (PC) is achieved through a USB port or an optional JTAG emulator. The USB interface gives unrestricted access to the ADSP-BF538F processor and the evaluation board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emulation products. To learn more about Analog Devices emulators and processor development tools, go to
http://www.analog.com/processors/index.html.
®
development environment to test the capabilities of the
Create, compile, assemble, and link application programs written in C++, C, and ADSP-BF538F assembly
Load, run, step, halt, and set breakpoints in application programs
Read and write data and program memory
Read and write core and peripheral registers
Plot memory
The ADSP-BF538F EZ-KIT Lite provides example programs to demon­strate the capabilities of the evaluation board.
L
x ADSP-BF538F EZ-KIT Lite Evaluation System Manual
The ADSP-BF538F EZ-KIT Lite installation is part of the Visu­alDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. For details about evaluation license restrictions after the 90 days, refer to “Evaluation License Restrictions” on page 1-7 and the Visu- alDSP++ Installation Quick Reference Card.
The board features:
Analog Devices ADSP-BF538F processor
D Core performance up to 600 MHz D External bus performance to 133 MHz D 182-pin mini-BGA package D 25 MHz crystal
Synchronous dynamic random access memory (SDRAM)
D MT48LC32M8 – 64 MB (8M x 8-bits x 4 banks) x 2 chips
Flash memory
D 4MB (2M x 16-bits)
Analog audio interface
Preface
D AD1871 96 kHz analog-to-digital codec (ADC) D AD1854 96 kHz digital-to-audio codec (DAC) D 1 input stereo jack D 1 output stereo jack
Controller Area Network (CAN) interface
D Philips TJA1041 high-speed CAN transceiver
National Instruments Educational Laboratory Virtual Instrumen­tation Suite (ELVIS) interface
D LabVIEW™-based virtual instruments D Multifunction data acquisition device D Bench-top workstation and prototype board
ADSP-BF538F EZ-KIT Lite Evaluation System Manual xi
Universal asynchronous receiver/transmitter (UART)
D ADM3202 RS-232 line driver/receiver D DB9 female connector
•LEDs
D 10 LEDs: 1 power (green), 1 board reset (red), 1 USB (red),
5 general-purpose (amber), and 1 USB monitor (amber)
Push buttons
D 5 push buttons: 1 reset, 4 programmable flags with
debounce logic
Expansion interface
D All processor signals
Other features
D JTAG ICE 14-pin header
The EZ-KIT Lite board has flash memory with a total of 4 MB. Flash memory can be used to store user-specific boot code, allowing the board to run as a stand-alone unit. For more information, see “Flash Memory”
on page 1-10. The board also has 64 MB of SDRAM, which can be used
by the user at runtime.
SPORT0 interfaces with the audio circuit, facilitating development of audio
signal processing applications. SPORT0, SPORT1, and SPORT2 also interface to an off-board connector for communication with other serial devices. For more information, see “SPORT0 Interface” on page 2-4.
The UART of the processor connects to an RS-232 line driver and a DB9 female connector, providing an interface to a PC or other serial device.
xii ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
Additionally, the EZ-KIT Lite board provides access to all of the proces­sor’s peripheral ports. Access is provided in the form of a three-connector expansion interface. For more information, see “Expansion Interface” on
page 2-8.

Purpose of This Manual

The ADSP-BF538F EZ-KIT Lite Evaluation System Manual provides instructions for installing the product hardware (board). The text describes operation and configuration of the board components and pro­vides guidelines for running your own code on the ADSP-BF538F EZ-KIT Lite. Finally, a schematic and a bill of materials are provided as a reference for future designs.
The product software installation is detailed in the VisualDSP++ Installa- tion Quick Reference Card.

Intended Audience

The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual but should supplement it with other texts (such as the ADSP-BF538/ADSP-BF538F Blackfin Processor Hardware Ref- erence and Blackfin Processor Instruction Set Reference) that describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the VisualDSP++ online Help and user’s or getting started guides. For the locations of these documents, see “Related Documents”.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual xiii

Manual Contents

Manual Contents
The manual consists of:
Chapter 1, “Using ADSP-BF538F EZ-KIT Lite” on page 1-1. Describes EZ-KIT Lite functionality from a programmer’s perspec­tive and provides an easy-to-access memory map.
Chapter 2, “ADSP-BF538F EZ-KIT Lite Hardware Reference” on
page 2-1.
Provides information on the EZ-KIT Lite hardware components.
Appendix A, “ADSP-BF538F EZ-KIT Lite Bill Of Materials” on
page A-1.
Provides a list of components used to manufacture the EZ-KIT Lite board.
Appendix B, “ADSP-BF538F EZ-KIT Lite Schematic” on
page B-1.
Provides the resources to allow EZ-KIT Lite board-level debugging or to use as a reference design. Appendix B is part of the online Help.

What’s New in This Manual

The ADSP-BF538F EZ-KIT Lite Evaluation System Manual has been updated to reflect the latest revision of the board.
xiv ADSP-BF538F EZ-KIT Lite Evaluation System Manual

Technical or Customer Support

You can reach Analog Devices, Inc. Customer Support in the following ways:
Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
E-mail tools questions to
processor.tools.support@analog.com
E-mail processor questions to
processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)
Phone questions to 1-800-ANALOGD
Preface
Contact your Analog Devices, Inc. local sales office or authorized distributor
Send questions by mail to:
Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA

Supported Processors

This evaluation system supports Analog Devices ADSP-BF538F Blackfin embedded processors.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual xv

Product Information

Product Information
You can obtain product information from the Analog Devices Web site, from the product CD-ROM, or from printed publications (manuals).
Analog Devices is online at www.analog.com. Our Web site provides infor­mation about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors.

MyAnalog.com

MyAnalog.com is a free feature of the Analog Devices Web site that allows customization of a Web page to display only the latest information on products you are interested in. You can also choose to receive weekly e-mail notifications containing updates to the Web pages that meet your interests. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more.
Registration:
Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you to select the information you want to receive.
If you are already a registered user, just log on. Your user name is your e-mail address.

Processor Product Information

For information on embedded processors and DSPs, visit our Web site at
www.analog.com/processors, which provides access to technical publica-
tions, data sheets, application notes, product overviews, and product announcements.
xvi ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Preface
You may also obtain additional information about Analog Devices and its products in any of the following ways.
E-mail questions or requests for information to
processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)
Fax questions or requests for information to
1-781-461-3010 (North America) +49-89-76903-157 (Europe)

Related Documents

For information on product related development software, see the follow­ing publications.
Table 1. Related Processor Publications
Title Description
ADSP-BF538/ADSP-BF538F Embedded Processor Data Sheet
ADSP-BF538/ADSP-BF538F Blackfin Processor Hardwa re Re f e re nc e
Blackfin Processor Programming Reference Description of all allowed processor assem-
General functional description, pinout, and timing.
Description of internal processor architec­ture and all register functions.
bly instructions.
If you plan to use the EZ-KIT Lite board in conjunction with a
L
JTAG emulator, also refer to the documentation that accompanies the emulator.
All documentation is available online. Visit the Technical Library Web site to access all processor and tools manuals and data sheets:
http://www.analog.com/processors/technicalSupport/technicalLi­brary/
.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual xvii
Product Information
Table 2. Related VisualDSP++ Publications
Title Description
ADSP-BF538F EZ-KIT Lite Evaluation System Manual
VisualDSP++ User’s Guide Description of the VisualDSP++ features and
VisualDSP++ Assembler and Preprocessor Manuals Description of the assembler function and
VisualDSP++ C/C++ Complier and Library Man­ual for Blackfin Processors
VisualDSP++ Linker and Utilities Manual Description of the linker function and com-
VisualDSP++ Loader and Utilities Manual Description of the loader/splitter function
Description of the hardware capabilities of the evaluation system; description of how to access these capabilities in the VisualDSP++ environment.
usage.
commands. Description of the complier function and
commands for Blackfin processors.
mands.
and commands.

Online Technical Documentation

Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, the Dinkum Abridged C++ library, and Flexible License Manager (FlexLM) network license manager software documentation. You can easily search across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary .pdf files of most manuals are provided in the
Docs folder on the VisualDSP++ installation CD.
If documentation is not installed on your system as part of the software installation, you can add it from the VisualDSP++ CD at any time by run­ning the Tools installation. Access the online documentation from the VisualDSP++ environment, Windows® Explorer, or the Analog Devices Web site. Each documentation file type is described as follows.
xviii ADSP-BF538F EZ-KIT Lite Evaluation System Manual
File Description
.chm Help system files and manuals in Help format
Preface
.htm or .html
.pdf VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Dinkum Abridged C++ library and FlexLM network license manager software doc­umentation. Viewing and printing the Internet Explorer 6.0 (or higher).
Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).
.html files requires a browser, such as
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the Windows task bar and navigate to the VisualDSP++ documentation via the Start menu.
To view ADSP-BF538F EZ-KIT Lite Help, which is part of the Visu­alDSP++ Help system, use the Contents or Search tab of the Help window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many ways to open VisualDSP++ online Help or the supplementary documenta­tion from Windows.
Help system files (.chm) are located in the Help folder, and .pdf files are located in the Docs folder of your VisualDSP++ installation CD-ROM. The Docs folder also contains the Dinkum Abridged C++ library and the FlexLM network license manager software documentation.
Your software installation kit includes online Help as part of the Windows interface. These help files provide information about VisualDSP++ and the ADSP-BF538F EZ-KIT Lite evaluation system.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual xix
Product Information
Accessing Documentation From Web
Download manuals at the following Web site:
http://www.analog.com/processors/technicalSupport/technicalLi­brary/.
Select a processor family and book title. Download archive (.zip) files, one for each manual. Use any archive management software, such as Win­Zip, to decompress downloaded files.

Printed Manuals

For general questions regarding literature ordering, call the Literature Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered through the Literature Center at 1-800-ANALOGD (1-800-262-5643), or downloaded from the Analog Devices Web site. Manuals may be ordered by title or by product number located on the back cover of each manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the Analog Devices Web site. Only production (final) data sheets (Rev. 0, A, B, C, and so on) can be obtained from the Literature Center at 1-800-ANALOGD (1-800-262-5643); they also can be downloaded from the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System at 1-800-446-6212. Follow the prompts and a list of data sheet code numbers will be faxed to you. If the data sheet you want is not listed, check for it on the Web site.
xx ADSP-BF538F EZ-KIT Lite Evaluation System Manual

Notation Conventions

Text conventions used in this manual are identified and described as fol­lows. Additional conventions, which apply only to specific chapters, may appear throughout this document.
Example Description
Preface
Close command (File menu)
{this | that} Alternative required items in syntax descriptions appear within curly
[this | that] Optional items in syntax descriptions appear within brackets and sepa-
[this,…] Optional item lists in syntax descriptions appear within brackets delim-
.SECTION Commands, directives, keywords, and feature names are in text with
filename Non-keyword placeholders appear in text with italic style format.
L
a
Titles in reference sections indicate the location of an item within the VisualDSP++ environment’s menu system (for example, the Close com­mand appears on the File menu).
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
rated by vertical bars; read the example as an optional this or that.
ited by commas and terminated with an ellipse; read the example as an optional comma-separated list of
letter gothic font.
Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol.
Caution: Incorrect device operation may result if ... Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol.
this.
Warning: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product
[
that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Warning appears instead of this symbol.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual xxi
Notation Conventions
xxii ADSP-BF538F EZ-KIT Lite Evaluation System Manual
1 USING ADSP-BF538F EZ-KIT
LITE
This chapter provides specific information to assist you with development of programs for the ADSP-BF538F EZ-KIT Lite evaluation system.
The information appears in the following sections.
“Package Contents” on page 1-3 Lists the items contained in the ADSP-BF538F EZ-KIT Lite package.
“Default Configuration” on page 1-3 Shows the default configuration of the ADSP-BF538F EZ-KIT Lite.
“Installation and Session Startup” on page 1-5 Instructs how to start a new or open an existing ADSP-BF538F EZ-KIT Lite session using VisualDSP++.
“Evaluation License Restrictions” on page 1-7 Describes the restrictions of the VisualDSP++ demo license shipped with the EZ-KIT Lite.
“Memory Map” on page 1-7 Defines the ADSP-BF538F EZ-KIT Lite board’s memory map.
“SDRAM Interface” on page 1-8· Defines the register values to configure the on-board SDRAM.
“Flash Memory” on page 1-10 Describes the internal and external flash memory.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 1-1
“CAN Interface” on page 1-11 Describes the on-board Controller Area Network (CAN) interface.
“ELVIS Interface” on page 1-12 Describes the on-board National Instruments Educational Labora­tory Virtual Instrumentation Suite (NI ELVIS) interface.
“Audio Interface” on page 1-12 Describes the on-board audio circuit.
“LEDs and Push Buttons” on page 1-13 Describes the board’s general-purpose IO pins and buttons.
“Example Programs” on page 1-14 Provides information about example programs included in the ADSP-BF538F EZ-KIT Lite evaluation system.
“Background Telemetry Channel” on page 1-14 Highlights the advantages of the background telemetry channel (BTC) feature of VisualDSP++.
For information on the graphical user interface, including the boot load­ing, target options, and other facilities of the EZ-KIT Lite system, refer to the online Help.
For more detailed information about programming the ADSP-BF538F Blackfin processor, see the documents referred to as “Related
Documents”.
1-2 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite

Package Contents

Your ADSP-BF538F EZ-KIT Lite evaluation system package contains the following items.
ADSP-BF538F EZ-KIT Lite board
VisualDSP++ Installation Quick Reference Card
CD containing:
D VisualDSP++ software D ADSP-BF538F EZ-KIT Lite debug software D USB driver files D Example programs D ADSP-BF538F EZ-KIT Lite Evaluation System Manual (this
document)
Universal 7V DC power supply
6-foot 3.5 mm male-to-male audio cable
3.5 mm headphones
10-foot USB 2.0 cable
If any item is missing, contact the vendor where you purchased your EZ-KIT Lite or contact Analog Devices, Inc.

Default Configuration

The ADSP-BF538F EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your computer case.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 1-3
Default Configuration
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.
When removing the EZ-KIT Lite board from the package, handle the board carefully to avoid the discharge of static electricity, which may dam­age some components. Figure 1-1 shows the default jumper settings, switches, connector locations, and LEDs used in installation. Confirm that your board is in the default configuration before using the board.

Figure 1-1. EZ-KIT Lite Hardware Setup

1-4 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite

Installation and Session Startup

L
For correct operation, install the software and hardware in the order presented in the VisualDSP++ Installation Quick Reference Card.
1. Verify that the yellow USB monitor LED (ZLED3, located near the USB connector) is lit. This signifies that the board is communicat­ing properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the VisualDSP++ environment via the Start –>Programs menu.
The main window appears. Note that VisualDSP++ does not con­nect to any session. Skip the rest of this step to step 3.
If you have run VisualDSP++ previously, the last opened session appears on the screen. You can override the default behavior and force VisualDSP++ to start a new session by pressing and holding down the Ctrl key while starting VisualDSP++. Do not release the Ctrl key until the Session Wizard appears on the screen. Go to step 4.
3. To connect to a new EZ-KIT Lite session, start Session Wizard by selecting one of the following.
From the Session menu, New Session.
From the Session menu, Session List. Then click New Ses- sion from the Session List dialog box.
From the Session menu, Connect to Target.
4. The Select Processor page of the wizard appears on the screen. Ensure Blackfin is selected in Processor family. In Choose a target processor, select ADSP-BF538F. Click Next.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 1-5
Installation and Session Startup
5. The Select Connection Type page of the wizard appears on the screen. Select EZ-KIT Lite and click Next.
6. The Select Platform page of the wizard appears on the screen. In the Select your platform list, select ADSP-BF538F EZ-KIT Lite via Debug Agent. In Session name, highlight or specify the session name.
The session name can be a string of any length; although, the box displays approximately 32 characters. The session name can include space characters. If you do not specify a session name, VisualDSP++ creates a session name by combining the name of the selected platform with the selected processor. The only way to change a session name later is to delete the session and to open a new session.
Click Next.
7. The Finish page of the wizard appears on the screen. The page dis- plays your selections. If you are satisfied, click Finish. If not, click Back to make changes.
L
1-6 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
To disconnect from a session, click the disconnect button or select Session–>Disconnect from Target.
To delete a session, select Session –> Session List. Select the ses- sion name from the list and click Delete. Click OK.
Using ADSP-BF538F EZ-KIT Lite

Evaluation License Restrictions

The ADSP-BF538F EZ-KIT Lite installation is part of the VisualDSP++ installation. The EZ-KIT Lite is a licensed product that offers an unre­stricted evaluation license for the first 90 days. Once the initial unrestricted 90-day evaluation license expires:
VisualDSP++ allows a connection to the ADSP-BF538F EZ-KIT Lite via the USB debug agent interface only. Connections to simu­lators and emulation products are no longer allowed.
The linker restricts a users program to 20 KB of internal memory for code space with no restrictions for data space.
L
Refer to the VisualDSP++ Installation Quick Reference Card for details.
The EZ-KIT Lite hardware must be connected and powered up to use VisualDSP++ with a valid evaluation or permanent license.

Memory Map

The ADSP-BF538F processor has internal SRAM that can be used for instruction or data storage. SRAM configuration details can be found in the ADSP-BF538/ADSP-BF538F Blackfin Processor Hardware Reference.
The ADSP-BF538F EZ-KIT Lite board includes two types of external memory: SDRAM and flash.
The size of SDRAM is 64 Mbytes (32M x 16-bit). The processor’s mem­ory select pin,
The size of the external flash memory is 4 Mbytes (2M x 16-bits), and the size of the internal flash memory is 1 Mbyte. The processor’s asynchro­nous memory select pins (~AMS3–0) are configured for flash memory. Any of the ~AMS signals can be mapped to internal or external flash memory.
~SMS0, is configured for SDRAM.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 1-7

SDRAM Interface

Table 1-1. EZ-KIT Lite Evaluation Board Memory Map

Start Address End Address Content
External Memory
Internal Memory
0x0000 0000 0x03FF FFFF SDRAM bank 0 (SDRAM). See “SDRAM Inter-
face” on page 1-8.
0x2000 0000 0x200F FFFF ASYNC memory bank 0. See “Flash Memory” on
page 1-10.
0x2010 0000 0x201F FFFF ASYNC memory bank 1. See “Flash Memory” on
page 1-10.
0x2020 0000 0x202F FFFF ASYNC memory bank 2. See “Flash Memory” on
page 1-10.
0x2030 0000 0x203F FFFF ASYNC memory bank 3. See “Flash Memory” on
page 1-10.
All other locations Not used
0xFF80 0000 0xFF80 3FFF Data bank A SRAM 16 KB 0xFF80 4000 0xFF80 7FFF Data bank A SRAM/CACHE 16 KB 0xFF90 0000 0xFF90 7FFF Data bank B SRAM 16 KB 0xFF90 4000 0xFF90 7FFF Data bank B SRAM/CACHE 16 KB 0xFFA0 0000 0xFFA0 7FFF Instruction bank A SRAM 32 KB 0xFFA1 0000 0xFFA1 3FFF Instruction bank B SRAM 16 KB 0xFFA0 8000 0xFFA0 BFFF Instruction SRAM/CACHE 16 KB 0xFFB0 0000 0xFFB0 0FFF Scratch pad SRAM 4KB 0xFFC0 0000 0xFFDF FFFF System MM Rs 2 MB 0xFFE0 0000 0xFFFF FFFF Core MMRs 2 MB
All other locations Reserved
SDRAM Interface
The three SDRAM control registers must be initialized in order to use the MT48LC32M8A2 32M x 16 bits (64 MB) SDRAM memory. When you are in a VisualDSP++ session and connect to the EZ-KIT Lite board, the
1-8 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Using ADSP-BF538F EZ-KIT Lite
SDRAM registers are configured automatically through the debugger each time the processor is reset. The values in Table 1-2 are used whenever SDRAM bank 0 is accessed through the debugger (for example, when viewing memory windows or loading a program). The numbers were derived for maximum flexibility and work for a system clock frequency between 54 MHz and 133 MHz.

Table 1-2. EZ-KIT Lite Session SDRAM Default Settings

Register Value Function
EBIU_SDGCTL 0x0091998D Calculated with SCLK = 133 MHz
16-bit data path External buffering timing disabled
= 2 SCLK cycles
t
WR
t
= 3 SCLK cycles
RCD
tRP = 3 SCLK cycles
= 6 SCLK cycles
t
RAS
pre-fetch disabled CAS latency = 3 SCLK cycles
SCLK1 disabled
EBIU_SDBCTL 0x00000025 Bank 0 ena b le d
Bank 0 size = 64 MB Bank 0 column address width = 10 bits
EBIU_SDRRC 0x000003A0 Calculated with SCLK = 54 MHz
RDIV = 416 clock cycles
1 54 MHz <=SCLK <= 133 MHz.
1
To re-write the EBIU_SDGCTL register within the user code, first, place the chip in self-refresh (see the ADSP-BF538/ADSP-BF538F Blackfin Processor
Hardware Reference). Clearing the appropriate checkbox on the Target Options dialog box, which is accessible through the Settings pull-down
menu, disables the automatic and allows manual configuration. For more information, see online Help.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 1-9

Flash Memory

Automatic configuration of SDRAM is not optimized for any
SCLK fre-
quency. Table 1-3 shows optimized configuration for the SDRAM registers using a 125 MHz and 133 MHz SCLK. Only the EBIU_SDRRC reg­ister needs to be modified in the user code to achieve maximum performance.

Table 1-3. SDRAM Optimum Settings

Register SCLK = 133 MHz
(CCLK = 400 MHz)
EBIU_SDGCTL 0x0091 998D 0x0091 998D EBIU_SDBCTL 0x0000 0025 0x0000 0025 EBIU_SDRRC 0x0000 0408 0x0000 03A0
SCLK = 125 MHz (CCLK = 500 MHz)
An example program is included in the EZ-KIT Lite installation directory to demonstrate the SDRAM memory setup.
Flash Memory
The flash memory interface of the ADSP-BF538F EZ-KIT Lite can con­nect to an external 4 MB (2M x 16-bits) ST Micro M29W320EB device
or the 1 MB internal flash memory. The size and connections of flash memory are controlled by the flash address range switch (
chip enable (FCE) switch (SW14). See “Flash Enable Switch (SW6)” on
page 2-11 and “FCE Enable Switch (SW14)” on page 2-12.
SW6) and the flash
The default for the
SW6 switch is all positions ON, which allows the user to
have access to the full 4 MB of the external flash memory. The default for
SW14 switch is all positions OFF, which allows the user to have access to
the the full 4 MB of the external flash memory. Each
~AMS signal accounts for
1 MB of flash memory. The amount of available flash memory decreases
~AMS signals are turned OFF.
as
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Using ADSP-BF538F EZ-KIT Lite
Example code is provided in the EZ-KIT Lite installation directory to demonstrate how to program flash memory.
Table 1-4 shows a sample value for the asynchronous memory configura-
tion register,
EBIU_AMBCTL0.

Table 1-4. Asynchronous Memory Control Register Setting Example

Register Value Function
EBIU_AMBCTL0 0x7BB07BB0 Timing control for banks 1 and 0

CAN Interface

The Controller Area Network interface contains a Philips TJA1041 high-speed CAN transceiver. The PD9 programmable flag connects to the error and power-on indication output (ERR). The PC1 of the processor con­nects to the receive data output (RXD), and PCO connects to the transmit data input (TXD).
The CAN interface can be disconnected from the processor by turning positions 1 though 4 of the SW2 switch OFF. When in the OFF position, the signals can be used elsewhere on the board. See “CAN Enable Switch
(SW2)” on page 2-10 for more information.
The CAN interface contains two 4-position modular connectors (see
“CAN Connectors (J5 and J11)” on page 2-21).
Example programs are included in the EZ-KIT Lite installation directory to demonstrate CAN circuit operation.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 1-11

ELVIS Interface

ELVIS Interface
This EZ-KIT Lite board contains the National Instruments ELVIS inter­face. The interface features the DC voltage and current measurement modules, oscilloscope and bode analyzer modules, function generator, arbitrary waveform generator, and digital IO.
The ELVIS interface is a NI LabVIEW-based design and prototype envi­ronment for university science and engineering laboratories. The ELVIS interface consists of the LabVIEW-based virtual instruments, a multifunc­tion data acquisition (DAQ) device, and a custom-designed bench-top workstation and prototype board. This combination provides a ready-to-use suite of instruments found in most educational laboratories. Because the interface is based on the LabVIEW and provides complete data acquisition and prototyping capabilities, the system is ideal for aca­demic coursework that range from lower-division classes to advanced project-based curriculums.
For more information on ELVIS and example demonstration programs, visit National Instruments Web site at www.ni.com.

Audio Interface

The audio circuit of the EZ-KIT Lite consists of an AD1871 ana­log-to-digital converter (ADC) and an AD1854 digital-to-analog converter (DAC). The audio circuit provides one channel of stereo input and one channel of stereo output via 3.5 mm stereo jacks. The interface of the processor is linked with the stereo audio data input and output pins of the audio circuit.
1-12 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
SPORT0
Using ADSP-BF538F EZ-KIT Lite
The frame sync and bit clocks are generated from the ADC and feed to the processor because the ADC is operating in master mode. The audio inter­face samples data at a 48 kHz sample rate. The serial data interface operates in 2-wire interface (TWI) mode and connects to
SPORT0 of the
processor. The audio interface can be disconnected from the SPORT0 by turning
positions 1 and 5 of the SW7 switch OFF. When in the OFF position, the
SPORT0 signals can be used on the SPORT0 connector (P6) or on the expan-
sion interface (see “SPORT0 and SPORT1 Connectors (P6 and P7)” on
page 2-23 and “Audio Enable Switch (SW7)” on page 2-12 for more
information). Example programs are included in the EZ-KIT Lite installation directory
to demonstrate audio circuit operation.

LEDs and Push Buttons

The EZ-KIT Lite provides four push buttons and five LEDs for gen­eral-purpose IO.
The five LEDs, labeled LED2 through LED6, are accessed via the PC5–9 pro­cessor pins. For information on how to program the pins, refer to the ADSP-BF538/ADSP-BF538F Blackfin Processor Hardware Reference.
The four general-purpose push button are labeled status of each individual button can be read through the processor’s pro­grammable flag inputs, PF0–3. The signal reads 1 when a corresponding switch is being pressed-on. When the switch is released, the signal reads A connection between the push button and programmable flag input is established through the DIP switch,
SW5. See “LEDs and Push Buttons”
on page 2-17 for details.
An example program is included in the EZ-KIT Lite installation directory to demonstrate functionality of the LEDs and push buttons.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 1-13
SW10 through SW13. A
0.

Example Programs

Example Programs
Example programs are provided with the ADSP-BF538F EZ-KIT Lite to demonstrate various capabilities of the evaluation board. These programs are installed with the EZ-KIT Lite software and can be found in the
<install_path>\Blackfin\Examples\ADSP-BF538F EZ-KIT Lite Visu-
alDSP++ directory. Please refer to the readme file provided with each example for more information.

Background Telemetry Channel

The ADSP-BF538F USB debug agent supports the background telemetry channel (BTC), which facilitates data exchange between VisualDSP++ and the processor without interrupting processor execution.
The BTC allows you to view a variable as it is updated or changed, all while the processor continues to execute. For increased performance of the BTC, including faster reading and writing, please check our latest line of Blackfin processor emulators at:
http://www.analog.com/processors/blackfin/evaluationDevelop­ment/crosscore/
channel, see the VisualDSP++ User’s Guide or online Help.
. For more information about the background telemetry
1-14 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
2 ADSP-BF538F EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-BF538F EZ-KIT Lite board. The following topics are covered.
“System Architecture” on page 2-2 Describes the ADSP-BF538F EZ-KIT Lite board configuration and explains how the board components interface with the processor.
“Jumper and Switch Settings” on page 2-9 Shows the locations and describes the configuration jumpers and switches.
“LEDs and Push Buttons” on page 2-17 Shows the locations and describes the LEDs and push buttons.
“Connectors” on page 2-20 Shows the locations and provides part numbers for the on-board connectors. In addition, the manufacturer and part number infor­mation is provided for the mating parts.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-1

System Architecture

System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite board.
USB
Conn
(2)
(2)
RJ10
RS-232
Female
+7.0V
Connector
TWI
Conn
JTAG Conn
Debug
CAN
Transceiver
Power
Regulation
Agent
RS-232
Interface
25 MHz
Oscillator
32.768 KHz Oscillator
Port
JTAG
RTC
64 MB
SDRAM
(32M x 16)
4 MB Flash
(2M x 16 )
EBUI
Connectors
ADSP-BF538F
(4)
SPORT
Conns
DSP
SPIs
(3)
SPI
Conns
PPI
PPI
Conn
GPIO
ADC/
DAC
Stereo
In/Out
Timers
CAN TWI
UARTs SPORTs PBs (4)
(3)
UART
Conns
Expansion
(3)
LEDs (6)
ELVIS
Conn
Timer
Figure 2-1. System Architecture This EZ-KIT Lite is designed to demonstrate capabilities of the
ADSP-BF538F Blackfin processor. The processor has an IO voltage of
3.3V. The core voltage of the processor is supplied by the internal voltage regulator.
2-2 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
The core voltage and the core clock rate can be set on the fly by the pro­cessor. The input clock is 25 MHz. A 32.768 kHz crystal supplies the real-time clock (RTC) inputs of the processor. The default boot mode for the processor is flash boot. See “Boot Mode Select Switch (SW3)” on
page 2-13 for information about changing the default boot mode.

External Bus Interface Unit

The external bus interface unit (EBIU) connects external memory to the ADSP-BF538F processor. The unit includes a 16-bit wide data bus, an address bus, and a control bus. On the EZ-KIT Lite, the EBIU connects to the SDRAM, flash memory, and expansion interfaces.
The 64 Mbytes (32M x 16 bits) of SDRAM connect to the synchronous memory select 0 pin (~SMS0). Refer to “SDRAM Interface” on page 1-8 for information about SDRAM configuration. Note that SDRAM clock is the processor’s clock out (CLK OUT), which must not exceed 133 MHz.
The flash memory device connects to the asynchronous memory select sig­nals, ~AMS3 through ~AMS0. The device provides a total of 4 MB of external flash memory or 1 MB of internal flash memory. The processor can use flash memory for both booting and storing information during a standard mode of operation. Refer to “Flash Memory” on page 1-10 for details.
All of the address, data, and control signals are available externally via the expansion interface (J1–3). The pinout of these connectors can be found in “ADSP-BF538F EZ-KIT Lite Schematic” on page B-1.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-3
System Architecture

SPORT0 Interface

SPORT0 connects to the audio circuit, SPORT0 connector (P6), and expan-
sion interface. The audio circuit uses the primary data transmit and receive pins to input and output data from the audio input and outputs.
SPORT1 and SPORT2 of the processor connect to the SPORT connectors (P3
and
P4) and expansion interface.
The pinout of the SPORT interface and expansion interface connectors can be found in “ADSP-BF538F EZ-KIT Lite Schematic” on page B-1.

SPI Interface

The serial peripheral interface (SPI) of the processor connects to the SPI connectors (P1, P2, and P9) and expansion interface.

UART Interface

The UART interface of the processor connects to the UART connectors (P12, P14, and P15) and expansion interface.

Programmable Flags

The processor has 53 general-purpose input/output (GPIO) signals spread across four ports (PC, PD, PE, and PF). The pins are multi-functional and depend on the processor setup. Table 2-1 shows how the programmable flag pins are used on the EZ-KIT Lite.
Table 2-1. Programmable Flag Connections
Processor Pin Other Processor Function EZ-KIT Lite Function
PC0 CANTX UART0 CTS/CAN transmit PC1 CANRX UART0 CTS/CAN receive
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ADSP-BF538F EZ-KIT Lite Hardware Reference
Table 2-1. Programmable Flag Connections (Cont’d)
Processor Pin Other Processor Function EZ-KIT Lite Function
PC5 LED (LED2) or ELVIS_PF1. See “LED and
Push Button Locations” on page 2-17 and “Push Button Enable Switch (SW5)” on page 2-11 for information on how to disable
the push button.
PC6 LED (LED3) or ELVIS_PF2. See “LED and
Push Button Locations” on page 2-17 and “Push Button Enable Switch (SW5)” on page 2-11 for information on how to disable
the push button.
PC7 LED (LED4) or ELVIS_PF5. See “LED and
Push Button Locations” on page 2-17 and “Push Button Enable Switch (SW5)” on page 2-11 for information on how to disable
the push button.
PC8 LED (LED5) or ELVIS_PF6. See “LED and
Push Button Locations” on page 2-17 and “Push Button Enable Switch (SW5)” on page 2-11 for information on how to disable
the push button.
PC9 LED (LED6) or ELVIS_PF7. See “LEDs and
Push Buttons” on page 1-13 and “Push But­ton Enable Switch (SW5)” on page 2-11 for
information on how to disable the push but­ton.
PD0 MOSI1 Not used PD1 MISO1 Not used PD2 SCK1 Not us e d PD3 SPI1SS Not u sed PD4 SPI1SEL AUDIO_RESET PD5 MOSI2Not used PD6 MISO2 Not used
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-5
System Architecture
Table 2-1. Programmable Flag Connections (Cont’d)
Processor Pin Other Processor Function EZ-KIT Lite Function
PD7 SCK2 PPI_DIR_CTL (for AV-Extender PD8 SPI2SS PPI_CLK_SEL (for AV-Extender) PD9 SPI2SEL CAN_ERR PD10 RX1 Not used PD11 TX1 Not used PD12 RX2 Not used PD13 TX2 Not used PE0 RSCLK2 Not u sed PE1 RFS2 Not us e d PE2 DR2PRI Not u sed PE3 DR2SEC Not u sed
®
)
PE4 TSCLK2 Not u sed PE5 TFS2 Not us e d PE6 DT2PRI Not u sed PE7 DT2SEC Not u sed PE8 RSCLK3 Not u sed PE9 RFS3 Not us e d PE10 PE11 PE12 PE13 PE14 DT3PRI Not u sed PE15
DR3PRI
DR3SEC
TSCLK3
TFS3
DT3SEC
Not used Not used Not used Not used
Not used
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ADSP-BF538F EZ-KIT Lite Hardware Reference
Table 2-1. Programmable Flag Connections (Cont’d)
Processor Pin Other Processor Function EZ-KIT Lite Function
PF0 SPISS Push button (SW13). See “Programmable
Flag Push Buttons (SW10–13)” on page 2-18.
PF1 SPI0SEL1/TMRCLK Push button (SW12). See “Programmable
Flag Push Buttons (SW10–13)” on page 2-18.
PF2 SPI0SEL2 Push button (SW11). See “Programmable
Flag Push Buttons (SW10–13)” on page 2-18.
PF3 PPI_FS3/SPI0SEL3 Push button (SW10). See “Programmable
Flag Push Buttons (SW10–13)” on page 2-18.
PF4 PPI_D15/SPI0SEL4 Not u sed PF5 PPI_D14/SPI0SEL5 Not u sed PF6 PPI_D13/SPI0SEL6 Not u sed PF7 PPI_D12/SPI0SEL7 Not u sed PF8 PPI_D11 Not used PF9 PPI_D10 Not used PF10 PPI_D9 Not u sed PF11 PPI_D8 Not u sed PF12 PPI_D7 Not u sed PF13 PPI_D6 Not u sed PF14 PPI_D5 No u sed PF15 PPI_D4 Not u sed
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-7
System Architecture

UART Port

The universal asynchronous receiver/transmitter (UART) port of the pro­cessor connects to the ADM3202 RS-232 line driver as well as to the expansion interface. The RS-232 line driver connects to the DB9 female connector, providing an interface to a PC and other serial devices.

Expansion Interface

The expansion interface consists of three 90-pin connectors. Table 2-2 shows the interfaces each connector provides. For the exact pinout of the connectors, refer to “ADSP-BF538F EZ-KIT Lite Schematic” on
page B-1. The mechanical dimensions of the connectors can be obtained
from Technical or Customer Support. Analog Devices offers many EZ-Extender products that plug on to the
expansion interface. For more information on these products, visit the Analog Devices Web site at www.analog.com.
Table 2-2. Expansion Interface Connectors
Connector Interfaces
J1 5V, GND, address, data, PPI J2 3.3V, GND, SPI, NMI, TMR2–0, SPORT0, SPORT1, PF15–0, EBUI control signals J3 5V, 3.3V, GND, UART, flash IO, reset, audio control signals
Limits to the current and to the interface speed must be taken into consid­eration when using the expansion interface. The maximum current limit is dependent on the capabilities of the used regulator. Additional circuitry also can add extra loading to signals, decreasing their maximum effective speed.
[
2-8 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
Analog Devices does not support and is not responsible for the effects of additional circuitry.
ADSP-BF538F EZ-KIT Lite Hardware Reference

JTAG Emulation Port

The JTAG emulation port allows an emulator to access the processor’s internal and external memory through a 6-pin interface. The JTAG emu­lation port of the processor connects also to the USB debugging interface. When an emulator connects to the board at ZP4, the USB debugging interface is disabled. See “JTAG Connector (ZP4)” on page 2-23 for more information about the connector.
To learn more about available emulators, contact Analog Devices (see
“Processor Product Information”).

Jumper and Switch Settings

The jumper and switch locations are shown in Figure 2-2.

Figure 2-2. Jumper and Switch Locations

ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-9
Jumper and Switch Settings

CAN Enable Switch (SW2)

The Controller Area Network (CAN) enable switch (SW2) disconnects CAN signals from the GPIO pins of the processor. When the SW2 switch is in the OFF position, the associated GPIO signals (see Table 2-3) can be used on the expansion interface.
Table 2-3. CAN Enable Switch (SW2)
CAN Signal SW2 Switch Position (Default) Processor Signal
ENABLE 1 (ON) NU STANDBY 2 (ON) NU ERROR 3 (ON ) PD9 RECEIVE DATA 4 (ON) PC1

UART Enable Switch (SW4)

The UART enable switch (SW4) disconnects UART signals from the GPIO pins of the processor. When the switch is in the OFF position, the associ­ated GPIO signals (see Table 2-4) can be used on the expansion interface.
Table 2-4. UART Enable Switch (SW4)
EZ-KIT Lite Signal SW4 Switch Position (Default) Processor Signal
CTS 1 (ON) PC0 RX0 2 (ON) NU RTS 3 (ON) PC1 LOOPBACK 4 (OFF) NU
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ADSP-BF538F EZ-KIT Lite Hardware Reference

Push Button Enable Switch (SW5)

The push button enable switch (SW5) disconnects the associated signal and the push button circuit drivers from the GPIO pins of the processor. When the SW5 switch is in the OFF position, the GPIO signal (see Table 2-5) can be used on the expansion interface.
Table 2-5. Push Button Enable Switch (SW5)
Push Button SW5 Switch Position (Default) Processor Signal
PB1 (SW13)1 (ON) PF0 PB2 (SW12)2 (ON) PF1 PB3 (SW11)3 (ON) PF2 PB4 (SW10)4 (ON) PF3

Flash Enable Switch (SW6)

The flash enable switch (SW6) disconnects the ~AMS signals from the exter­nal flash memory, allowing other devices to utilize the signals via the expansion interface. For each switch listed in Table 2-6 that is turned OFF, the size of available flash memory is reduced by 1 MB.
Table 2-6. Flash Enable Switch (SW6)
Processor Signal SW6 Switch Position (Default)
~AMS0 1 (ON) ~AMS1 2 (ON) ~AMS2 3 (ON) ~AMS3 4 (ON)
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-11
Jumper and Switch Settings

FCE Enable Switch (SW14)

The flash chip enable (FCE) switch (SW14) selects which ~AMS signals con­nect to the internal flash memory. Since the internal memory is 1 MB, only one ~AMS signal must be connected at a time. For each switch listed in
Table 2-7 that is turned ON, the size of available flash memory is reduced
by 1 MB. Table 2-7. FCE Enable Switch (SW14)
Processor Signal SW14 Switch Position (Default)
~AMS0 1 (OFF) ~AMS1 2 (OFF) ~AMS2 3 (OFF) ~AMS3 4 (OFF)

Audio Enable Switch (SW7)

The audio enable switch (SW7) disconnects the audio signals from the pro­cessor (positions 1–5) and determines how the clock for the audio circuit generates and connects (positions 6–8). Position 8 determines if the ADC is in master or slave mode. When in master mode (position 8 is ON), the ADC generates the clock. When in slave mode (position 8 is OFF), the pro­cessor generates the clock. Positions 6 and 7 connect together the transmit and receive clocks (see Table 2-8).
Table 2-8. Audio Enable Switch (SW7)
EZ-KIT Lite Signal SW7 Switch Position (Default) Processor Signal
DR0PRI 1 (ON) DR0PRI RSCLK0 2 (ON) RSCLK0 RFS0 3 (ON) RFS0
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ADSP-BF538F EZ-KIT Lite Hardware Reference
Table 2-8. Audio Enable Switch (SW7) (Cont’d)
EZ-KIT Lite Signal SW7 Switch Position (Default) Processor Signal
TSCLK0 4 (ON) TSCLK0 TFS0 5 (ON) TFS0
Clock loopback 6 (ON) NU FS loopback 7 (ON) NU ADC master/slave 8 (ON) NU

Boot Mode Select Switch (SW3)

The rotary switch (SW3) determines the boot mode of the processor.
Table 2-9 shows the available boot mode settings. By default, the
ADSP-BF538F processor boots from the on-board flash memory. Table 2-9. Boot Mode Select Switch (SW3)
SW3 Position 1 SW3 Position 2 Processor Boot Mode
ON ON Execute from 16-bit external memory
ON OFF Boot from 16-bit flash memory (default)
OFF ON Boot from SPI serial master OFF OFF Boot from SPI serial slave

PPI Direction Control (JP1)

The PPI direction control jumper (JP1) is used when the board connects to a Blackfin AV EZ-Extender. JP1 allows the GPIO signal PD7 to control the direction of the PPI bus via a software flag. The default is positions 1 and 2. When connected to the extender, JP1 must be placed in positions 2 and 3.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-13
Jumper and Switch Settings

UART Loop Jumper (JP9)

The UART loop jumper (JP9) is for looping the transmit and receive sig­nals. The default is OFF.

ELVIS Oscilloscope Configuration Switch (SW1)

The oscilloscope configuration switch (SW1) determines which audio cir­cuit signals connect to channels A and B of the oscilloscope. The switch is used when the board connects to the Educational Laboratory Virtual Instrumentation Suite (ELVIS) station (see “ELVIS Interface” on
page 1-12). Each channel must have only one signal selected at a time (see Table 2-10).
Table 2-10. Oscilloscope Configuration Switch (SW1)
Channel SW1 Switch Position (Default) Audio Circuit Signal
A 1 (OFF) AMP_LEFT_IN A 2 (OFF) AMP_RIGHT_IN A 3 (OFF) LEFT_OUT A 4 (OFF) RIGHT_OUT B 5 (OFF AMP_LEFT_IN B 6 (OFF) AMP_RIGHT_IN B 7 (OFF) LEFT_OUT B 8 (OFF) RIGHT_OUT
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ADSP-BF538F EZ-KIT Lite Hardware Reference

ELVIS Function Generator Configuration Switch (SW8)

The function generator configuration switch (SW8) controls signals con­necting to the left and right input signals of the audio interface. The switch is used when the board connects to the ELVIS station (see “ELVIS
Interface” on page 1-12). Each channel must have only one signal selected
at a time, as described in Table 2-11. Table 2-11. Function Generator Configuration Switch (SW8)
Channel SW8 Switch Position (Default) Audio Circuit Signal
AMP_LEFT_IN 1 (ON) LEFT_IN AMP_RIGHT_IN 2 (ON) RIGHT_IN AMP_LEFT_IN 3 (OFF) DAC0 AMP_RIGHT_IN 4 (OFF) DAC1
SW8
AMP_LEFT_IN 5 (OFF) FUNCT_OUT AMP_RIGHT_IN 6 (OFF) FUNCT_OUT
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-15
Jumper and Switch Settings

ELVIS Voltage Selection Jumper (JP6)

The ELVIS voltage selection jumper (JP6) is used to select the power source for the EZ-KIT Lite. In a standard mode of operation, the board receives its power from an external power supply. When JP6 is installed, the board is powered from an ELVIS station, and no external power sup­ply is required. The jumper setting is shown in Table 2-12.
Table 2-12. ELVIS Voltage Selection Jumper (JP6)
JP6 Setting Mode OFF Powered from an external power supply (default)
ON Powered from an ELVIS station
[
The external power supply must be disconnected from the board when JP6 is installed. Otherwise, the power supply can cause dam­age to the EZ-KIT Lite board and ELVIS unit.

ELVIS Select Jumper (JP8)

The ELVIS select jumper (JP8) configures the EZ-KIT Lite’s connection to an ELVIS station (see “ELVIS Interface” on page 1-12). When JP8 is installed, the connections to the push buttons and LED are re-directed to the ELVIS station, instead of the processor. The jumper setting is shown in Table 2-13.
Table 2-13. ELVIS Select Jumper (JP8)
JP8 Setting Mode OFF Not connected to an ELVIS station (default)
ON Connected to an ELVIS station
2-16 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference

LEDs and Push Buttons

This section describes functionality of the LEDs and push buttons.
Figure 2-3 shows the locations of the LEDs and push buttons.
MONITOR

Figure 2-3. LED and Push Button Locations

Reset Push Button (SW9)

The RESET push button resets all of the ICs on the board. One exception is the USB interface chip. The chip is not being reset when the push button is pressed after the USB cable has been plugged in and communication with the PC has been initialized correctly. After USB communication has been initialized, the only way to reset the USB chip is by powering down the board.
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-17
LEDs and Push Buttons
Programmable Flag Push Buttons (SW10–13)
Four push buttons, SW10–13, are provided for general-purpose user input. The buttons connect to the PF0-3 programmable flag pins of the proces­sor. The push buttons are active high and, when pressed, send a high (1) to the processor. Refer to “LEDs and Push Buttons” on page 1-13 for more information on how to use the flags to program the processor. The push button enable switch (SW5) is capable of disconnecting the push but­tons from its corresponding PF signal (refer to “Push Button Enable
Switch (SW5)” on page 2-11). The programmable flag signals and associ-
ated switches are shown in Table 2-14. Table 2-14. Programmable Flag Switches
Processor Programmable Flag Pin Push Button Reference Designator
PF0 SW13 PF1 SW12 PF2 SW11 PF3 SW10

Power LED (LED7)

When LED7 is lit (green), it indicates that power is being properly supplied to the board.

Reset LED (LED8)

When LED8 is lit, it indicates that the master reset of all the major ICs is active.
2-18 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference
User LEDs (LED2–6)
Five LEDs connect to five general-purpose IO pins of the processor (see
Table 2-15). The LEDs are active high and are lit by writing a 1 to the
correct PC signal. Refer to “LEDs and Push Buttons” on page 1-13 for more information about how to use flash memory when programming the LEDs.
Table 2-15. User LEDs
LED Reference Designator Processor Programmable Flag Pin
LED2 PC5 LED3 PC6 LED4 PC7 LED5 PC8 LED6 PC9

USB Monitor LED (ZLED3)

The USB monitor LED (ZLED3) indicates that USB communication has been initialized successfully, and you can connect to the processor using a VisualDSP++ EZ-KIT Lite session. This takes approximately 15 seconds. If the LED does not light, try cycling power on the board and/or re-installing the USB driver (see the VisualDSP++ Installation Quick Refer- ence Card).
L
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-19
When VisualDSP++ is actively communicating with the EZ-KIT Lite target board, the LED can flicker, indicating communications handshake.

Connectors

Connectors
This section describes the connector functionality and provides informa­tion about mating connectors. The connector locations are shown in
Figure 2-4.

Figure 2-4. Connector Locations

2-20 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference

Audio Connectors (J9 and J10)

Part Description Manufacturer Part Number
3.5 mm stereo jack A/D ELECTRONICS ST323-5
Mating Cable (shipped with EZ-KIT Lite)
3.5 mm stereo interconnect cable
3.5 mm headphones KOSS UR5
RANDOM 10A3-01106

CAN Connectors (J5 and J11)

Part Description Manufacturer Part Number
Modular jack AMP 5558872-1
Mating Ca b l e
4-conductor modular jack cable L-COM TSP3044

RS-232 Connector (J6)

Part Description Manufacturer Part Number
DB9, female, vertical mount NORCOMP 191-009-213-L-571
Mating Ca b l e
2m female-to-female cable DIGI-KEY AE1020-ND
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-21
Connectors

Power Connector (J7)

The power connector provides all of the power necessary to operate the EZ-KIT Lite board.
Part Description Manufacturer Part Number
2.5 mm power jack SWITCHCRAFT RAPC712X Mating Power Supply (shipped with EZ-KIT Lite)
7V power supply CUI INC. DMS070214-P6P-SZ
Expansion Interface Connectors (J1–3)
Three board-to-board connector footprints provide signals for most of the processor’s peripheral interfaces. The connectors are located at the bottom of the board. For more information about the interface, see “Expansion
Interface” on page 2-8. For the availability and pricing of the J1, J12, and
J3 connectors, contact Samtec.
Part Description Manufacturer Part Number
90-position 0.05” spacing, SMT SAMTEC SFC-145-T2-F-D-A
Mating Connector
90-position 0.05” spacing (through hole)
90-position 0.05” spacing (surface mount)
90-position 0.05” spacing (low cost)
SAMTEC TFM-145-x1 series
SAMTEC TFM-145-x2 series
SAMTEC TFC-145 series
2-22 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference

JTAG Connector (ZP4)

The JTAG header is the connecting point for a JTAG in-circuit emulator pod. When an emulator connects to the JTAG header, the USB debug interface is disabled.
L L
Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug.
When using an emulator with the EZ-KIT Lite board, follow the connection instructions provided with the emulator.

SPORT0 and SPORT1 Connectors (P6 and P7)

The pinout of the P6 and P7 connectors can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description Manufacturer Part Number
IDC header FCI 68737-434HLF
Mating Connector
IDC socket DIGI-KEY S4217-ND

PPI Connector (P8)

The pinout of the P8 connector can be found in “ADSP-BF538F EZ-KIT
Lite Schematic” on page B-1.
Part Description Manufacturer Part Number
IDC header FCI 68737-440HLF
Mating Connector
IDC socket DIGI-KEY S4220-ND
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-23
Connectors

SPI Connector (P9)

The pinout of the P9 connector can be found in “ADSP-BF538F EZ-KIT
Lite Schematic” on page B-1.
Part Description Manufacturer Part Number
IDC header FCI 68737-420HLF
Mating Connector
IDC socket DIGI-KEY S4210-ND

2-Wire Interface Connector (P10)

The pinout of the P10 connector can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description Manufacturer Part Number
IDC header FCI 68737-420HLF
Mating Connector
IDC socket DIGI-KEY S4210-ND

TIMERS Connector (P11)

The pinout of the P11 connector can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description Manufacturer Part Number
IDC header FCI 68737-410HLF
Mating Connector
IDC socket DIGI-KEY S4205-ND
2-24 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Hardware Reference

UART1 Connector (P12)

The pinout of the P12 connector can be found in “ADSP-BF538F
EZ-KIT Lite Schematic” on page B-1.
Part Description Manufacturer Part Number
IDC header FCI 68737-410HLF
Mating Connector
IDC socket DIGI-KEY S4205-ND
ADSP-BF538F EZ-KIT Lite Evaluation System Manual 2-25
Connectors
2-26 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A ADSP-BF538F EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-BF538F EZ-KIT Lite Sche-
matic” on page B-1.
Ref. Qty. Description Reference
Designato r
1 1 74LVC14A SOIC14 U37 TI 74LVC14AD 2 1 IDT74FCT3244AP
Y SSOP20
3 1 SN74AHC1G00
SOT23-5
4 1 12.288MHZ
OSC003
5 1 32.768KHZ
OSC008
6 1 25MHZ OSC003 U51 DIGI-KEY SG-8002CA-PCC-ND
7 5 SN74LVC1G08
SOT23-5
8 2 MT48LC32M8A2
TSOP54 9 1 TJA1041 SOIC14 U21 PHILIPS TJA1041T 10 1 FDS9431A SOIC8 U28 FAIRCHILD FDS9431A 11 3 LMV722M SOIC8 U29-31 NATIONAL
U36 IDT IDT74FCT3244APYG
U39 TI SN74AHC1G00DBVR
U4 DIGI-KEY SG-8002CA-PCC-ND
Y2 EPSON MC-156-32.7680KA-
U22,U47-50 TI SN74LVC1G08DBVR
U15-16 MICRON MT48LC32M8A2P-75
Manufacturer Part Number
(12.288M)
A0:ROHS
(25.00M)
LMV722MNOPB
SEMI
12 1 LTC3727EUH-1
VQFN32
U20 LINEAR
TECH
LTC3727EUH-1PBF
ADSP-BF538F EZ-KIT Lite Evaluation System Manual A-1
Ref. Qty. Description Reference
Designato r
13 2 FDS6990AS SOIC8 U12-13 FAIRCHILD FDS6990AS
Manufacturer Part Number
14 1 BF538
M29W320EB “U24”
15 1 ADM708SARZ
SOIC8
16 1 AD1854JRSZ
SSOP28
17 1 AD1871YRSZ
SSOP28
18 1 ADG752BRTZ
SOT23-6
19 1 ADM3202ARNZ
SOIC16
20 2 AD623ARMZ
USOIC8
21 2 AD820ARZ SOIC8 U11,U23 ANALOG
22 4 ADG774ABRQZ
QSOP16
23 1 ADSP-BF538F
MBGA316
U24 ST MICRO M29W320EB70ZE6E
U27 ANALOG
DEVICES
U38 ANALOG
DEVICES
U33 ANALOG
DEVICES
U6 ANALOG
DEVICES
U32 ANALOG
DEVICES
U2-3 ANALOG
DEVICES
DEVICES
U54-57 ANALOG
DEVICES
U1 ANALOG
DEVICES
ADM708SARZ
AD1854JRSZ
AD1871YRSZ
ADG752BRTZ-REEL
ADM3202ARNZ
AD623ARMZ
AD820ARZ
ADG774ABRQZ
ADSP-BF538BBCZ-5F8
24 5 RUBBER FOOT M1-5 MOUSER 517-SJ-5018BK 25 1 PWR 2.5MM_JACK
CON005
26 5 MOMENTARY
SWT013 27 3 .05 45X2 CON019 J1-3 SAMTEC SFC-145-T2-F-D-A 28 2 DIP8 SWT016 SW1,SW7 C&K TDA08H0SB1 29 1 DIP6 SWT017 SW8 CTS 218-6LPST
J7 SWITCH-
CRAFT
SW9-13 PANASONIC EVQ-PAD04M
RAPC712X
A-2 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference
Designato r
30 5 DIP4 SWT018 SW2,SW4-6,
SW14
31 1 DB9 9PIN
CON038
32 2 RJ11 4PIN
CON039 33 1 DIP2 SWT020 SW3 C&K TDA02H0SB1 34 3 IDC 2X1 IDC2X1 JP6,JP8-9 FCI 90726-402HLF 35 1 IDC 3X1 IDC3X1 JP1 FCI 90726-403HLF 36 2 IDC 5X2 IDC5X2 P11-12 FCI 68737-410HLF 37 1 IDC 7X2 IDC7X2 ZP4 FCI 68737-414HLF 38 4 IDC 10X2
IDC10X2 39 2 IDC 17X2
IDC17X2 40 1 IDC 20X2
IDC20X2
J6 NORCOMP 191-009-213-L-571
J5,J11 TYCO 5558872-1
P3-4,P9-10 FCI 68737-420HLF
P6-7 FCI 68737-434HLF
P8 FCI 68737-440HLF
Manufacturer Part Number
ITT TDA04HOSB1
41 1 2.5A RESETABLE
FUS001 42 3 IDC
2PIN_JUMPER_SH
ORT 43 2 3.5MM
STEREO_JACK
CON001 44 3 IDC 3X2 IDC3X2 P13-15 SULLINS GEC03DAAN 45 2 IDC 6X2 IDC6X2 P1-2 FCI 68737-412HLF 46 5 YELLOW LED001 LED2-6 PANASONIC LN1461C 47 1 0.1UF 50V 10%
0805
F1 RAYCHEM SMD250F-2
SJ5-7 DIGI-KEY S9001-ND
J9-10 A/D ELEC-
TRONICS
C116 AVX 08055C104KAT
ST-323-5
ADSP-BF538F EZ-KIT Lite Evaluation System Manual A-3
Ref. Qty. Description Reference
Designato r
48 1 10UF 16V 10% C CT7 AVX TAJC106K016R
Manufacturer Part Number
49 6 10K 1/10W 5%
0805
50 4 100 1/10W 5%
0805
51 4 600 100MHZ
200MA 0603
52 1 2A S2A DO-214AA D4 MICRO
53 2 68UF 25V 20%
CAP003 54 1 10UH 20% IND001 L1 TDK 445-2014-1-ND 55 1 190 100MHZ 5A
FER002 56 1 1A ZHCS1000
SOT23-312 57 5 1UF 10V 10% 0805 C131,C210,C220
58 11 10UF 6.3V 10%
0805 59 2 1000PF 10V 20%
0805
R69-74 VISHAY CRCW080510K0JNEA
R82,R100-101, R103
FER1-4 DIGI-KEY 490-1014-2-ND
CT1-2 PANASONIC EEE-FC1E680P
FER7 MURATA DLW5BSN191SQ2
D5 ZETEX ZHCS1000TA pb-free
-222 C206-209,
C212-218 C119,C123 DIGI-KEY 311-1136-1-ND
VISHAY CRCW0805100RJNEA
S2A-TP
COMM
AVX 0805ZC105KAT2A
AVX 080560106KAT2A
60 13 0.1UF 10V 10%
0402
C55-57,C59-60, C111-115,C120, C126,C136
AVX 0402ZD104KAT2A
A-4 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference
Designato r
61 71 0.01UF 16V 10%
0402
62 28 10K 1/16W 5%
0402
63 1 4.7K 1/16W 5%
0402
64 5 0 1/16W 5% 0402 R120-121,R163,
65 4 1.2K 1/16W 5%
0402
C1-27,C30-46, C91-93,C95-97, C103-104, C107-109,C132, C137,C141, C143-147, C202-205,C211, C225-227
R2-3,R5,R7,R9, R12-16,R24-25, R77,R79-80, R84-85,R87-90, R162,R169, R171-172,R176, R179,R182,R216
R4 VISHAY CRCW04024K70JNED
R207,R215 R10,R67-68,R175 PANASONIC ERJ-2GEJ122X
Manufacturer Part Number
AVX 0402YC103KAT2A
VISHAY CRCW040210K0FKED
PANASONIC ERJ-2GE0R00X
66 6 33 1/16W 5% 0402 R1,R8,R54,
R75-76,R119 67 2 18PF 50V 5% 0805 C28-29 AVX 08055A180JAT2A 68 2 100MA CMDSH-3
SOD-323 69 2 100UF 10V 10% C CT3,CT5 KOA TMC1ACTTE107K 70 2 1000PF 50V 5%
0402 71 9 0.1UF 16V 10%
0603
72 2 33PF 50V 5% 0603 C118,C122 PANASONIC ECJ-1VC1H330J
D1-2 CENTRAL
C127-128 AVX 04025C102JAT2A
C64,C72-74, C87-89,C125, C130
PANASONIC ERJ-2GEJ330X
CMDSH-3-E3
SEMI
AVX 0603YC104KAT2A
ADSP-BF538F EZ-KIT Lite Evaluation System Manual A-5
Ref. Qty. Description Reference
Designato r
Manufacturer Part Number
73 4 0.01UF 16V 10%
0603
74 1 4.7UF 25V 20%
0805
75 2 330PF 50V 5%
0603
76 4 10K 1/10W 5%
0603
77 1 10M 1/10W 5%
0603
78 2 100K 1/10W 5%
0603
79 8 330 1/10W 5%
0603
80 5 0 1/10W 5% 0603 R27,R113,R115,
81 7 10 1/10W 5% 0603 R6,R55-57,R59,
82 2 10.0K 1/16W 1%
0603
83 1 25.5K 1/16W 1%
0603
C50-51,C62-63 AVX 0603YC103KAT2A
C110 AVX 0805ZD475KAT2A
C79,C84 AVX 06035A331JAT2A
R37,R53,R81, R99
R11 VISHAY CRCW060310M0FNEA
R20,R26 VISHAY CRCW0603100KJNEA
R83,R91-96,R98 VISHAY CRCW0603330RJNEA
R118,R168
R62,R112 R64,R102 DALE CRCW060310K0FKEA
R104 DIGI-KEY 311-25.5KHRTR-ND
VISHAY CRCW060310K0JNEA
PHYCOMP 232270296001L
VISHAY CRCW060310R0JNEA
84 1 4700PF 16V 10%
0603
85 4 237.0 1/10W 1%
0603
86 2 750.0K 1/10W 1%
0603
87 3 11.0K 1/10W 1%
0603
C90 DIGI-KEY 311-1083-2-ND
R23,R29,R31, R33
R30,R32 DIGI-KEY 311-750KHRTR-ND
R39-40,R60 DIGI-KEY 311-11.0KHRTR-ND
DIGI-KEY 311-237HRTR-ND
A-6 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
ADSP-BF538F EZ-KIT Lite Bill Of Materials
Ref. Qty. Description Reference
Designato r
88 4 5.49K 1/10W 1%
0603 89 2 3.32K 1/10W 1%
0603 90 2 1.65K 1/10W 1%
0603 91 2 49.9K 1/10W 1%
0603 92 2 604.0 1/10W 1%
0603 93 2 90.9K 1/10W 1%
0603 94 2 0.1 1/10W 1% 0603 R61,R148 PANASONIC ERJ-3RSFR10V 95 2 10.0K 1/10W 1%
0603 96 8 5.76K 1/10W 1%
0603 97 4 120PF 50V 5%
0603
R42-43,R46-47 DIGI-KEY 311-5.49KHRTR-ND
R44,R48 DIGI-KEY 311-3.32KHRTR-ND
R45,R49 DIGI-KEY 311-1.65KHRTR-ND
R38,R41 DIGI-KEY 311-49.9KHRTR-ND
R50-51 DIGI-KEY 311-604HRTR-ND
R58,R63 DIGI-KEY 311-90.9KHRTR-ND
R159-160 DIGI-KEY 311-10.0KHRTR-ND
R17-19,R21-22, R28,R34-35
C47-49,C71 AVX 06035A121JAT2A
Manufacturer Part Number
DIGI-KEY 311-5.76KHRTR-ND
98 12 100PF 50V 5%
0603
99 4 1000PF 50V 5%
0603 100 2 62.0 1/10W 1%
0603 101 4 220PF 50V 5%
0603 102 2 680PF 50V 5%
0603
C52-54,C61,C65, C68,C75,C77, C81,C85,C94, C106
C66-67,C69-70 PANASONIC ECJ-1VC1H102J
R65-66 DIGI-KEY 311-62.0HRTR-ND
C82,C86,C117, C124
C80,C83 PANASONIC ECJ-1VC1H681J
AVX 06035A101JAT2A
PANASONIC ECJ-1VC1H221J
ADSP-BF538F EZ-KIT Lite Evaluation System Manual A-7
Ref. Qty. Description Reference
Designato r
Manufacturer Part Number
103 2 2200PF 50V 5%
0603
104 2 2.74K 1/10W 1%
0603
105 2 15.0K 1/16W 1%
0603 106 2 27PF 50V 5% 0402 C121,C129 AVX 04025A270JAT2A 107 1 10UF 10V 10%
0805 108 1 61.9K 1/16W 1%
0603 109 1 105.0K 1/16W 1%
0603 110 2 20.0K 1/16W 1%
0603 111 2 8UH 20% IND008 L2-3 WURTH
112 2 0.015 1W 1% 0815 R114,R116 SUSUMU RL3720WT-015-F 113 2 10UF 16V 10%
1210
C76,C78 PANASONIC ECJ-1VB1H222K
R36,R52 DIGI-KEY 311-2.74KHRTR-ND
R106-107 DIGI-KEY 311-15.0KHRTR-ND
C98 PANASONIC ECJ-2FB1A106K
R111 PANASONIC ERJ-3EKF6192V
R108 PANASONIC ERJ-3EKF1053V
R109-110 PANASONIC ERJ-3EKF2002V
744392820
ELECTRON.
C58,C135 AVX 1210YD106KAT2A
114 1 GREEN LED001 LED7 PANASONIC LN1361CTR 115 1 RED LED001 LED8 PANASONIC LN1261CTR 116 2 150UF 6.3V 10% D CT4,CT6 PANASONIC EEFUE0J151R
A-8 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
A B C
D
1
1
2
2
ADSP-BF538F EZ-KIT LITE
SCHEMATIC
3
ANALOG
4
DEVICES
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
3
4
Title
ADSP-BF538F EZ-KIT LITE
TITLE
Size Board No.
C
Date Sheet of
A B C D
A0203-2006
Rev
1.2B
1314-29-2008_15:54
PPI0 PPI1 PPI2 PPI3
F1 E1 E2 B4 D1 D2 C1 C2 B1 B3 A2 A3 B8 A8 B7 A7
A5 B5 A6 B6 A4
D
SPISS/PF0_PB1 SPI0SEL1/TMRCLK/PF1_PB2 SPI0SEL2/PF2_PB3 PPI_FS3/SPI0SEL3/PF3_PB4 PPI15/SPI0SEL4/PF4 PPI14/SPI0SEL5/PF5 PPI13/SPI0SEL6/PF6 PPI12/SPI0SEL7/PF7 PPI11/PF8 PPI10/PF9 PPI9/PF10 PPI8/PF11 PPI7/PF12 PPI6/PF13 PPI5/PF14 PPI4/P15
PPI0 PPI1 PPI2 PPI3 PPI_CLK
1
2
A B C
U1
R2 P2 N2
J3 P1 N1
M1
G3
L1
K1
J2 H3 H2
J1 H1 D3
B9
B10 Y15 Y16
T1
R1
G2
F2
G1
U1
RSCLK0 RFS0 DR0PRI DR0SEC TSCLK0 TFS0 DT0PRI DT0SEC
RSCLK1 RFS1 DR1PRI DR1SEC TSCLK1 TFS1 DT1PRI DT1SEC
SCL0 SDA0 SCL1 SDA1
RX0 TX0
MOSI0 MISO0 SCK0
CANTX/PC0
CANRX/PC1
PC4 PC5 PC6 PC7 PC8 PC9
MOSI1/PD0 MISO1/PD1
SCK1/PD2
SPI1SS/PD3
SPI1SEL/PD4
MOSI2/PD5 MISO2/PD6
SCK2/PD7
SPI2SS/PD8
SPI2SEL/PD9
RX1/PD10
TX1/PD11
RX2/PD12
TX2/PD13
EMU
TMS
TCK
TRST
TDI
TDO
B12 B11 F19 E19 C19 D19 F20 B17
C16 C14 C17 C15 C13 C9 C10 C11 C8 C7 C5 C6 W14 W15
T2 U2 W1 U1 V1 Y2
R4
4.7K 0402
CANTX/PC0_CTS CANRX/PC1_RTS PC4_LED1 PC5_LED2 PC6_LED3 PC7_LED4 PC8_LED5 PC9_LED6
MOSI1/PD0 MISO1/PD1 SCK1/PD2 SPI1SS/PD3 SPI1SEL/PD4_AUDIO_RESET MOSI2/PD5 MISO2/PD6 SCK2/PD7_PPI_DIR_CTL SPI2SS/PD8_PPI_CLK_SELECT SPI2SEL/PD9_CAN_ERR RX1/PD10 TX1/PD11 RX2/PD12 TX2/PD13
EMU TMS TCK TRST TDI TDO
RSCLK2/PE0 RFS2/PE1 DR2PRI/PE2 DR2SEC/PE3 TSCLK2/PE4 TFS2/PE5 DT2PRI/PE6 DT2SEC/PE7 RSCLK3/PE8 RFS3/PE9 DR3PRI/PE10 DR3SEC/PE11 TSCLK3/PE12 TFS3/PE13 DT3PRI/PE14 DT3SEC/PE15
TMR0 TMR1/PPI_FS1 TMR2/PPI_FS2
A[1:19]
1
ARDY
AOE ARE
AWE
ABE0
2
ABE1
BR BG
BGH
BMODE0 BMODE1
A1 A2 A3 A4 A5 A6 A7 A8
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
U1
N19
A1
N20
A2
P19
A3
P20
A4
R19
A5
R20
A6
T19
A7
T20
A8
U19
A9
U20
A10
V19
A11
V20
A12
W18
A13
W20
A14
W17
A15
Y19
A16
Y18
A17
W16
A18
Y17
A19
E20
ARDY
K20
AOE
L19
ARE
L20
AWE
M19
ABE0~/SDQM0
M20
ABE1~/SDQM1
G18
BR
V14
BG
V15
BGH
V5
BMODE0
V4
BMODE1
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14 D15
AMS0 AMS1 AMS2 AMS3
SRAS SCAS
SWE
SCKE
CLKOUT
SA10
SMS
CLKIN
XTAL
RTXI
RTXO
Y10 W10 Y9 W9 Y8 W8 Y7 W7 Y6 W6 Y5 W5 Y4 W4 Y3 W3
J18 K19 J19 K18
G20 H19 H20 C20 G19 J20 D20
A13 A14
A11 A10
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
AMS0 AMS1 AMS2 AMS3
SRAS SCAS SWE SCKE
SA10 SMS
CLKIN
RTXI RTXO
D[0:15]
R8 33 0402
SCLK
RSCLK0
RFS0
DR0PRI
DR0SEC
TSCLK0
TFS0
DT0PRI
DT0SEC
RSCLK1
RFS1
DR1PRI
DR1SEC
TSCLK1
TFS1
DT1PRI
DT1SEC
SCL0
SDA0
SCL1
SDA1
RX0
TX0
MOSI0 MISO0
SCK0
W11
RSCLK2/PE0
Y11
RFS2/PE1
W12
DR2PRI/PE2
V13
DR2SEC/PE3
Y12
TSCLK2/PE4
Y13
TFS2/PE5
W13
DT2PRI/PE6
V16
DT2SEC/PE7
U18
RSCLK3/PE8
T18
RFS3/PE9
R18
DR3PRI/PE10
P18
DR3SEC/PE11
L18
TSCLK3/PE12
M18
TFS3/PE13
F18
DT3PRI/PE14
N18
DT3SEC/PE15
M2
TMR0
L2
TMR1/PPI_FS1
K2
TMR2/PPI_FS2
SPISS/PF0
SPI0SEL1/TMRCLK/PF1
SPI0SEL2/PF2
PPI_FS3/SPI0SEL3/PF3
PPI15/SPI0SEL4/PF4 PPI14/SPI0SEL5/PF5 PPI13/SPI0SEL6/PF6 PPI12/SPI0SEL7/PF7
PPI11/PF8 PPI10/PF9 PPI9/PF10 PPI8/PF11 PPI7/PF12 PPI6/PF13 PPI5/PF14 PPI4/PF15
PPI_CLK
B13
NMI
RESET
B14
NMI RESET
R75 33 0402
3
RTXI
RTXO
FCE
FRESET
H18 Y14
3.3V
FCE
R2 10K 0402
4U51
VDD
1 3
OE OUT
GND
2
25MHZ OSC003
R1 33 0402
CLKIN
3.3V
3.3V
R77 10K 0402
4
U5
VDD
OE OUT
GND
2
27MHZ OSC003
U6
R76 33
31
0402
SPI2SS/PD8_PPI_CLK_SELECT
EXPANSION_PPI_CLK
3
6
4
ADG752BRTZ SOT23-6
1
PPI_CLK
3
R11 10M 0603
R172
10K
10K
0402
Y2
C28 0805
1
TERM1 TERM2
2
NC1 NC2
32.768KHZ OSC008
4 3
C29 18PF18PF 0805
4
3.3V
U51
C141
0.01UF 0402
NMI
BR
ARDY
SDA0
SCL0
SDA1
SCL1
0402
R176 R175 10K 0402
1.2K 0402 0402
RTC
R10 R67
1.2K
1.2K 0402 0402
R68R171
1.2K
ANALOG
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
DSP
Size Board No.
C
Date Sheet of
A0203-2006
4
Rev
1.2B
13210-15-2007_13:17
A B C D
A B C
VDDEXT
D
VDDEXT
1
C206
U1
B15
VDDEXT1
K3
VDDEXT2
M7
VDDEXT3
N7
VDDEXT4
P7
VDDEXT5
R7
VDDEXT6
T7
VDDEXT7
T8
VDDEXT8
T9
VDDEXT9
T10
VDDEXT10
T11
VDDEXT11
U7
VDDEXT12
U8
VDDEXT13
U9
VDDEXT14
U10
VDDEXT15
U11
VDDEXT16
V7
2
R3 10K 0402
VDDINT
VROUT
3
VDDEXT17
V8
VDDEXT18
V9
VDDEXT19
V10
VDDEXT20
V11
VDDEXT21
A9
VDDRTC
B20
VROUT0
A19
VROUT1
A18
GPW
C12
VDDINT1
M14
VDDINT2
N14
VDDINT3
P14
VDDINT4
R14
VDDINT5
T12
VDDINT6
T13
VDDINT7
T14
VDDINT8
U12
VDDINT9
U13
VDDINT10
U14
VDDINT11
V12
VDDINT12
A1
GND1
A12
GND2
A15
GND3/
A17
GND4
A20
GND5
B2
GND6
B16
GND7
B18
GND8
B19
GND9
C3
GND10
C18
GND12
D7
GND13
D8
GND14
D9
GND15
D10
GND16
D11
GND17
D12
GND18
D13
GND19
D14
GND20
D18
GND21
E3
GND22
E7
GND23
E8
GND24
E9
GND25
E10
GND26
E11
GND27
E12
GND28
E13
GND29
E14
GND30
E18
GND31
F3
GND32
F7
GND33
F8
GND34
F9
GND35
F10
GND36
F11
GND37
F12
GND38
F13
GND39
F14
GND40
GND41 GND42 GND43 GND44 GND45 GND46 GND47 GND48 GND49 GND50 GND51 GND52 GND53 GND54 GND55 GND56 GND57 GND58 GND59 GND60 GND61 GND62 GND63 GND64 GND65 GND66 GND67 GND68 GND69 GND70 GND71 GND72 GND73 GND74 GND75 GND76 GND77 GND78 GND79 GND80
G7 G8 G9 G10 G11 G12 G13 G14 H7 H8 H9 H10 H11 H12 H13 H14 J7 J8 J9 J10 J11 J12 J13 J14 K7 K8 K9 K10 K11 K12 K13 K14 L3 L7 L8 L9 L10 L11 L12 L13
10UF 0805
VDDEXT
10UF 0805
VDDEXT
C92
0.01UF 0402
VDDINT
C208 C24 10UF
VDDINT
C1
0.01UF 0402
C15
0.01UF
C13
0.01UF 0402
C207 10UF 08050805
C6
0.01UF 0402 0402
C10
0.01UF 0402
0.01UF 0402
0.01UF 0402
C5
0.01UF
C11
0.01UF 04020402
C16C14
0.01UF 0402
C23
0.01UF 0402 0402
C7
0.01UF 0402
C9C209
0.01UF 0402
C27
0.01UF 0402
C22
0.01UF
C4 C3
0.01UF 0402
C12
0.01UF 0402
C26
0.01UF 0402
0.01UF 0402
0.01UF 0402
C8
0.01UF 0402
C25
0.01UF 0402
C21C18
0.01UF 0402
C2
0.01UF 0402
C91
0.01UF 0402
C20
0.01UF 0402
1
2
3
GND99
GND98
GND97
GND96
GND95
GND94
GND93
GND92
GND91
GND90
GND89
GND88
GND87
GND86
GND85
GND84
GND83
GND82
GND120
Y1
Y20
GND119
GND118
W19
GND117
W2
V18
GND116
GND115
V17
GND114
V6
V3
GND113
GND112
V2
GND111
T3 C4
U3
GND110 GND11
GND109
R13
GND108
R12
R11
GND107
GND106
R10
GND105
GND104
R9R8R3
GND103
GND102
P13
GND101
P12
P11
GND100
P10
P9
P8
P3
N13
N12
N11
N10
N9
N8
N3
M13
M12
M11
M9M8M3
M10
GND81
L14
C19
0.01UF 0402
C17
0.01UF 0402
C96C95
0.01UF 0402
0.01UF
ANALOG
C97
0.01UF 04020402
C93
0.01UF 0402
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4
DSP POWER
Size Board No.
C
A0203-2006
Date Sheet of
Rev
1.2B
13310-15-2007_13:17
A B C D
A[1:19]
A B C
D
3.3V
3.3V3.3V
U24
G2
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
A1 A2 A3 A4 A5 A6 A7 A8 A9
A0
F2
A1
E2
A2
C2
A3
D2
A4
F3
A5
E3
A6
C3
A7
D6
A8
C6
A9
E6
A10
F6
A11
D7
A12
C7
A13
E7
A14
F7
A15
G7
A16
D3
A17
E4
A18
F5
A19
F4
A20
D5
RESET
H7
BYTE
C4
RY/BY~
H2
CE
J2
OE
C5
WE
D4
VPP/WP~ M29W320EB
TFBGA63_80
1
A1 A2 A3 A4 A5 A6 A7 A8 A9
U16
23
A0
24
A1
25
A2
26
A3
29
A4
30
A5
31
A6
32
A7
33
A8
34
A9
22
A10
35
A11
36
A12
20
BA0
21
BA1
16
WE
17
CAS
18
RAS
39
DQM
MT48LC32M8A2 TSOP54
931
VDD1
VDD2
27
14
VDD3
VDD4
6
49
43
VDD5
VDD6
GND1
GND2
28
12
VDD7
GND3
GND4
46
41
GND5
GND6
52
54
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS
CKE
CLK
GND7
2 5 8 11 44 47 50 53
19 37 38
D8 D9 D10 D11 D12 D13 D14 D15
SMS SCKE SCLK
AMS0 AMS1 AMS2 AMS3
R216 10K 0402
FCE
SW6
1 2 3 4
DIP4 SWT018
ON
8 7 6
1 2 3 4 5
SW6: FLASH Enable Switch
R12 10K 0402
3.3V
R13
R14 R15
10K
10K
0402 0402
R16
10K
10K
0402 0402
U22
1 2
SN74LVC1G08 SOT23-5
U39
1 2
SN74AHC1G00 SOT23-5
U48
1 2
SN74LVC1G08 SOT23-5
4
U49
1 2
SN74LVC1G08
4
4
SOT23-5
4
U15
23
A1 A2 A3 A4 A5 A6 A7 A8 A9
A10
SA10
2
SWE SCAS SRAS
ABE0 ABE1
A12 A13
A18 A19
A0
24
A1
25
A2
26
A3
29
A4
30
A5
31
A6
32
A7
33
A8
34
A9
22
A10
35
A11
36
A12
20
BA0
21
BA1
16
WE
17
CAS
18
RAS
39
DQM
MT48LC32M8A2 TSOP54
13914274349
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
GND1
GND2
6
1228414652
VDD7
GND3
GND4
GND5
GND6
54
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7
CS CKE CLK
GND7
D0
2
D1
5
D2
8
D3
11
D4
44
D5
47
D6
50
D7
53
A10
SA10
19 37 38
SMS SCKE SCLK
SWE SCAS SRAS
A12 A13
A18 A19
J5
VDD
D0 D1 D2 D3 D4 D5 D6 D7 D8
D9 D10 D11 D12 D13 D14
D15/A-1
GND1
GND2
K2
K7
G3 K3 G4 K4 K5 G5 K6 G6 H3 J3 H4 J4 H5 J6 H6 J7
D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
D[0:15]
1
2
SW14
ON
1
1 2 3 4
64 MB SDRAM (8M x 8 x 4 banks) x 2 chips
3
2 3
DIP4 SWT018
SW14: FCE Enable Switch
8 7 6 54
FCE
RESET
ARE
AWE
4 MB FLASH (2M x 16)
3
Memory Map
C35
0.01UF 0402
C30
0.01UF 0402
C31
0.01UF 0402
C32
0.01UF 0402
C33 C34
0.01UF 0402
0.01UF 0402
C143
0.01UF 0402
END BANK
3.3V3.3V
3.3V
C42
0.01UF
C43
0.01UF 04020402
C41
0.01UF 0402
0.01UF 0402
C45C44
0.01UF
C46
0.01UF 04020402
C144
0.01UF 0402
C37
0.01UF 0402 0402
C38 C39
0.01UF
0.01UF 0402 0402
C40
0.01UF
C36
0.01UF 0402
0x0000 0000 0x03FF FFFF 0x2000 0000 ASYNC Memory Bank 0 0x2010 0000 0x2020 0000
0x200F FFFF 0x201F FFFF 0x202F FFFF 0x203F FFFF0x2030 0000 1 MB FLASH
SDRAM Bank 0 64MB SDRAM
ASYNC Memory Bank 1 ASYNC Memory Bank 2 ASYNC Memory Bank 3
DEVICESTART
1 MB FLASH 1 MB FLASH 1 MB FLASH
U16U15
U22
U24U49U48U39
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4

SDRAM AND FLASH

Size Board No.
C
Date Sheet of
A B C D
10-15-2007_13:17 4 13
A0203-2006
Rev
1.2B
A B C
3.3V
R169 10K 0402
U47
FER3
1
600
0603
C216 10UF 0805
R21
5.76K
R28
5.76K 06030603
SPI1SEL/PD4_AUDIO_RESET
RESET
1 2
SN74LVC1G08 SOT23-5
4
AUDIO_RESET
D
1
3.3V 5VA5V 5VA5V
C71 120PF 0603
U29
LMV722M SOIC8
R35
5.76K 0603
C47 120PF 0603
U29
LMV722M SOIC8
R22
5.76K 0603
C49 120PF 0603
U30
LMV722M SOIC8
R18
5.76K 0603
C48 120PF 0603
U30
LMV722M SOIC8
SW7
1 2 3
3
4 5 6 7 8
81 2 4 5 6 7
DIP8 SWT016
3.3V
ON
R24 10K 0402
16 15 14 13 12 11 10 9
C64
0.1UF 0603
AGND
R25 10K 0402
ADC_M~/S
RFS0_S RSCLK0_S DR0PRI_S
C214 10UF 0805
DR0PRI_S RSCLK0_S RFS0_S TSCLK0_S TFS0_S
VREF_AUDIO
R119 33 0402
2
3
R23
237.0
1
0603
C70 1000PF 0603
C68 100PF 0603
ADC LEFT
ADC
AGND
R33
237.0
7
1
7
0603
R31
237.0 0603
R29
237.0 0603
AGND
C67 1000PF 0603
C69 1000PF 0603
C66 1000PF 0603
C65 100PF 0603
MCLK
AUDIO_RESET
ADC RIGHT
3.3V
C54 100PF 0603
C51
0.01UF 0603
C50
0.01UF 0603
AGND
C63
0.01UF 0603 0603
C61 100PF 0603
U33
13
CAPLN
12
CAPLP
11
VINLP
10
VINLN
18
VINRP
19
VINRN
16
CAPRN
17
CAPRP
1
MCLK
24
RESET AD1871YRSZ
SSOP28
C62
0.01UF
DR0PRI
RSCLK0
RFS0
TSCLK0
TFS0
ADC_M~/S
CASC
XCTRL
CCLK/{256~/512}
COUT/{DF0}
CIN/{DF1}
CLATCH/{M~/S}
LRCLK
BCLK
DOUT
DIN
VREF
21
8 2 3 4 5
28 27 26 25
14
R20 100K 0603
AGND
C53 100PF 0603
R17
5.76K 0603
2
3
LABEL "LINE IN"
J9
CON001
1 5 4 3 2
LEFT_IN
RIGHT_IN
AMP_LEFT_IN LOOPBACK_LEFT LOOPBACK_RIGHT AMP_RIGHT_IN
R32
750.0K 0603
6
5
2
AGND
FER4 600
0603
AGND
R26 100K 0603
AGND
C52 100PF 0603
3
VREF_AUDIO
C215 10UF 0805
AGND
R34
5.76K 0603
R19
5.76K 0603
R30
750.0K 0603
2
3
6
5
FER2
0.1UF 0402
C56 C57
0.1UF 0402
0.1UF 0402
AGND
R27 0 0603
10UF 0805
600
0603
C213C212 10UF 0805
C59C55
0.1UF 0402
C60
0.1UF 0402
C145
0.01UF 0402
SW7: Audio Selection Switch
ANALOG
20 Cotton Road Nashua, NH 03063
4
AGND
U29 U30
U33
AGND
U33
U47
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4

ADC AND AUDIO IN

Size Board No.
C
Date Sheet of
A B C D
10-15-2007_13:17 5 13
A0203-2006
Rev
1.2B
A B C
D
1
R43
5.49K 0603
R47
5.49K 0603
R44
3.32K 0603
R45
1.65K 0603
R48
3.32K 0603
R49
1.65K 0603
R40
11.0K 0603
3.3V
DAC LEFT
R53 10K 0603
U4
1 3
OE OUT
12.288MHZ OSC003
2
3.3V
R54 33 0402
TSCLK0_S
AUDIO_RESET
R37 10K 0603
TFS0_S
DT0PRI
MCLK
U38
10
96/48~
6
384/256~
7
X2MCLK
2
MCLK
26
BCLK
25
LRCLK
27
SDATA
4
CCLK
3
CLATCH
5
CDATA
24
RESET
9
DEEMP
23
MUTE
21
IDPM0
20
IDPM1 AD1854JRSZ
SSOP28
DAC
OUTL-
OUTL+
OUTR-
OUTR+
FILTR FILTB
ZEROL
ZEROR
16 17
13 12
14 19
22 8
C218 C217 10UF 0805
AGND
C87
0.1UF 0603
10UF 0805
DAC RIGHT
C77 100PF 0603
C75 100PF 0603
5.49K 0603
R39
11.0K 0603
R46
5.49K 0603
C79 330PF 0603
C80 680PF 0603R42
R52
2.74K 0603
C84 330PF 0603
C83 680PF 0603
C81 100PF 0603
2
3
C82 220PF 0603
C85 100PF 0603
6
5
U31
LMV722M SOIC8
U31
LMV722M SOIC8
CT2 68UF CAP003
1
CT1 68UF CAP003
7
R50
604.0 0603
LEFT_OUT
LOOPBACK_LEFT
LOOPBACK_RIGHT
RIGHT_OUT
R51
604.0 0603
C78 2200PF 0603
C76 2200PF 0603
AGND
R41
49.9K 0603
R38
49.9K 0603
LABEL "LINE OUT"
J10
1 5 4 3 2
CON001
1
2
R36
2.74K 0603
3
VREF_AUDIO
5V A5V
0.1UF 0603
C73C72
0.1UF 0603
C74
0.1UF 0603
3.3V
C146
0.01UF 0402
C86 220PF 0603
AGND
3
AGND
U38 U38
U31
U4
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4

DAC AND AUDIO OUT

Size Board No.
C
Date Sheet of
A B C D
10-15-2007_13:17 6 13
A0203-2006
Rev
1.2B
A B C
D
1
3.3V
5V
R79
R80
10K
10K
0402
0402
U21
2
SPI2SEL/PD9_CAN_ERR
CANRX/PC1_RTS
CANTX/PC0_CTS
SW2
1 2 3 4
DIP4 SWT018
5V3.3V
ON
8 7 6
1 2 3 4 5
SW2: CAN Enable Switch
6
14
8
1 4
5103
VIO
EN STB ERR
TXD RXD SPLIT
TJA1041 SOIC14
VDD
VBAT
WAKE
CANH
CANL
GND
2
INH
7 9
13 11 12
C106 100PF 0603
C90 4700PF 0603
C94 100PF 0603
R65
62.0
62.0 0603
R55 10 06030603
R62R66 10 0603
3.3V
R81 10K 0603 DNP
J11 1 2 3 4
CON039
J5 1 2 3 4
CON039
LABEL "CAN"
1
2
CAN
C103
0.01UF
3
U21
C104
0.01UF 04020402
3
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4
CAN
Size Board No.
C
Date Sheet of
A B C D
10-15-2007_13:17 7 13
A0203-2006
Rev
1.2B
A B C
3.3V
R87 10K 0402
LABEL "PB1"
SW13
1
MOMENTARY SWT013
LABEL "PB2"
SW12 MOMENTARY SWT013
2
LABEL "PB3"
SW11 MOMENTARY SWT013
R100 100 0805
R101 100 0805
R103 100 0805
C222 1UF 0805
R88 10K 0402
C221 1UF 0805
R89 10K 0402
C220 1UF 0805
U37
74LVC14A SOIC14
U37
5 6
74LVC14A SOIC14
U37
74LVC14A SOIC14
R6 10 0603
43
R56 10 0603
R57 10 0603
89
RS_P0
ELVIS_SELECT
RS_P1
SW5
ON
1
1 2 3 4
2 3
DIP4 SWT018
8 7 6 54
SW5: Push Button Enable Switch
RS_P2
SPISS/PF0_PB1 SPI0SEL1/TMRCLK/PF1_PB2 SPI0SEL2/PF2_PB3 PPI_FS3/SPI0SEL3/PF3_PB4
3.3V
R179 10K 0402
WS_P0_1
PC4_LED1
WS_P1_1
PC5_LED2
WS_P2_1
PC6_LED3
WS_P3_1
PC7_LED4
WS_P4_1
PC8_LED5
WS_P5_1
PC9_LED6
U54
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
1
S
15
E ADG774ABRQZ
QSOP16 U55
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
1
S
15
E ADG774ABRQZ
QSOP16
YA
YB
YC
YD
YA
YB
YC
YD
4
7
9
12
4
7
9
12
U36
2
1A1
4
1A2
6
1A3
8
1A4
11
2A1
13
2A2
15
2A3
17
2A4
1
OE1
19
OE2 IDT74FCT3244APY
SSOP20
1Y1 1Y2 1Y3 1Y4
2Y1 2Y2 2Y3 2Y4
18 16 14 12
9 7 5 3
LED6 YELLOW LED001
R83 330
LED5 YELLOW LED001
R91 330 06030603
LED4 YELLOW LED001
R92 R93 330 0603
3.3V
LED3 YELLOW LED001
330 0603 0603
D
LED2 YELLOW LED001
R94 R95 330
LED1 YELLOW LED001 DNP
330 0603 0603
3.3V
POWER LED7 GREEN LED001
R96 330
1
2
R85 10K 0402
SW3
1
1 2
2
SWT020 DIP2
ON
4 3
LABEL "PB4"
SW10 MOMENTARY SWT013
R82 100 0805
R90 10K 0402
C210 1UF 0805
U37
1 2
74LVC14A SOIC14
R59 10 0603
RS_P3
3.3V
RESET LED8 RED LED001
R182 10K 0402
BMODE0 BMODE1
R84 10K 0402
SW3: Boot Mode Select Switch
3
3.3V
DA_SOFT_RESET
R162 0402
R5 10K10K 0402
AS_P3_1
R9 10K 0402
RESET
SW9 MOMENTARY SWT013
U50
1 2
SN74LVC1G08 SOT23-5
R7 10K 0402
4
U27
4
RESETMR
PFI
RESET
ADM708SARZ SOIC8
PFO
R98 330 0603
81 7 5
RESET
1
BMODE12BOOT MODEBMODE0
ON ON OFF OFF ON
OFFOFF
EXECUTE FROM 16-BIT EXTERNAL MEMORYON BOOT FROM 16-BIT FLASH MEMORY BOOT FROM SPI SERIAL MASTER BOOT FROM SPI SERIAL SLAVE
DEFAULT
3
U37
1213
74LVC14A SOIC14
3.3V
C109
0.01UF 0402
C107
0.01UF 0402
C108
0.01UF 0402
4
U37
11 10
74LVC14A SOIC14
C211 C225
0.01UF 0402
0.01UF 0402
C147
0.01UF 0402
Title
ANALOG DEVICES
ADSP-BF538F EZ-KIT LITE
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
4
PUSH BUTTONS, LEDS AND BOOT MODE
U37 U27
Size Board No.
U36 U54 U55 U50
C
Date Sheet of
4-29-2008_15:55 8 13
A B C D
A0203-2006
Rev
1.2B
A B C
R163 0 0402
VDDINT_SHUNT VDDINT
A5V
R58
90.9K 0603
1
U2
U11
AD820ARZ SOIC8
A5V
6
R61
0.1 0603
R60
11.0K 0603
IN+
2
IN-
8
RG+ RG-
AD623ARMZ USOIC8
V+
OUT
REF
R102
10.0K 0603
2
3
73 4
V-
6 51
C205
0.01UF 0402
R160
10.0K 0603
ACH2+
ACH0+
LEFT_IN
DAC0 DAC1
FUNC_OUT
SW8: Function Generator Switch
SW8
1 2 4 5 6
3
DIP6 SWT017
ON
1 2 3 4 5 6 7
12 11 10 9 8
AMP_LEFT_IN AMP_RIGHT_INRIGHT_IN
ACH3+
ACH4+
SW1
1 2 3
3
4 5 6 7 8
81 2 4 5 6 7
DIP8 SWT016
SW1: Oscilloscope Select Switch
D
ON
16 15 14 13 12 11 10 9
AMP_LEFT_IN AMP_RIGHT_IN LEFT_OUT RIGHT_OUT
1
AGND
U11
C202
0.01UF 0402
6
A5V
C203
0.01UF 0402
ACH1+
V_UNREG
JP6
1 2
IDC2X1
SHORTING JUMPER DEFAULT=NOT INSTALLED
ELVIS Voltage Selection Jumper
ELVIS_TRIGGER_S
RS_P0
WS_P4_1 WS_P2_1 WS_P0_1
ELVIS_5V
ELVIS_PF5_S ELVIS_PF2_S
VDDINT
ACH4+ ACH3+
ACH2+ ACH1+ ACH0+
FUNC_OUT
VDDINT
VDDINT_SHUNT
DAC0
P16
ELVIS_5V
P5
A01
+15_P_1
A02
+15_P_2
A03
+5_P_1
A04
+5_P_2
A05
+5_P_3
A07 B07
RS_P[6] RS_P[7]
A08 B08
RS_P[4] RS_P[5]
A09 B09
RS_P[2] RS_P[3]
A10 B10
RS_P[0] RS_P[1]
A14 B14
WS_P[6]_1 WS_P[7]_1
A15
WS_P[4]_1 WS_P[5]_1
A16 B16
WS_P[2]_1 WS_P[3]_1
A17
WS_P[0]_1 WS_P[1]_1 ID6 ID7
ID4 ID5 ID2 ID3
A22
ID0 ID1
A24
NC1
A28
AS_P[0]_1
A29
PB_PRES_1
A30
UPDATE
A31 B31
CONVERT EXTSRTOBE
A32
SCANCLK
A33
TRIG1_2
A34
GATE1_1
A36
GPCTR0_OUT_1
A37 A38 B38
VH_1 VL_1
A40
ACH7_1
A41
ACH6_1
A42
ACH5_1
A43
ACH4
A45
ACH3
A46
ACH2
A47
ACH1
A48
ACH0
A49
AISENSE_1
A53 B53
FG_SYNC_1 FM_1
A54
FG_SIG_1
A55
GND14
A56
NC5
A57
ZL_1
A58
ZH_1
A60 B60
DAC0_2 DAC1_2
A62 B62
VDCA_1 VDCB_1
1 2 3 4
IDC2X2 DNP
GPCTR0_GATEGPCTR0_SOURCE
-15_P_1
-15_P_2 GND1 GND2 GND3 GND4GND5
GND6GND7
KEY1KEY2 KEY3KEY4
GND8GND9
GND10GND11 AS_P[7]_1 AS_P[5]_1AS_P[6]_1 AS_P[3]_1AS_P[4]_1 AS_P[1]_1AS_P[2]_1
+5V2
WFTRIG
STARTSCAN
TRIG2
SOURCE1_1
GPCRT1_OUT
FREQ_OUT
GND12GND13
AIGND1AIGND2 ACH15_1 ACH14_1 ACH13_1
ACH12
AIGND3AIGND4
ACH11 ACH10
ACH9 ACH8
NC2 KEY5KEY6 KEY7KEY8
NC3NC4
AM_1
+5V3
GND15
NC6 ZM_1
NC7NC8
GND16GND17
B01 B02 B03 B04 B05 B06A06
B11A11 B12A12 B13A13
B15 B17
B18A18 B19A19 B20A20 B21A21 B22 B23A23 B24 B25A25 B26A26 B27A27 B28 B29 B30
B32 B33 B34 B35A35 B36 B37
B39A39 B40 B41 B42 B43 B44A44 B45 B46 B47 B48 B49 B50A50 B51A51 B52A52
B54 B55 B56 B57 B58 B59A59
B61A61
RS_P3RS_P2 RS_P1
WS_P5_1 WS_P3_1 WS_P1_1
ELVIS_5V
AS_P3_1
ELVIS_PF6_S ELVIS_PF7_S
ELVIS_PF1_S
DAC1
ELVIS_TRIGGER_S
ELVIS_PF1_S
ELVIS_PF2_S
ELVIS_SELECT
PC7_LED4
PC8_LED5
PC9_LED6
U56
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
1
S
15
E ADG774ABRQZ
QSOP16 U57
2
I0A
3
I1A
5
I0B
6
I1B
11
I0C
10
I1C
14
I0D
13
I1D
1
S
15
E ADG774ABRQZ
QSOP16
PFI
3.3V
YA
YB
YC
YD
YA
YB
YC
YD
4
7
9
PC4_LED1
PC5_LED2
PC6_LED3
2
12
4
7
9
12
ELVIS_PF5_S
ELVIS_PF6_S
ELVIS_PF7_S
3
C88
0.1UF 0603
AGND
DSP CORE VOLTAGE & CURRENT
2
A5V
VDDEXTVDDEXT_SHUNT
3
R148
0.1 0603
C89
0.1UF 0603
U3
3 7
IN+
2
IN-
8
RG+
1 5
RG­AD623ARMZ
USOIC8
R104
25.5K 0603
V+
OUT
REF
AGND
R64
10.0K 0603
2
3
C204
0.01UF 0402
R159
10.0K 0603
4
V-
6
R63
90.9K 0603
U23
AD820ARZ SOIC8
DSP IO CURRENT
AGND
U21
JP8
21
IDC2X1
SHORTING JUMPER DEFAULT=NOT INSTALLED
ELVIS_SELECT
AGND
PCI32B
ELVIS CONNECTOR
NI ELVIS ID 33 (0010 0001)
C227
0.01UF 0402
U56 U57
C226
0.01UF 0402
ELVIS Select Jumper
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4

ELVIS INTERFACE

Size Board No.
C
A0203-2006
Date Sheet of
Rev
1.2B
13910-15-2007_13:17
A B C D
A B C
EXPANSION INTERFACE (TYPE B)
D
1
D[0:15] A[1:19]
2
3
SPI0SEL1/TMRCLK/PF1_PB2
SPI0SEL2/PF2_PB3 PC4_LED1
PPI_FS3/SPI0SEL3/PF3_PB4
PPI0 PPI2
5V
J1
2
4 A1 A3 A5 A7 A9
A11 A13 A15 A17 A19
D1 D0 D3 D5 D7 D9
D11 D13 D15
R168 0 0603
6
8
10
20
30
40
50
60
70
80
90
1 3 5 7 9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39 4142 4344 4546 4748 49 5152 5354 5556 5758 59 6162 6364 6566 6768 69 7172 7374 7576 7778 79 8182 8384 8586 8788 89
CON019
A2 A4 A6 A8 A10 A12 A14 A16 A18
D2 D4 D6 D8 D10 D12 D14
EXPANSION_PPI_CLK PPI1 PPI3
SPISS/PF0_PB1 PC5_LED2
MOSI1/PD0 MISO1/PD1
MOSI0 MISO0
TMR2/PPI_FS2
DT1PRI
TFS1
TSCLK1
DT0SEC DR0SEC
DT0PRI
TFS0
TSCLK0
PPI7/PF12 PPI9/PF10
PPI11/PF8 PPI13/SPI0SEL6/PF6 PPI15/SPI0SEL4/PF4
PC6_LED3 PC7_LED4
ABE1 ABE0
AOE
AWE
SMS
ABE0
SRAS
SA10 SCAS SWE
3.3V 3.3V
J2
CON019
1 3 5 7 9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39 4142 4344 4546 4748 49 5152 5354 5556 5758 59 6162 6364 6566 6768 69 7172 7374 7576 7778 79 8182 8384 8586 8788 89
SCK1/PD2 SPI1SS/PD3 SCK0 SPISS/PF0_PB1
CANRX/PC1_RTSCANTX/PC0_CTS NMI
TMR1/PPI_FS1TMR0 DR1SECDT1SEC DR1PRI RFS1 RSCLK1
DR0PRI RFS0 RSCLK0 PPI4/P15PPI5/PF14 PPI6/PF13 PPI8/PF11 PPI10/PF9 PPI12/SPI0SEL7/PF7 PPI14/SPI0SEL5/PF5
SDA0 AMS3 AMS2 AMS1 AMS0 ARDY ARE
ABE1 SCKE
SCLK
SPI0SEL1/TMRCLK/PF1_PB2
TX0 RX0
TX1/PD11 RX1/PD10
PPI_FS3/SPI0SEL3/PF3_PB4 SPI0SEL2/PF2_PB3
RFS2/PE1
DR2SEC/PE3
TFS2/PE5
DT2SEC/PE7
RFS3/PE9
DR3SEC/PE11
RESET RESET
TFS3/PE13
DT3SEC/PE15
PC9_LED6
MOSI2/PD5 MISO2/PD6
SCK2/PD7_PPI_DIR_CTL
2 4 6 8
10
20
30
40
50
60
70
80
90
5V
J3
2 4 6 8
10
20
30
40
50
60
70
80
90
CON019
1 3 5 7 9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39 4142 4344 4546 4748 49 5152 5354 5556 5758 59 6162 6364 6566 6768 69 7172 7374 7576 7778 79 8182 8384 8586 8788 89
SPISS/PF0_PB1
RSCLK2/PE0
DR2PRI/PE2
TSCLK2/PE4 DT2PRI/PE6 RSCLK3/PE8 DR3PRI/PE10 TSCLK3/PE12
SCLK DT3PRI/PE14 PC8_LED5 SPI1SEL/PD4_AUDIO_RESET
SPI2SS/PD8_PPI_CLK_SELECT SPI2SEL/PD9_CAN_ERR
BR BG BGH
SCL1SDA1
SCK0
R78
73.5 0402 DNP
C99 250PF 0402 DNP
All USB interface circuitry is considered proprietary and has been omitted from this schematic.
When designing your JTAG interface please refer to the
3.3V
Engineer to Engineer Note EE-68 which can be found at http://www.analog.com
R215 0 0402
ZP4
1 3 5 7
9 11 13
DA_SOFT_RESET
2 4 6 8 10 12 14
IDC7X2
RESET
DSP JTAG HEADER
DA_EMULATOR_SELECT DA_EMULATOR_EMU DA_EMULATOR_TMS DA_EMULATOR_TCK DA_EMULATOR_TRST DA_EMULATOR_TDI DA_EMULATOR_TDO
RESET DA_SOFT_RESET
DEBUG_AGENT
GND
3.3V
3V
SHGND
TMS
TCK
TRST
TDI
TDO
EMU
DA_GP0 DA_GP1 DA_GP2 DA_GP3
TMS TCK TRST TDI TDO EMU
1
2
3
SHGND
JP1
SCL0
SCK2/PD7_PPI_DIR_CTL
1
3
IDC3X1
2
ANALOG
20 Cotton Road Nashua, NH 03063
4
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4
EXPANSION INTERFACE & JTAG
Size Board No.
C
A0203-2006
Date Sheet of
A B C D
Rev
1.2B
131010-15-2007_13:17
A B C
D
5V 3.3V 5V
V_UNREGV_UNREG
SPORT 0
P6
2 1 4
TSCLK0
DR0PRI
1
DT0SEC
DT0PRI
RSCLK0
MOSI0 MISO0
SDA0
SCL0
TMR0 TMR1/PPI_FS1 TMR2/PPI_FS2
6
8 10 12
32
IDC17X2
3 5 7 9 11 1314 1516 1718 1920 2122 2324 2526 2728 2930 31 3334
RESET
TFS0
CANTX/PC0_CTS CANRX/PC1_RTS PC4_LED1 PC5_LED2 PC6_LED3 PC7_LED4 PC8_LED5 PC9_LED6
TSCLK1
DR1PRI
DR1SECDR0SEC
DT1SEC
DT1PRI
RSCLK1
MOSI0 MISO0
SCK0SCK0 SDA0 SCL0
TMR0 TMR1/PPI_FS1 TMR2/PPI_FS2
SPORT 1
P7
4 6
8 10 12 14 13 16 15 18 17 20 19 22 21 24 23 26 25 28 27 30 29 32 34 33
12 3 5 7 9 11
31
IDC17X2
3.3V
RESET RFS1RFS0
TFS1
CANTX/PC0_CTS CANRX/PC1_RTS PC4_LED1 PC5_LED2 PC6_LED3 PC7_LED4 PC8_LED5 PC9_LED6
TX0
CANTX/PC0_CTS
RX0
CANRX/PC1_RTS
SW4
1
1 2 3 4
2 3
DIP4 SWT018
C112
0.1UF 0402
C113
0.1UF 0402
ON
3.3V
1
U32
1
C1+
3
C1-
4
C2+
5
C2-
11 8 7 6 54
T1IN
10 7
T2IN T2OUT
ADM3202ARNZ SOIC16
V+
T1OUT
R1INR1OUT R2INR2OUT
2 6
V-
14
1312 89
C114
0.1UF 0402
C111
0.1UF 0402
J6
1
6
2
7
3
8
4
9
5
CON038
SCK0
R99 10K 0603
V_UNREG
5V 3.3V
R86
73.5 0402 DNP
2
C100 250PF
PPI
P8
IDC20X2
1 3 56 78 9 1112 1314 1516 1718 19 2122 2324 2526 2728 29 3132 3334 3536 3738 39
PPI1 PPI3 PPI5/PF14 PPI7/PF12 PPI9/PF10 PPI11/PF8 PPI13/SPI0SEL6/PF6 PPI15/SPI0SEL4/PF4 SPI0SEL2/PF2_PB3SPI0SEL1/TMRCLK/PF1_PB2 SPISS/PF0_PB1 TMR0 TMR1/PPI_FS1 TMR2/PPI_FS2
2 4
PPI_CLK
PPI0 PPI2
PPI4/P15 PPI6/PF13 PPI8/PF11 PPI10/PF9
PPI12/SPI0SEL7/PF7 PPI14/SPI0SEL5/PF5
PPI_FS3/SPI0SEL3/PF3_PB4
RESET
MOSI0 MISO0
3
SCK0 SDA0
SCL0
10
20
30
40
0402 DNP
SDA0 SCL0
CANTX/PC0_CTS
PC4_LED1 PC6_LED3 PC8_LED5
3.3V
TWI
P10
2 4 6
8 10 12 14 16 18 20
IDC10X2
V_UNREG
5V
1 3 5 7 9 11 13 15 17 19
RESET CANRX/PC1_RTS PC5_LED2 PC7_LED4 PC9_LED6
SW4: UART Enable Switch
JP9
IDC2X1
1 2
SHORTING JUMPER DEFAULT=INSTALLED
SERIAL PORT (UART 0)
UART 0 Loop Jumper
V_UNREG
3.3V
5V
SPI
P9
2 4
MISO0 MOSI0
SCK0
CANTX/PC0_CTS
PC4_LED1 PC6_LED3 PC8_LED5 PC9_LED6
6
8 10 12 14 16 18 20
1 3 5 7 9 11 13 15 17 19
IDC10X2
2
3
RESET CANRX/PC1_RTS PC5_LED2 PC7_LED4
3.3V 5V
TIMERS
P11
2
TMR0
TMR1/PPI_FS1
4
TMR2/PPI_FS2
6
10
IDC5X2
1 34 5 78 9
SPISS/PF0_PB1 SPI0SEL1/TMRCLK/PF1_PB2 SPI0SEL2/PF2_PB3
TX0
RX0
3.3V5V
UART
P12
2 4 3 6 8 7
10
IDC5X2
1
5
9
TX1/PD11 RX2/PD12
Title
ANALOG DEVICES
ADSP-BF538F EZ-KIT LITE
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD
4

STAMP CONNECTORS

Size Board No.
C
Date Sheet of
A B C D
10-15-2007_13:17 11 13
A0203-2006
Rev
1.2B
A B C
D
R69 10K
10K 08050805
1
RFS2/PE1
DR2PRI/PE2
DR2SEC/PE3
R71R70 10K 0805
P3
1
9
19
IDC10X2
R74 10K 0805 0805
R73 R72 10K
10K 0805
1
2 43 65 87 10 1211 1413 1615 1817 20
TFS2/PE5 TSCLK2/PE4RSCLK2/PE0 DT2PRI/PE6 DT2SEC/PE7
RFS3/PE9
DR3PRI/PE10
DR3SEC/PE11
P4
1 3 4 5 6 7 8
9 11 12 13 14 15 16 17 18 19
2
10
20
IDC10X2
TFS3/PE13 TSCLK3/PE12RSCLK3/PE8 DT3PRI/PE14 DT3SEC/PE15
SPORT2 SPORT3
2
MOSI1/PD0
SPI1SS/PD3
SCK1/PD2
SPI1SEL/PD4_AUDIO_RESET
MISO1/PD1
P1
1 3 5 7 9
11
IDC6X2
2 4 6 8 10 12
SPI2SS/PD8_PPI_CLK_SELECT
SCK2/PD7_PPI_DIR_CTL
SPI2SEL/PD9_CAN_ERR
MOSI2/PD5
MISO2/PD6
P2
1 3 5 7 9
11
IDC6X2
2 4 6 8 10 12
2
SPI 1 SPI 2
3
P13
IDC3X2
TWI1
2 4
ANALOG
20 Cotton Road
RX1/PD10 TX1/PD11
P14
1 3
IDC3X2
2 4 65
RX2/PD12
TX2/PD13
P15
1
3
5 6
IDC3X2
2 4
UART 1 UART 2
SCL1
SDA1
1 3 5 6
3
Nashua, NH 03063
4
DEVICES
PH: 1-800-ANALOGD
4
Title
ADSP-BF538F EZ-KIT LITE

MISC CONNECTORS

Size Board No.
C
Date Sheet of
A B C D
A0203-2006
Rev
1.2B
131210-15-2007_13:17
A B C
D
D4 S2A 2A DO-214AA
J7
1
C127 1000PF 0402
7.5V_POWER CON005
2
3
1
C128
SHGND
1000PF 0402
FER1 600
0603
2
M1
RUBBER FOOT
MSC009
MH1
MH8
MH2 MH3 MH5 MH6 MH7
MH9 MH10 MH11 MH12 MH13 MH14
M2 M3 M4 M5
RUBBER FOOT
MSC009
3
F1
2.5A FUS001
RUBBER FOOT
MSC009
FER7 190 FER002
4 1
RUBBER FOOT
MSC009
3 2
10UF C
RUBBER FOOT
MSC009
V_UNREG
C130CT7
0.1UF 0603
C120
0.1UF 0402
R109
20.0K 0603
R107
15.0K 0603
R106
15.0K 0603
R110
20.0K 0603
C136
0.1UF 0402
C118 33PF 0603
C122 33PF 0603
C129 27PF 0402
C124 220PF 0603
C117 220PF 0603
C121 27PF 0402
R108
105.0K 0603
R111
61.9K 0603
R121 0 0402 DNP
C119 1000PF 0805
C123 1000PF 0805
R120 0 0402
U20
28
RUN/SS1
30
SENSE1+
31
SENSE1-
1
VOSENSE1
2
PLLFLTR
3
PLLIN
4
FCB
5
ITH1
6
SGND
7
3VOUT
33
THSGND
8
ITH2
9
VOSENSE2
11
SENSE2-
12
SENSE2+ LTC3727EUH-1
VQFN32
PGOOD
TG1
SW1
BOOST1
VIN
BG1
EXTVCC
INTVCC
PGND
BG2
BOOST2
SW2
TG2
RUN/SS2
LABEL "5V"
5V@5A
5V
1
L3 8UH IND008
U12
R113 0 0603 DNP
27 26 25
24 23 22
21 20
C131 1UF 0805
19
18 17
15 14 13
1
2
C115
0.1UF 0402
D1 CMDSH-3 SOD-323
C110
4.7UF 0805
SOD-323 CMDSH-3 D2
C126
0.1UF 0402
2
1
FDS6990AS SOIC8
C116
0.1UF 0805
R112 10 0603
U13
FDS6990AS
SOIC8
8
7
C135 10UF 1210
C58 10UF 1210
7
8
R116
0.015 0815
3
4
L2 8UH IND008
U12
4
3
FDS6990AS SOIC8
SOIC8
FDS6990AS
R114
0.015 0815
C132
0.01UF 0402
U13
CT6 150UF D
5
6
2
V_UNREG
6
5
CT4 150UF D
LABEL "3.3V"
3.3V@3A
3.3V
TP7
3
C137
0.01UF 0402
LABEL "VDDINT"
C98 10UF 0805
3.3V
C125
0.1UF 0603
U28
1 2 3 4
FDS9431A SOIC8
L1
10UH 5 6 7 8
IND001
D5 ZHCS1000 SOT23D
R115 0 0603
CT5 100UF C
VROUT
R207 0 0402
4
CT3 100UF C
TP10VDDINT_SHUNT
3.3V
VDDEXT_SHUNT
LABEL "GND"
TP2
TP3 TP4
TP5 TP6
ANALOG
20 Cotton Road Nashua, NH 03063
R118 0 0603
Title
DEVICES
ADSP-BF538F EZ-KIT LITE
PH: 1-800-ANALOGD
4

POWER

Size Board No.
C
A0203-2006
Date Sheet of
A B C D
Rev
1.2B
131310-15-2007_13:17
INDEX

Numerics

2-wire interface (TWI), 1-13, 2-24
A
AD1854 digital-to-analog converter (DAC),
1-12
AD1871 analog-to-digital converter (ADC),
1-12, 2-12
ADC master/slave modes, 2-13 AMP_LEFT_IN signal, 2-14, 2-15 AMP_RIGHT_IN signal, 2-14, 2-15 ~AMS3-0 (flash select) pins, 1-7, 2-3, 2-11,
2-12
analog audio, See audio architecture, of this EZ-KIT Lite, 2-2 ASYNC (asynchronous memory control)
external memory banks 0-3, 1-8 register, 1-11
audio
circuit signals, 2-14, 2-15 codecs, See AD1854, AD1871 connectors (J9-10), 2-21 enable switch (SW7), 2-12 input configuration switch (SW8), 2-15 interface,
AUDIO_RESET signal, 2-5
xii, 1-12
B
background telemetry channel (BTC), 1-14 bill of materials, A-1 board schematic (ADSP-BF538F), B-1 boot mode select switch (SW3), 2-13
C
CAN
connectors (J5 and J11) enable switch (SW2), 2-10 ERR signal, 1-11, 2-6 interface, signals, 2-10
transceiver devices, -xi, 1-11 CANRX signal, 2-4 CANTX signal, 2-4 CCLK register, 1-10 clock
frequency, 1-9
in (CLK IN) signal, 2-3
loopback signal, 2-13
out (CLK OUT) signal, 2-3 codecs, See AD1854, AD1871 configuration, of this EZ-KIT Lite, 1-3
xi, 1-11
ADSP-BF538F EZ-KIT Lite Evaluation System Manual I-1
INDEX
connectors
diagram of locations, 2-20 J1-3 (expansion), 2-3, 2-8, 2-22 J5 and J11 (CAN), 2-21 J6 (RS-232), 2-21 J7 (power), 2-22 J9-10 (audio), 2-21 P10 (TWI), 2-24 P11 (timers), 2-24 P12 (UART1), 2-25 P3 (SPORT1), 2-4 P4 (SPORT2), 2-4 P6 (SPORT0), 1-13, 2-4, 2-23 P8 (PPI), 2-23 P9 (SPI), 2-4, 2-24 SPORT0-1 (P6-7), 2-23
ZP4 (JTAG), 2-9, 2-23 contents, of this EZ-KIT Lite package, 1-3 Controller Area Network, See CAN core voltage, 2-2 CTS signals, 2-10 customer support,
xv
D
DAC1-0 signals, 2-15 data acquisition (DAQ) device, 1-12 DB9 (UART) connector, default configuration, of this EZ-KIT Lite, 1-3 DIP switch (SW5), 1-4, 1-13 DR0PRI signals, 2-12 DR2PRI signal, 2-6 DR2SEC signal, 2-6 DR3PRI signal, 2-6 DR3SEC signal, 2-6 DT2PRI signal, 2-6 DT2SEC signal, 2-6 DT3PRI signal, 2-6 DT3SEC signal, 2-6
xii, 2-8
E
EBIU_SDBCTL register, 1-9, 1-10 EBIU_SDGCTL register, 1-9, 1-10 EBIU_SDRRC register, 1-9, 1-10 EBUI control signals, 2-8 Educational Laboratory Virtual
Instrumentation Suite interface, See ELVIS
ELVIS
interface, select jumper (JP8), 2-16
voltage select jumper (JP6), 2-16 ELVIS_PF1-2 signals, 2-5 ELVIS_PF5-7 signals, 2-5 EN (enable control input) signals, 2-10 ERR signals, 1-11, 2-6, 2-10 example programs, 1-14 expansion interface
connections, 1-13, 2-3, 2-4, 2-11
connectors (J1-3), 2-8, 2-22 external bus interface unit (EBIU), 2-3 external memory, 1-8, 2-3, 2-9
xi, 1-12, 2-14
F
FCE enable switch (SW14), 2-12 features, of this EZ-KIT Lite, flag pins, See programmable flags flash memory
boot mode, 2-13
connections, 2-3
enable switch (SW6), 1-10, 2-11 frame sync signals, 1-13 frequency, 1-9 FS loopback signal, 2-13 FUNCT_OUT signal, 2-15
xi
G
general-purpose IO pins, 1-13, 2-10, 2-11, 2-19 GND signal, 2-8
I-2 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
INDEX
H
Help, online, xix
I
installation, of this EZ-KIT Lite, 1-5 interfaces, See audio, CAN, ELVIS, expansion,
SDRAM
internal memory
core/system MMRs, 1-8 data banks A, B SRAM, 1-8 data banks A, B SRAM/CACHE, 1-8 instruction banks A, B SRAM, 1-8 instruction SRAM/CACHE, 1-8 reserved, 1-8 scratch pad SRAM, 1-8
via JTAG, 2-9 internal regulator, 2-2 IO voltage, 2-2
J
JTAG
connector (ZP4), 2-23
emulation port, 2-9 jumpers
diagram of locations, 2-9
JP1 (PPI dir control), 2-13
JP6 (ELVIS voltage), 2-16
JP8 (ELVIS select), 2-16
JP9 (UART), 2-14
L
LabVIEW virtual instruments, xi, 1-12 LEDs
diagram of locations, 2-17
LED2-6 (PC5-9), 1-13, 2-19
LED7 (power), 2-18
LED8 (reset), 2-18
ZLED3 (USB monitor), 1-5, 2-19
LEFT_IN signal, 2-15 LEFT_OUT signal, 2-14 license restrictions, LOOPBACK signal, 2-10
x, 1-7
M
Media Instruction Set Computing (MISC), ix memory
map, of this EZ-KIT Lite, 1-7
select pins, See ~AMS3-0, ~SMS0 Micro Signal Architecture (MSA), MISO2 signal, 2-5 MOSI0-1 signals, 2-5 MOSI2 signal, 2-5
ix
N
notation conventions, xxi NU signal, 2-10, 2-13
O
oscilloscope configuration switch (SW1), 2-14
P
package contents, 1-3 PB1-4 (SW13-10) push buttons, 2-11 PCx signals, See programmable flags PDx signals, See programmable flags PEx signals, See programmable flags PFx signals, See programmable flags power
connector (J7), 2-22
LED (LED7), 2-18
supply, 1-3 PPI
connector (P8), 2-23
direction control (JP1) jumper, 2-13 PPI_CLK_SEL signal, 2-6 PPI_D4-15 signals, 2-7
ADSP-BF538F EZ-KIT Lite Evaluation System Manual I-3
INDEX
PPI_DIR_CTL signal, 2-6 PPI_FS3 signal, 2-7 programmable flags
PC0 (UART transmit), 1-11, 2-4, 2-10 PC1 (UART receive), 1-11, 2-4, 2-10 PC5-9 (LED2-6), 1-13, 2-19 PD0-8 signals, 2-5 PD10-13, 2-6 PD7 (JP1), 2-13 PD9 (ERR), 1-11, 2-6, 2-10 PE0-15, 2-6 PF0-3 (SW13-10), 1-13, 2-7, 2-11, 2-18 PF4-15 (PPI), 2-7
push buttons
See also switches by name (SWx) diagram of locations, 2-17
R
real-time clock (RTC), 2-3 Reduced Instruction Set Computing (RISC), regulators, 2-2 reset
LEDs (LED8), 2-18 processor, 2-8
push button (SW9), 2-17 restriction, of the evaluation license, 1-7 RFS0 signal, 2-12 RFS2-3 signals, 2-6 RIGHT_IN signal, 2-15 RIGHT_OUT signal, 2-14 RS-232 connectors (J6), RSCLK0 signal, 2-12 RSCLK2-3 signals, 2-6 RTS signal, 2-10 RX0 signal, 2-10 RX1-2 signals, 2-6 RXDx (receive data output) signals, 1-11, 2-10
xii, 2-21
S
schematic, of ADSP-BF538F EZ-KIT Lite, B-1 SCLKx signals, 1-10, 2-5, 2-6 SDRAM
connections, 2-3 default settings, 1-9 interface, 1-8 memory map, 1-8
optimum settings, 1-9, 1-10 serial clock (SCL) signals, 1-9 serial peripheral interface, See SPI, SPI signals ~SMS0 (SDRAM select) pin, 1-7, 2-3 SPI
connector (P9), 2-24
interface, 2-4 SPI0SEL1-7 signals, 2-7 SPI1SEL signal, 2-5 SPI1SS signal, 2-5 SPI2SEL signal, 2-6 SPI2SS signal, 2-6
ix
SPISS signal, 2-7 SPORT0
connector (P6), 2-23
interface, 1-12, 2-4, 2-8 SPORT1
connector (P7), 2-23
interface, 2-4, 2-8 SRAM, 1-7
See also internal memory startup, of this EZ-KIT Lite, 1-5 STB (standby control input) signals, 2-10 stereo input/output channels, 1-12 SW10-13 (PD13-10) push buttons, 2-7, 2-18 SW14 (FCE enable) switch, 2-12 SW1 (audio/oscilloscope) switch, 2-14 SW2 (CAN enable) switch, 1-11, 2-10 SW3 (boot mode select) switch, 2-13 SW4 (UART) switch, 2-10 SW5 (push button enable) DIP switch, 1-13,
2-11, 2-18
I-4 ADSP-BF538F EZ-KIT Lite Evaluation System Manual
INDEX
SW6 (flash enable) switch, 1-10, 2-11 SW7 (audio enable) switch, 1-13, 2-12 SW8 (audio input) switch, 2-15 SW9 (reset) push button, 2-17 switches
See also switches by name (SWx) diagram of locations, 2-9
synchronous dynamic random access memory,
See SDRAM
system
architecture, of this EZ-KIT Lite, 2-2 clock frequency, 1-9 clock (SCLKx) signals, 1-10, 2-5, 2-6
T
Target Options dialog box, 1-9 TFS0 signal, 2-13 TFS2 signal, 2-6 TFS3 signal, 2-6 timers connector (P11), 2-24 TMRCLK signal, 2-7 TSCLK0 signal, 2-13 TSCLK2 signal, 2-6 TSCLK3 signal, 2-6 TWI connector (P10), 2-24
TXDx (transmit data input) signals, 1-11, 2-6
U
UART
enable switch (SW4), 2-10 interface, 2-4, 2-8
loop jumper (JP9), 2-14 UART0 transmit/receive signals, 2-4 UART1 connector (P12), 2-25 universal asynchronous receiver transmitter, See
UART
USB
cable, 1-3
interface, 2-9, 2-23
monitor LED (ZLED3), 2-19 user LEDs (LED2-6), 2-19
V
very-long instruction word (VLIW), ix VisualDSP++
environment, 1-5
online Help, voltage regulators, 2-2
xix
ADSP-BF538F EZ-KIT Lite Evaluation System Manual I-5
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USB 1.1, up to 150 KB/sec
-
High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
-
VisualDSP++ 5.01
-
Free Upgrade to 5.0
-
VisualAudio
-
LabVIEW Embedded for Blackfin
-
Software Development Kit (SDK)
-
Mathworks
-
Green Hills Software
-
uClinux Kernel + GNU Software
-
LabVIEW Embedded for Blackfin
-
Phytec
ADSP-BF535
---
-
USB-based Emulator
USB 1.1, up to 150 KB/sec
-
High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
-
VisualDSP++ 5.01
-
Free Upgrade to 5.0
-
Green Hills Software
ADSP-BF538 ADSP-BF538F
-
BF538F EZ-KIT Lite
Desktop Evaluation Board
-
USB-based Emulator
USB 1.1, up to 150 KB/sec
-
High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
-
VisualDSP++ 5.01
-
Free Upgrade to 5.0
-
Green Hills Software
ADSP-BF542 ADSP-BF544 ADSP-BF547 ADSP-BF548 ADSP-BF549
-
BF548 EZ-KIT Lite
Desktop Evaluation Board
-
USB-based Emulator
USB 1.1, up to 150 KB/sec
-
High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
-
VisualDSP++ 5.01
-
Free Upgrade to 5.0
-
LabVIEW Embedded for Blackfin
ADSP-BF561
-
BF561 EZ-KIT Lite
Desktop Evaluation Board
-
USB-based Emulator
USB 1.1, up to 150 KB/sec
-
High Perf USB-based Emulator
USB 2.0, up to 1.5 MB/sec
-
VisualDSP++ 5.01
-
Free Upgrade to 5.0
-
Green Hills Software
-
uClinux Kernel + GNU Software
1
Floating license available
Processor Development Tools: Product Overview
Development Tools Support Tel: 1-800-AnalogD (262-5643)
Contact Support
http://www.analog.com/processors/blackfin/evaluationDevelopment/crosscore/ (2 of 3)3/27/2008 4:09:00 PM
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