ANALOG DEVICES ADSP-219x Service Manual

ADSP-219x DSP
Instruction Set Reference
Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106
Revision 2.0, December 2005
Part Number
82-000390-07
a
Copyright Information
© 2005 Analog Devices, Inc., ALL RIGHTS RESERVED. This docu­ment may not be reproduced in any form without prior, express written consent from Analog Devices, Inc.
Printed in the USA.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by impli­cation or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, Blackfin, EZ-KIT Lite, SHARC, TigerSHARC, and VisualDSP++ are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of their respective owners.

CONTENTS

PREFACE
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents ........................................................................... xiv
What’s New in This Manual ............................................................ xv
Technical or Customer Support ....................................................... xv
Supported Processors ...................................................................... xvi
Product Information ..................................................................... xvii
MyAnalog.com ........................................................................ xvii
Processor Product Information ................................................ xviii
Related Documents .................................................................. xix
Online Technical Documentation ............................................. xix
Accessing Documentation From VisualDSP++ ....................... xx
Accessing Documentation From Windows ............................. xx
Accessing Documentation From the Web .............................. xxi
Printed Manuals ....................................................................... xxi
VisualDSP++ Documentation Set ........................................ xxii
Hardware Tools Manuals ..................................................... xxii
Processor Manuals ............................................................... xxii
ADSP-219x DSP Instruction Set Reference iii
CONTENTS
Data Sheets ........................................................................ xxii
Conventions ................................................................................ xxiii
INSTRUCTION SET SUMMARY
Core Registers Summary ............................................................... 1-2
Arithmetic Status (ASTAT) Register .............................................. 1-3
Condition Code (CCODE) Register ............................................. 1-5
Interrupt Control (ICNTL) Register ............................................. 1-6
Interrupt Mask (IMASK) Register and
Interrupt Latch (IRPTL) Register ............................................... 1-7
Mode Status (MSTAT) Register .................................................... 1-8
System Status (SSTAT) Register .................................................. 1-10
Condition Codes Summary ......................................................... 1-11
Instruction Summary .................................................................. 1-12
ALU Instructions .................................................................. 1-14
Multiplier Instructions .......................................................... 1-15
Shifter Instructions ............................................................... 1-16
Data Move Instructions ......................................................... 1-16
Program Flow Instructions .................................................... 1-18
Multifunction Instructions .................................................... 1-19
ALU INSTRUCTIONS
ALU Instruction Conventions ....................................................... 2-1
Input Registers ........................................................................ 2-1
Output Registers ..................................................................... 2-2
Constants ............................................................................... 2-2
iv ADSP-219x DSP Instruction Set Reference
CONTENTS
ALU Mode Control ................................................................. 2-3
ALU Status Flags ..................................................................... 2-4
ALU Instruction Reference ............................................................ 2-4
Add/Add with Carry ..................................................................... 2-5
Subtract XY/Subtract XY with Borrow ....................................... 2-9
Subtract YX/Subtract YX with Borrow ..................................... 2-13
Bitwise Logic: AND, OR, XOR ................................................... 2-16
Bit Manipulation: TSTBIT, SETBIT, CLRBIT, TGLBIT ............. 2-19
Clear: PASS ................................................................................ 2-22
Negate: NOT .............................................................................. 2-25
Absolute Value: ABS ................................................................... 2-28
Increment ................................................................................... 2-31
Decrement .................................................................................. 2-34
Divide Primitives: DIVS and DIVQ ............................................ 2-37
Generate ALU Status Only: NONE ............................................. 2-46
MAC INSTRUCTIONS
Multiply Instruction Conventions ................................................. 3-2
MAC Input Registers ............................................................... 3-2
MAC Output Registers ............................................................ 3-2
Data Format Options .............................................................. 3-3
Rounding Modes ..................................................................... 3-4
Numeric Format Modes ........................................................... 3-6
Status Flags ............................................................................. 3-7
Multiply ....................................................................................... 3-8
ADSP-219x DSP Instruction Set Reference v
CONTENTS
Multiply with Cumulative Add ................................................... 3-11
Multiply with Cumulative Subtract ............................................. 3-14
MAC Clear ................................................................................ 3-17
MAC Round/Transfer ................................................................. 3-19
MAC Saturate ............................................................................ 3-21
Generate MAC Status Only: NONE ........................................... 3-24
SHIFTER INSTRUCTIONS
Shifter Operation Conventions ..................................................... 4-2
Shifter Registers ...................................................................... 4-2
Shifter Instruction Options ..................................................... 4-3
Shifter Status Flags .................................................................. 4-5
Arithmetic Shift ............................................................................ 4-6
Arithmetic Shift Immediate .......................................................... 4-8
Logical Shift ............................................................................... 4-10
Logical Shift Immediate .............................................................. 4-12
Normalize .................................................................................. 4-14
Normalize Immediate ................................................................. 4-17
Exponent Derive ........................................................................ 4-20
Exponent (Block) Adjust ............................................................. 4-23
Denormalization ......................................................................... 4-26
MULTIFUNCTION INSTRUCTIONS
Order of Execution of Multifunction Operations ........................... 5-2
Multifunction Instruction Reference ............................................. 5-3
vi ADSP-219x DSP Instruction Set Reference
CONTENTS
Compute with Dual Memory Read ................................................ 5-4
Dual Memory Read ....................................................................... 5-8
Compute with Memory Read ...................................................... 5-11
Compute with Memory Write ..................................................... 5-15
Compute with Register-to-Register Move .................................... 5-19
DATA MOVE INSTRUCTIONS
Core Registers ............................................................................... 6-2
PX Register ................................................................................... 6-3
DAG Registers .............................................................................. 6-5
Address Registers ..................................................................... 6-5
DAG Memory Page Registers (DMPGx) .................................. 6-6
Secondary DAG Registers ........................................................ 6-7
Register Load Latencies ................................................................. 6-9
Data Addressing Methods ............................................................ 6-11
Direct Addressing .................................................................. 6-11
Indirect Addressing ................................................................ 6-12
Circular Data Buffer Addressing ............................................ 6-14
Bit-Reversed Addressing ........................................................ 6-16
Data Move Instruction Reference ................................................ 6-21
Register-to-Register Move ........................................................... 6-22
Direct Memory Read/Write—Immediate Address ........................ 6-24
Direct Register Load ................................................................... 6-27
Indirect 16-Bit Memory Read/Write—Postmodify ....................... 6-30
Indirect 16-Bit Memory Read/Write—Premodify ......................... 6-34
ADSP-219x DSP Instruction Set Reference vii
CONTENTS
Indirect 24-Bit Memory Read/Write—Postmodify ....................... 6-38
Indirect 24-Bit Memory Read/Write—Premodify ........................ 6-43
Indirect DAG Register Write (Premodify or Postmodify),
with DAG Register Move ......................................................... 6-47
Indirect Memory Read/Write—Immediate Postmodify ................ 6-51
Indirect Memory Read/Write—Immediate Premodify .................. 6-54
Indirect 16-Bit Memory Write—Immediate Data ........................ 6-57
Indirect 24-Bit Memory Write—Immediate Data ........................ 6-59
External I/O Port Read/Write ..................................................... 6-62
System Control Register Read/Write ........................................... 6-65
Modify Address Register—Indirect .............................................. 6-68
Modify Address Register—Direct ................................................ 6-70
PROGRAM FLOW INSTRUCTIONS
Conditions ................................................................................... 7-2
Counter-Based Conditions ............................................................ 7-2
CCODE Register ......................................................................... 7-3
Mode Control .............................................................................. 7-4
Branch Options ............................................................................ 7-4
Addressing Branch Targets ............................................................ 7-6
Stacks ........................................................................................... 7-7
PC and Status Stack Operation ................................................ 7-8
Loop Stacks Operation .......................................................... 7-10
Stack Status Flags ....................................................................... 7-12
Interrupts ................................................................................... 7-13
viii ADSP-219x DSP Instruction Set Reference
CONTENTS
Enabling Interrupts ............................................................... 7-14
Switching Contexts ................................................................ 7-16
Nesting Interrupts ................................................................. 7-16
Application Performance ............................................................. 7-17
Exiting a Loop ....................................................................... 7-18
Using Long Jumps and Calls .................................................. 7-20
Effect Latencies ..................................................................... 7-22
Program Flow Instruction Reference ............................................ 7-23
DO UNTIL (PC Relative) .......................................................... 7-24
Direct JUMP (PC Relative) ......................................................... 7-29
CALL (PC Relative) .................................................................... 7-33
JUMP (PC Relative) ................................................................... 7-37
Long Call (LCALL) ..................................................................... 7-40
Long Jump (LJUMP) .................................................................. 7-43
Indirect CALL ............................................................................ 7-46
Indirect JUMP ............................................................................ 7-50
Return from Interrupt (RTI) ....................................................... 7-53
Return from Subroutine (RTS) .................................................... 7-57
PUSH or POP Stacks .................................................................. 7-61
FLUSH CACHE ......................................................................... 7-67
Set Interrupt (SETINT) .............................................................. 7-69
Clear Interrupt (CLRINT) .......................................................... 7-71
NOP .......................................................................................... 7-73
IDLE .......................................................................................... 7-74
ADSP-219x DSP Instruction Set Reference ix
CONTENTS
Mode Control ............................................................................ 7-76
INSTRUCTION OPCODES
Opcode Mnemonics ..................................................................... 8-1
ALU or Multiplier Function (AMF) Codes .............................. 8-6
Condition Codes .................................................................... 8-8
Constant Codes ...................................................................... 8-9
Core Register Codes .............................................................. 8-11
Shift Function (SF) Codes ..................................................... 8-12
Index Register and Modify Register Codes ............................. 8-13
DMI, DMM, PMI, and PMM Codes .................................... 8-14
IREG/MREG Codes ............................................................. 8-15
XOP and YOP Codes ............................................................ 8-15
Opcode Definitions .................................................................... 8-16
Type 1: Compute | DregX«···DM | DregY«···PM ......................... 8-17
Type 3: Dreg/Ireg/Mreg «···» DM/PM ......................................... 8-18
Type 4: Compute | Dreg «···» DM ............................................... 8-19
Type 6: Dreg «··· Data16 ............................................................. 8-20
Type 7: Reg1/2 «··· Data16 ......................................................... 8-21
Type 8: Compute | Dreg1 «··· Dreg2 ........................................... 8-22
Type 9: Compute ........................................................................ 8-23
Type 9a: Compute ...................................................................... 8-26
Type 10: Direct Jump ................................................................. 8-28
Type 10a: Direct Jump/Call ........................................................ 8-29
Type 11: Do ··· Until .................................................................. 8-30
x ADSP-219x DSP Instruction Set Reference
CONTENTS
Type 12: Shift | Dreg «···» DM .................................................... 8-31
Type 14: Shift | Dreg1 «··· Dreg2 ................................................. 8-32
Type 15: Shift Data8 ................................................................... 8-33
Type 16: Shift Reg0 .................................................................... 8-34
Type 17: Any Reg «···Any Reg ..................................................... 8-35
Type 18: Mode Change ............................................................... 8-36
Type 19: Indirect Jump/Call ........................................................ 8-37
Type 20: Return .......................................................................... 8-38
Type 21: Modify DagI ................................................................. 8-39
Type 21a: Modify DagI ............................................................... 8-40
Type 22: DM «··· Data16 ............................................................ 8-41
Type 22a: PM «··· Data24 ............................................................ 8-42
Type 23: Divide primitive, DIVQ ................................................ 8-43
Type 24: Divide primitive, DIVS ................................................. 8-44
Type 25: Saturate ........................................................................ 8-45
Type 26:Push/Pop/Cache ............................................................ 8-46
Type 29: Dreg «···» DM .............................................................. 8-47
Type 30: NOP ............................................................................ 8-48
Type 31: Idle ............................................................................... 8-49
Type 32: Any Reg «···» PM/DM .................................................. 8-50
Type 32a: DM«···DAG Reg | DAG Reg«···Ireg ............................. 8-51
Type 33: Reg3 «··· Data12 ........................................................... 8-52
Type 34: Dreg «···» IOreg ............................................................ 8-53
Type 35: Dreg «···»Sreg ............................................................... 8-54
ADSP-219x DSP Instruction Set Reference xi
CONTENTS
Type 36: Long Jump/Call ........................................................... 8-55
Type 37: Interrupt ...................................................................... 8-56
INDEX
xii ADSP-219x DSP Instruction Set Reference
PREFACE
Thank you for purchasing and developing systems using ADSP-219x DSPs from Analog Devices.
Purpose of This Manual
The ADSP-219x DSP Instruction Set Reference provides assembly syntax information for ADSP-219x DSPs. The syntax descriptions cover instruc­tions that execute within the DSP’s processor core (processing elements, program sequencer, and data address generators). For architecture and design information on the DSP, see the ADSP-219x/2192 DSP Hardware Reference.
Intended Audience
The primary audience for this manual is a programmer who is familiar with Analog Devices processors. This manual assumes that the audience has a working knowledge of the appropriate processor architecture and instruction set. Programmers who are unfamiliar with Analog Devices processors can use this manual, but should supplement it with other texts (such as the appropriate hardware reference manuals and data sheets) that describe your target architecture.
ADSP-219x DSP Instruction Set Reference xiii
Manual Contents
Manual Contents
This reference presents instruction information organized by the type of the instruction. Instruction types relate to the machine language opcode for the instruction. On this DSP, the opcodes categorize the instructions by the portions of the DSP architecture that execute the instructions. The following chapters cover the different types of instructions.
“Instruction Set Summary” on page 1-1—This chapter provides a syntax summary of all instructions and describes the conventions that are used on the instruction reference pages.
“ALU Instructions” on page 2-1—These instruction specify opera- tions that occur in the DSP’s ALU.
“MAC Instructions” on page 3-1—These instructions specify oper­ations that occur in the DSP’s Shifter.
“Shifter Instructions” on page 4-1—These instructions specify operations that occur in the DSP’s Shifter.
“Multifunction Instructions” on page 5-1—These instructions specify parallel, single-cycle operations.
“Data Move Instructions” on page 6-1—These instructions specify memory and register access operations.
“Program Flow Instructions” on page 7-1—These instructions specify program sequencer operations.
“Instruction Opcodes” on page 8-1—This chapter lists the instruc­tion encoding fields for all instructions.
Each of the DSP’s instructions is specified in this text. The reference page for an instruction shows the syntax of the instruction, describes its func­tion, gives one or two assembly-language examples, and identifies fields of
xiv ADSP-219x DSP Instruction Set Reference
Preface
its opcode. The instructions are referred to by type, ranging from 1 to 37. These types correspond to the opcodes that ADSP-219x DSPs recognize, but are for reference only and have no bearing on programming.
Some instructions have more than one syntactical form; for example, the instruction “Type 9: Compute” on page 8-23 has many distinct forms.
Many instructions can be conditional. These instructions are prefaced by
IF COND; for example:
If COND compute;
In a conditional instruction, the execution of the entire instruction is based on the specified condition.
What’s New in This Manual
Revision 2.0 of the ADSP-219x DSP Instruction Set Reference corrects all known document errata issues.
L
This instruction set reference is a companion document to the ADSP-219x/2192 DSP Hardware Reference (Rev 1.1, April 2004).
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following ways:
Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
E-mail tools questions to
processor.tools.support@analog.com
ADSP-219x DSP Instruction Set Reference xv
Supported Processors
E-mail processor questions to
processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)
Phone questions to 1-800-ANALOGD
Contact your Analog Devices, Inc. local sales office or authorized distributor
Send questions by mail to:
Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA
Supported Processors
The following is the list of Analog Devices, Inc. processors supported in VisualDSP++®.
TigerSHARC® (ADSP-TSxxx) Processors
The name TigerSHARC refers to a family of floating-point and fixed-point [8-bit, 16-bit, and 32-bit] processors. VisualDSP++ currently supports the following TigerSHARC families: ADSP-TS101 and ADSP-TS20x.
SHARC® (ADSP-21xxx) Processors
The name SHARC refers to a family of high-performance, 32-bit, floating-point processors that can be used in speech, sound, graphics, and imaging applications. VisualDSP++ currently supports the following SHARC families: ADSP-2106x, ADSP-2116x, ADSP-2126x, and ADSP-2136x.
xvi ADSP-219x DSP Instruction Set Reference
Blackfin® (ADSP-BFxxx) Processors
The name Blackfin refers to a family of 16-bit, embedded processors. VisualDSP++ currently supports the following Blackfin families: ADSP-BF53x and ADSP-BF56x.
ADSP-21xx Processors
The ADSP-21xx processors are high-performance 16-bit DSPs for com­munications, instrumentation, industrial/control, voice/speech, medical and military applications. The family includes the ADSP-218x, ADSP-219x, and mixed-signal products (ADSP-21990, ADSP-21991, and ADSP-21992).
Product Information
You can obtain product information from the Analog Devices Web site, from the product CD-ROM, or from the printed publications (manuals).
Preface
Analog Devices is online at www.analog.com. Our Web site provides infor­mation about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors.
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on products you are interested in. You can also choose to receive weekly e-mail notifications containing updates to the Web pages that meet your interests. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more.
ADSP-219x DSP Instruction Set Reference xvii
Product Information
Registration
Visit
www.myanalog.com to sign up. Click Register to use MyAnalog.com.
Registration takes about five minutes and serves as a means to select the information you want to receive.
If you are already a registered user, just log on. Your user name is your e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
www.analog.com/processors, which provides access to technical publica-
tions, data sheets, application notes, product overviews, and product announcements.
You may also obtain additional information about Analog Devices and its products in any of the following ways.
E-mail questions or requests for information to
processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)
Fax questions or requests for information to
1-781-461-3010 (North America) +49-89-76903-157 (Europe)
Access the FTP Web site at
ftp ftp.analog.com (or ftp 137.71.25.69) ftp://ftp.analog.com
xviii ADSP-219x DSP Instruction Set Reference
Preface
Related Documents
The following publications that describe the ADSP-219x processor can be ordered from any Analog Devices sales office:
ADSP-219x Processor Data Sheet
ADSP-219x/2192 DSP Hardware Reference
For information on product related development software and Analog Devices processors, see these publications:
VisualDSP++ User’s Guide
VisualDSP++ C/C++ Compiler and Library Manual
VisualDSP++ Assembler and Preprocessor Manual
VisualDSP++ Linker and Utilities Manual
VisualDSP++ Kernel (VDK) User’s Guide
Visit the Technical Library Web site to access all processor and tools manuals and data sheets:
http://www.analog.com/processors/technical_library
Online Technical Documentation
Online documentation comprises the VisualDSP++ Help system, software tools manuals, hardware tools manuals, processor manuals, the Dinkum Abridged C++ library, and Flexible License Manager (FlexLM) network license manager software documentation. You can easily search across the entire VisualDSP++ documentation set for any topic of interest. For easy printing, supplementary .PDF files of most manuals are also provided.
ADSP-219x DSP Instruction Set Reference xix
Product Information
Each documentation file type is described as follows.
File Description
.CHM Help system files and manuals in Help format
.HTM or .HTML
.PDF VisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Dinkum Abridged C++ library and FlexLM network license manager software doc­umentation. Viewing and printing the Internet Explorer 4.0 (or higher).
Viewing and printing the .PDF files requires a PDF reader, such as Adobe Acrobat Reader (4.0 or higher).
.HTML files requires a browser, such as
If documentation is not installed on your system as part of the software installation, you can add it from the VisualDSP++ CD-ROM at any time by running the Tools installation. Access the online documentation from the VisualDSP++ environment, Windows® Explorer, or the Analog Devices Web site.
Accessing Documentation From VisualDSP++
From the VisualDSP++ environment:
Access VisualDSP++ online Help from the Help menu’s Contents, Search, and Index commands.
Open online Help from context-sensitive user interface items (tool­bar buttons, menu commands, and windows).
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many ways to open VisualDSP++ online Help or the supplementary documenta­tion from Windows.
xx ADSP-219x DSP Instruction Set Reference
Preface
Help system files (.
CHM) are located in the Help folder, and .PDF files are
located in the Docs folder of your VisualDSP++ installation CD-ROM. The Docs folder also contains the Dinkum Abridged C++ library and the FlexLM network license manager software documentation.
Using Windows Explorer
Double-click the vdsp-help.chm file, which is the master Help sys­tem, to access all the other .CHM files.
Double-click any file that is part of the VisualDSP++ documenta­tion set.
Using the Windows Start Button
Access VisualDSP++ online Help by clicking the Start button and choosing Programs, Analog Devices, VisualDSP++, and VisualDSP++ Documentation.
Access the .PDF files by clicking the Start button and choosing
Programs, Analog Devices, VisualDSP++, Documentation for Printing, and the name of the book.
Accessing Documentation From the Web
Download manuals at the following Web site:
http://www.analog.com/processors/technical_library
Select a processor family and book title. Download archive (.ZIP) files, one for each manual. Use any archive management software, such as WinZip, to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
ADSP-219x DSP Instruction Set Reference xxi
Product Information
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir.
Hardware Tools Manuals
To purchase EZ-KIT Lite® and In-Circuit Emulator (ICE) manuals, call 1-603-883-2430. The manuals may be ordered by title or by product number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered through the Literature Center at 1-800-ANALOGD (1-800-262-5643), or downloaded from the Analog Devices Web site. Manuals may be ordered by title or by product number located on the back cover of each manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the Analog Devices Web site. Only production (final) data sheets (Rev. 0, A, B, C, and so on) can be obtained from the Literature Center at 1-800-ANALOGD (1-800-262-5643); they also can be downloaded from the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System at 1-800-446-6212. Follow the prompts and a list of data sheet code numbers will be faxed to you. If the data sheet you want is not listed, check for it on the Web site.
xxii ADSP-219x DSP Instruction Set Reference
Conventions
Text conventions used in this manual are identified and described as follows.
Example Description
Preface
Close command (File menu)
{this | that} Alternative items in syntax descriptions appear within curly brackets and
[this | that] Optional items in syntax descriptions appear within brackets and separated
[this,…] Optional item lists in syntax descriptions appear within brackets delimited
.SECTION Commands, directives, keywords, and feature names are in text with let-
filename Non-keyword placeholders appear in text with italic style format.
L a
Titles in reference sections indicate the location of an item within the VisualDSP++ environment’s menu system (for example, the Close com­mand appears on the File menu).
separated by vertical bars; read the example as this or that. One or the other is required.
by vertical bars; read the example as an optional
by commas and terminated with an ellipse; read the example as an optional comma-separated list of this.
ter gothic font.
Note: For correct operation, ... A Note: provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol.
Caution: Incorrect device operation may result if ... Caution: Device damage may result if ...
A Caution: identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol.
this or that.
Warn in g: Injury to device users may result if ...
[
A Warning: identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for devices users. In the online version of this book, the word War ni ng appears instead of this symbol.
ADSP-219x DSP Instruction Set Reference xxiii
Preface
L
Additional conventions, which apply only to specific chapters, may appear throughout this document.
ADSP-219x DSP Instruction Set Reference xxiv

1 INSTRUCTION SET SUMMARY

This chapter provides a summary of the instructions in the ADSP-219x DSP’s instruction set. Chapters 2 through 8 describe these instructions in more detail as follows:
“ALU Instructions” on page 2-1
“MAC Instructions” on page 3-1
“Shifter Instructions” on page 4-1
“Multifunction Instructions” on page 5-1
“Data Move Instructions” on page 6-1
“Program Flow Instructions” on page 7-1
“Instruction Opcodes” on page 8-1
Also, this chapter identifies mnemonics for using DSP registers, bits, and operating conditions. This information appears in the following summaries:
“Core Registers Summary” on page 1-2
“Arithmetic Status (ASTAT) Register” on page 1-3
“Condition Code (CCODE) Register” on page 1-5
“Interrupt Control (ICNTL) Register” on page 1-6
“Interrupt Mask (IMASK) Register and Interrupt Latch (IRPTL)
Register” on page 1-7
ADSP-219x DSP Instruction Set Reference 1-1

Core Registers Summary

“Mode Status (MSTAT) Register” on page 1-8
“System Status (SSTAT) Register” on page 1-10
“Condition Codes Summary” on page 1-11
For information on instruction reference notation, see “Conventions” on
page xxiii.
Core Registers Summary
The DSP has three categories of registers: core registers, system control registers, and I/O registers. Table 1-1 lists and describes the DSP’s core registers. For information about system control and I/O registers, see the ADSP-219x/2192 DSP Hardware Reference.
Table 1-1. Core Registers
Type Registers Function
ALU data AX0, AX1, AY0, AY1,
AR, AF
Multiplier data MX0, MX1, MY0, MY1,
MR0, MR1, MR2
Shifter data SI, SE, SB, SR0, SR1, SR2
DAG address I0, I1, I2, I3
I4, I5, I6, I7
M0, M1, M2, M3 M4, M5, M6, M7
L0, L1, L2, L3 L4, L5, L6, L7
16-bit data registers (X and Y) provide input for ALU, multiplier, and shifter operations. AR and AF are ALU result and feedback regis­ters. MR and SR are multiplier result and feed­back registers. SR also is the shifter results register. In this text, Dreg denotes unrestricted use of data registers as a data register file, while “ XOP” and “YOP” denote restricted use. The data registers (except AF, SE, and SB) serve as a register file for unconditional, single-func­tion instructions.
DAG1 index registers DAG2 index registers
DAG1 modify registers DAG2 modify registers
DAG1 length registers DAG2 length registers
1-2 ADSP-219x DSP Instruction Set Reference
Table 1-1. Core Registers (Cont’d)
Type Registers Function
Instruction Set Summary
System control B0, B1, B2, B3, B4, B5,
B6, B7, SYSCTL, CACTL
Program flow CCODE
LPSTACKA LPSTACKP STACKA STACKP
Interrupt ICNTL
IMASK IRPTL
Status ASTAT
MSTAT SSTAT (read-only)
Page DMPG1
DMPG2 IJPG IOPG
Bus exchange PX Holds eight LSBs of 24-bit memory data for
Shifter SE
SB
DAG1 base address registers (B0-3), DAG2 base address registers (B4-7), System control, and Cache control
Software condition register Loop PC stack A register, 16 address LSBs Loop PC stack P register, 8 address MSBs PC stack A register, 16 address LSBs PC stack P register, 8 address MSBs
Interrupt control register Interrupt mask register Interrupt latch register
Arithmetic status flags Mode control and status flags System status
DAG1 page register, 8 address MSBs DAG2 page register, 8 address MSBs Indirect jump page register, 8 address MSBs I/O page register, 8 address MSBs
transfers between memory and data registers only.
Shifter exponent register Shifter block exponent register

Arithmetic Status (ASTAT) Register

The DSP updates the status bits in ASTAT, indicating the status of the most recent ALU, multiplier, or shifter operation.
ADSP-219x DSP Instruction Set Reference 1-3
Arithmetic Status (ASTAT) Register
Table 1-2. ASTAT Register Bit Definitions
Bit Name Description
0 AZ ALU result zero. Logical NOR of all bits written to the ALU result register
(AR) or ALU feedback register (AF). 0 =ALU output ≠ 0 1 =ALU output = 0
1 AN ALU result negative. Sign of the value written to the ALU result register
(AR) or ALU feedback register (AF). 0 =ALU output positive (+) 1 =ALU output negative (−)
2 AV ALU result overflow.
0 =No overflow 1 =Overflow
3 AC ALU result carry.
0 =No carry 1 =Carry
4AS ALU x input sign. Sign bit of the ALU x-input operand; set by the ABS
instruction only. 0 =Positive (+) 1 =Negative (−)
5 AQ ALU quotient. Sign of the resulting quotient; set by the DIVS or DIVQ
instructions. 0 =Positive (+) 1 =Negative (−)
6 MV Multiplier overflow. Records overflow/underflow condition for MR result
register. 0 =No overflow or underflow 1 =Overflow or underflow
7 SS Shifter input sign. Sign of the shifter input operand.
0 =Positive (+) 1 =Negative (−)
8 SV Shifter overflow. Records overflow/underflow condition for SR result reg-
ister. 0 =No overflow or underflow 1 =Overflow or underflow
1-4 ADSP-219x DSP Instruction Set Reference
Instruction Set Summary

Condition Code (CCODE) Register

Using the CCODE register (shown in Table 1-3), conditional instructions may base execution on a comparison of the CCODE value (user-selected) and the SWCOND condition (DSP status). The CCODE register holds a value between 0x0 and 0xF, which the instruction tests against when the condi­tional instruction uses SWCOND or NOT SWCOND. Note that the CCODE register has a one-cycle effect latency.
Table 1-3. CCODE Register Bit Definitions
CCODE Software Condition
Value SWCOND (1010) NOT SWCOND (1011)
0x00 PF0 pin high PF0 pin low
0x01 PF1 pin high PF1 pin low
0x02 PF2 pin high PF2 pin low
0x03 PF3 pin high PF3 pin low
0x04 PF4 pin high PF4 pin low
0x05 PF5 pin high PF5 pin low
0x06 PF6 pin high PF6 pin low
0x07 PF7 pin high PF7 pin low
0x08 AS NOT AS
0x09 SV NOT SV
0x0A PF8 pin high PF8 pin low
0x0B PF9 pin high PF9 pin low
0x0C PF10 pin high PF10 pin low
0x0D PF11 pin high PF11 pin low
0x0E PF12 pin high PF12 pin low
0x0F PF13 pin high PF13 pin low
ADSP-219x DSP Instruction Set Reference 1-5

Interrupt Control (ICNTL) Register

Interrupt Control (ICNTL) Register
Refer to Table 1-4 for ICNTL register bit definitions.
Table 1-4. ICNTL Register Bit Definitions
Bit Name Description
0reserved write 0
1reserved write 0
2reserved write 0
3reserved write 0
4 INE Interrupt nesting enable.
0 =Disabled 1 =Enabled
5 GIE Global interrupt enable.
0 =Disabled 1 =Enabled
6reserved write 0
7 BIASRND MAC biased rounding mode.
0 =Disabled 1 =Enabled
8-9 reserved write 0
10 PCSTKE PC stack interrupt enable.
0 =Disabled 1 =Enabled
11 EMUCNTE Emulator cycle counter interrupt enable.
0 =Disabled 1 =Enabled
12-15 reserved write 0
1-6 ADSP-219x DSP Instruction Set Reference
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