The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, the VisualDSP++ logo, SHARC,
CROSSCORE, the CROSSCORE logo, and EZ-KIT Lite are registered
trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21369 EZ-KIT Lite evaluation system has been certified to
comply with the essential requirements of the European EMC directive
89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE”
mark.
The ADSP-21369 EZ-KIT Lite evaluation system had been appended to
Analog Devices Development Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE
Certification by an appointed European Competent Body and is on file.
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
PREFACE
Purpose of This Manual ................................................................ xiii
Intended Audience ........................................................................ xiii
Manual Contents .......................................................................... xiii
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ...................................................... xiv
Supported Processors ....................................................................... xv
Product Information ....................................................................... xv
MyAnalog.com ......................................................................... xvi
Processor Product Information .................................................. xvi
Related Documents ................................................................. xvii
Online Technical Documentation ........................................... xviii
Accessing Documentation From VisualDSP++ ...................... xix
Accessing Documentation From Windows ............................ xix
Accessing Documentation From Web ................................... xix
Printed Manuals ........................................................................ xx
VisualDSP++ Documentation Set .......................................... xx
Hardware Tools Manuals ....................................................... xx
Processor Manuals ................................................................. xx
ADSP-21369 EZ-KIT Lite Evaluation System Manualv
CONTENTS
Data Sheets ......................................................................... xxi
viiiADSP-21369 EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-21369 EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for ADSP-21369 SHARC
The SHARC processors are based on a 32-bit super Harvard architecture
that includes a unique memory architecture comprised of two large
on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives a SHARC processor the bandwidth for sustained
high-speed computations. SHARC processors represents today’s de facto
standard for floating-point processing, targeted toward premium audio
applications.
The evaluation system is designed to be used in conjunction with the
VisualDSP++
ADSP-21369 SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code
development and debug, such as:
•Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21369 assembly
•Load, run, step, halt, and set breakpoints in application program
•Read and write data and program memory
®
development environment to test the capabilities of the
®
processors.
•Read and write core and peripheral registers
•Plot memory
ADSP-21369 EZ-KIT Lite Evaluation System Manualix
Access to the ADSP-21369 processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface gives unrestricted access to the ADSP-21369 processor and the
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/dsp/tools/.
L
alDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
“Evaluation License Restrictions” on page 1-6.
ADSP-21369 EZ-KIT Lite provides example programs to demonstrate the
capabilities of the evaluation board.
The board features:
•Analog Devices ADSP-21369 processor
The ADSP-21369 EZ-KIT Lite installation is part of the Visu-
D 256-pin SBGA package
D 400 MHz core clock speed
•Synchronous dynamic random access memory (SDRAM)
D 1M x 32-bit x 4 Banks
•Synchronous random access memory (SRAM)
D 512 Kbit x 8-bit
•Flash memory
D 1M x 8-bit
xADSP-21369 EZ-KIT Lite Evaluation System Manual
• Serial peripheral interconnect (SPI) flash memory
D 2Mbit
•Analog audio interface
D AD1835A codec
D 4x2 RCA phono jack for 4 channels of stereo output
D 2x1 RCA phono jack for 1 channel of stereo input
D 3.5 mm headphone jack for 1 channel stereo output
D ADM3202 RS-232 driver/receiver
D DB9 female connector
Preface
•National Instruments Educational Laboratory Virtual Instrumentation Suite (ELVIS) Interface
D LabVIEW™-based virtual instruments
D Multifunction data acquisition device
D Bench-top workstation and prototype board
•LEDs
D 12 LEDs: 1 power (green), 1 board reset (red), 1 USB reset
(red), 1 USB monitor (amber), and 8 general purpose
(amber)
•Push buttons
D 5 push buttons: 1 reset, 2 connected to DAI,
2 connected to the
FLAG pins of the processor
ADSP-21369 EZ-KIT Lite Evaluation System Manualxi
•Expansion interface (Type A)
D Parallel Port, FLAG pins, DPI, DAI
•Other features
D JTAG ICE 14-pin header
D Test points for processor current measurement
D DPI header
D DAI header
The EZ-KIT Lite board has a total of 1 MB of parallel flash memory and
2 Mbit of SPI flash memory. The flash memories can store user-specific
boot code, allowing the board to run as a stand-alone unit. For more
information, see “External Memory” on page 1-7 and “Boot Mode and
Clock Ratio Select Switch (SW2)” on page 2-8. The board also has
512 KB of SRAM and 16 MB of SDRAM, which can be used at runtime.
The DAI port of the processor connects to the AD1835A audio codec, an
external phase lock loop (PLL), and the SPDIF interface. The DAI interface facilitates development of digital and analog audio signal-processing
applications. See “Analog Audio” on page 1-9 and “SPDIF Coax Connec-
tors (P8 and P9)” on page 2-23 for more information.
The DPI port of the processor connects to the UART interface and the
SPI interface. The UART interface can connect to a standard RS-232 connection, while the SPI connects to the 2 Mbit of serial flash memory.
Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector
expansion interface. See “Expansion Interface” on page 2-7 for details.
xiiADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
Purpose of This Manual
The ADSP-21369 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board) and describes the
operation and configuration of the board components. The product software component is detailed in the VisualDSP++ Installation Quick Reference Card. The manual provides guidelines for running your own
code on the ADSP-21369 EZ-KIT Lite. Finally, a schematic and a bill of
materials are provided as a reference for future designs.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
(such as the ADSP-2136x SHARC Processor Programming Reference and
ADSP-2136x SHARC Processor Hardware Reference for ADSP-21367/8/9
Processors) that describe your target architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and the VisualDSP++ user’s or getting started
guides. For the locations of these documents, see “Related Documents”.
Manual Contents
The manual consists of:
•Chapter 1, “Using EZ-KIT Lite” on page 1-1
Provides information on the EZ-KIT Lite from a programmer’s
perspective and provides an easy-to-access memory map.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxiii
What’s New in This Manual
•Chapter 2, “EZ-KIT Lite Hardware Reference” on page 2-1
Provides information on the hardware aspects of the evaluation
system.
•Appendix A, “Bill Of Materials” on page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
•Appendix B, “Schematics” on page B-1
Provides the resources to allow modifications to the EZ-KIT Lite
or to use as a reference design.
L
This appendix is not part of the online Help. The online Help
viewers should go to the PDF version of the ADSP-21369 EZ-KIT Lite Evaluation System Manual located in the
Manuals
natively, the schematics can be found on the Analog Devices Web
site at
folder on the installation CD to see the schematics. Alter-
http://www.analog.com/processors.
Docs\EZ-KIT Lite
What’s New in This Manual
This is the first revision of the ADSP-21369 EZ-KIT Lite Evaluation System Manual.
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
•Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
•E-mail tools questions to
processor.tools.support@analog.com
xivADSP-21369 EZ-KIT Lite Evaluation System Manual
•Contact your Analog Devices, Inc. local sales office or authorized
distributor
•Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
Supported Processors
The ADSP-21369 EZ-KIT Lite evaluation system supports the Analog
Devices ADSP-21369 SHARC processors.
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from the printed publications (manuals).
Analog Devices is online at
vides information about a broad range of products—analog integrated
circuits, amplifiers, converters, and digital signal processors.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxv
http://www.analog.com. Our Web site pro-
Product Information
MyAnalog.com
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
Registration:
Visit
http://www.myanalog.com to sign up. Click Register to use MyAna-
log.com. Registration takes about five minutes and serves as means for you
to select the information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
http://www.analog.com/processors, which provides access to technical
publications, data sheets, application notes, product overviews, and product announcements.
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary
Docs folder on the VisualDSP++ installation CD.
Each documentation file type is described as follows.
.PDF files of most manuals are provided in the
File Description
.CHMHelp system files and manuals in Help format
.HTM or
.HTML
.PDFVisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the
Internet Explorer 4.0 (or higher).
Viewing and printing the
Reader (4.0 or higher).
.PDF files requires a PDF reader, such as Adobe Acrobat
.HTML files requires a browser, such as
xviiiADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the
VisualDSP++ environment, Windows
®
Explorer, or the Analog Devices
Web site.
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and navigate to the VisualDSP++ documentation via
the Start menu.
To view ADSP-21369 EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help
window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
Help system files (.
located in the
CHM) are located in the Help folder, and .PDF files are
Docs folder of your VisualDSP++ installation CD-ROM.
The Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
Your software installation kit includes online Help as part of the Windows® interface. These help files provide information about
VisualDSP++ and the ADSP-21369 EZ-KIT Lite evaluation system.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxix
Product Information
Select a processor family and book title. Download archive (.
ZIP) files, one
for each manual. Use any archive management software, such as WinZip,
to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir/continent.asp.
Hardware Tools Manuals
To purchase EZ-KIT Lite and In-Circuit Emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
xxADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxxi
Notation Conventions
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
ExampleDescription
Close command
(File menu)
{this | that}Alternative required items in syntax descriptions appear within curly
[this | that]Optional items in syntax descriptions appear within brackets and sepa-
[this,…]Optional item lists in syntax descriptions appear within brackets
.SECTIONCommands, directives, keywords, and feature names are in text with
filenameNon-keyword placeholders appear in text with italic style format.
L
a
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
brackets and separated by vertical bars; read the example as
that. One or the other is required.
rated by vertical bars; read the example as an optional
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of
letter gothic font.
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
this.
this or
this or that.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
[
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Wa rn in g
appears instead of this symbol.
xxiiADSP-21369 EZ-KIT Lite Evaluation System Manual
Preface
L
Additional conventions, which apply only to specific chapters, may
appear throughout this document.
ADSP-21369 EZ-KIT Lite Evaluation System Manualxxiii
Notation Conventions
xxivADSP-21369 EZ-KIT Lite Evaluation System Manual
1USING EZ-KIT LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-21369 EZ-KIT Lite evaluation system.
The information appears in the following sections.
•“Package Contents” on page 1-2
Lists the items contained in your ADSP-21369 EZ-KIT Lite
package.
•“Default Configuration” on page 1-3
Shows the default configuration of the ADSP-21369 EZ-KIT Lite.
•“Installation and Session Startup” on page 1-4
Instructs how to start a new or open an existing ADSP-21369
EZ-KIT Lite session using VisualDSP++.
•“Evaluation License Restrictions” on page 1-6
Describes the restrictions of the VisualDSP++ license shipped with
the EZ-KIT Lite.
•“External Memory” on page 1-7
Describes how to access external memory and defines the memory
map of the EZ-KIT Lite.
•“ELVIS Interface” on page 1-8
Describes the on-board National Instruments Educational Laboratory Virtual Instrumentation Suite (NI ELVIS) interface.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-1
Package Contents
•“Analog Audio” on page 1-9·
Describes how to set up and communicate with the on-board audio
codec.
•“LEDs and Push Buttons” on page 1-10
Describes the board’s general-purpose IO pins and buttons.
•“Example Programs” on page 1-12
Provides information about the example programs included in the
ADSP-21369 EZ-KIT Lite evaluation system.
•“Background Telemetry Channel” on page 1-12
Highlights the advantages of the Background Telemetry Channel
feature of VisualDSP++.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For detailed information on how to program the ADSP-21369 SHARC
processor, refer to the documents referenced in “Related Documents” on
page xvii.
Package Contents
Your ADSP-21369 EZ-KIT Lite evaluation system package contains the
following items.
•ADSP-21369 EZ-KIT Lite board
•VisualDSP++ Installation Quick Reference Card
•CD containing:
D VisualDSP++ software
D ADSP-21369 EZ-KIT Lite debug software
1-2ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
D USB driver files
D Example programs
D ADSP-21369 EZ-KIT Lite Evaluation System Manual (this
document)
•Universal 7V DC power supply
•USB 2.0 cable
•3.5 mm stereo headphones
•6-foot RCA audio cable
•6-foot 3.5 mm/RCA x 2 Y-cable
•Registration card (please fill out and return)
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic
charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may occur on devices subjected to
high-energy discharges. Proper ESD precautions are
recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards
in the protective shipping package.
The ADSP-21369 EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-3
Installation and Session Startup
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components.
To connect the EZ-KIT Lite board:
1. Remove the EZ-KIT Lite board from the package. Be careful when
handling the board to avoid the discharge of static electricity,
which may damage some components.
2. Figure 1-1 shows the default jumper settings, DIP switch, connector locations, and LEDs used in installation. Confirm that your
board is set up in the default configuration before continuing.
3. Plug the provided power supply into
Visually verify that the green power LED (
that the two red reset LEDs (
and then go off, and, finally, LED1 through LED8 are sequentially
blinking.
4. Connect one end of the USB cable to an available full speed USB
port on your PC and the other end to
EZ-KIT Lite board.
LED10 and LED12) go on for a moment
J4 on the EZ-KIT Lite board.
LED9) is on. Also verify
P5 on the ADSP-21369
Installation and Session Startup
L
For correct operation, install the software and hardware in the
order presented in the VisualDSP++ Installation Quick Reference Card.
1-4ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Figure 1-1. EZ-KIT Lite Hardware Setup
To start up an EZ-KIT Lite session in VisualDSP++:
1. Verify that the yellow USB monitor LED (LED11, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. From the Start menu, navigate to the VisualDSP++ environment
via the Programs menu.
If you are running VisualDSP++ for the first time, the New Session
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-5
Evaluation License Restrictions
dialog box appears on the screen (skip the rest of the procedure and
go to step 3).
If you have run VisualDSP++ previously, the last opened session
appears on the screen.
To switch to another session, via the Session List dialog box, hold
down the Ctrl key while starting VisualDSP++ (go to step 5).
3. In Debug target, select SHARC Emulators/EZKIT Lites.
In Platform, select ADSP-21369 EZ-KIT Lite via Debug Agent.
In Processor, choose the appropriate processor, ADSP-21369.
In Session name, type a new name or accept the default.
4. Click OK to return to the Session List.
5. Highlight the session and click Activate.
Evaluation License Restrictions
The ADSP-21369 EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
1. VisualDSP++ allows a connection to the ADSP-21369 EZ-KIT
Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed.
2. The linker restricts a users program to 10922 words of internal
memory for code space with no restrictions for data space.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
1-6ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
External Memory
The EZ-KIT Lite contains four types of memory: parallel flash (1 MB),
SPI flash (2 Mbit), SRAM (512 Kbit), and SDRAM (128 Mbit). The
flash memories can store user-specific boot code, allowing the board run
as a stand-alone unit. For more information about selecting the boot
device for the processor, see “Boot Mode and Clock Ratio Select Switch
(SW2)” on page 2-8.
Table 1-1 provides start and end addresses of the board’s external
memories.
Table 1-1. EZ-KIT Lite Evaluation Board External Memory
The parallel flash memory, SDRAM, and SRAM memory connect to the
external memory of the processor. To access the SRAM and flash memories, use memory addressing via the respective memory bank or use the
DMA controller.
The SDRAM memory connects to the SDRAM controller of the processor. A set of programmable timing parameters is available to configure the
SDRAM banks to support slower memory accesses. Care must be taken
when configuring the SDRAM control registers. For more information
regarding the setup of the SDRAM controller, please refer to the
ADSP-2136x SHARC Processor Hardware Reference for ADSP-21367/8/9
Processors. An example program is included in the EZ-KIT Lite installa-
tion directory to demonstrate how to set up the SDRAM interface.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-7
ELVIS Interface
The SPI flash memory connects to the SPI port of the processor and
designates:
• DPI pin 5 (
• DPI pin 3 (
• DPI pin 1 (
DPI5) as a chip select
DPI3) as the SPI clock
DPI1) as the MOSI
• DPI pin 2 (DPI2) as the MISO.
By default, the DPI is setup for the SPI flash, and any required changes to
the SPI flash can be made by modifying the DPI of the processor. An
example program is included in the EZ-KIT Lite installation directory to
demonstrate how to read and write to the SPI flash memory.
The asynchronous SRAM memory and the parallel flash memory connect
to the asynchronous memory controller of the processor. Each of their
respective memory banks can be independently programmed with different timing parameters. For more information on changing wait states to
speed up or slow down the asynchronous controller and other setup information, refer to the ADSP-2136x SHARC Processor Hardware Reference for ADSP-21367/8/9 Processors. Example programs are included in the
EZ-KIT Lite installation directory to demonstrate how to read and write
to the SRAM or flash memory.
ELVIS Interface
The ADSP-21369 EZ-KIT Lite board contains the National Instruments
Educational Laboratory Virtual Instrumentation Suite interface. The
interface features the DC voltage and current measurement modules,
oscilloscope and bode analyzer modules, function generator, arbitrary
waveform generator, and digital IO.
1-8ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
The ELVIS interface is a LabVIEW-based design and prototype environment for university science and engineering laboratories. The ELVIS
interface consists of LabVIEW-based virtual instruments, a multifunction
data acquisition (DAQ) device, and a custom-designed bench-top workstation and prototype board. This combination provides a ready-to-use
suite of instruments found in most educational laboratories. Because the
interface is based on LabVIEW and provides complete data acquisition
and prototyping capabilities, the system is ideal for academic coursework
that range from lower-division classes to advanced project-based
curriculums.
For more information on ELVIS and example demonstration programs,
visit National Instruments Web site at
www.ni.com.
Analog Audio
The AD1835A is a high-performance, single-chip codec featuring four stereo digital-to-analog converters (DAC) for audio output and one stereo
analog-to-digital converters (ADC) for audio input. The codec can input
and output data with a sample rate of up to 96 kHz on all channels. A
192 kHz sample rate can be used with the one of the DAC channels.
The processor is interfaced with the AD1835A via the DAI port. The DAI
interface pins can be configured to transfer serial data from the AD1835A
codec in either time-division multiplexed (TDM) or two-wire interface
mode (TWI). For more information on the AD1835A connection to the
DAI, see “DAI Interface” on page 2-4.
The master input clock (
MCLK) for the AD1835A can be generated by the
on-board 12.288 MHz oscillator or can be supplied by one of the DAI
pins of the processor. Using one of the pins to generate the
MCLK, as
opposed to the on-board oscillator, allows synchronization of multiple
devices in the system. This is done on the EZ-KIT Lite when data is coming from the SPDIF receiver and being output through the audio codec.
The SPDIF
MCLK is routed to the AD1835A MCLK in the processor’s signal
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-9
LEDs and Push Buttons
routing unit (SRU). It is also necessary to disable the on-board audio
oscillator from driving the audio codec and the processor’s input pin. For
instructions on how to configure the clock, refer to “Codec Setup Switch
(SW3)” on page 2-10.
The AD1835A codec can be configured as a master or as a slave, depending on the DIP switch settings. In master mode, the AD1835A drives the
serial port clock and frame sync signals to the processor. In slave mode,
the processor must generate and drive all of the serial port clock and frame
sync signals. For information on how to set the mode, refer to “Codec
Setup Switch (SW3)” on page 2-10.
The AD1835A audio codec’s internal configuration registers are configured using the SPI port of the processor. The DPI pin 4 (
DPI4 register) is
used as the select for the device. For information on how to configure the
multichannel codec, refer to the codec’s datasheet, which can be found at
electret microphone on this connector, configure the SW4 switch according
the instructions in “Electret Microphone Select Switch (SW4)” on
page 2-11. The four output channels connect to the RCA connector
J5.
Channel 4 of the codec connects to the headphone jack P7. For more
information about the connectors see “Connectors” on page 2-20.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
LEDs and Push Buttons
The EZ-KIT Lite has eight general-purpose user LEDs and four general-purpose push buttons.
1-10ADSP-21369 EZ-KIT Lite Evaluation System Manual
Using EZ-KIT Lite
Two of the general-purpose push buttons are attached to the
FLAG pins of
the processor, while the other two are attached to the DAI pins. All of the
push buttons connect to the processor through a DIP switch. The DIP
switch allows processor pins, which connect to the push buttons, to be disconnected. See “Push Button Enable Switch (SW7)” on page 2-12 for
instructions on how to disable the push buttons from driving the corresponding processor pin.
The state of the push buttons, connected to the
mined by reading the
FLAG register. The push buttons connected to the
FLAG pins, can be deter-
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state. Table 1-2 shows how each
push button connects to the processor. Refer to the related example program shipped with the EZ-KIT Lite for more information.
Table 1-3 summarizes the LED connections to the processor. In order to
use the LEDs connected to the DAI or DPI, the respective registers inside
the processor must be correctly configured. For more information on how
to program the pins, refer to the ADSP-2136x SHARC Processor Hardware Reference for ADSP-21367/8/9 Processors.
An example program is included in the EZ-KIT Lite installation
L
directory to demonstrate the functionality of the LEDs and push
buttons.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-11
Example Programs
Table 1-3. LED Connections
LED Reference Designator Processor Pin
LED1DPI6
LED2DPI7
LED3DPI8
LED4DPI13
LED5DPI14
LED6DAI15
LED7DAI16
LED8FLAG3/~MS3/~IRQ3
Example Programs
Example programs are provided with the ADSP-21369 EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software and can be found in the
\…\213xx\EZ-KITs\ADSP-21369\Examples subdirectory of the Visu-
alDSP++ installation directory. Please refer to the readme file provided
with each example for more information.
Background Telemetry Channel
The ADSP-21369 USB debug agent supports the background telemetry
channel (BTC), which facilitates data exchange between VisualDSP++ and
the processor without interrupting processor execution.
The BTC allows the user to view a variable as it is updated or changed, all
while the processor continues to execute. For increased performance of the
BTC, including faster reading and writing, please check out our latest line
of processor emulators at
1-12ADSP-21369 EZ-KIT Lite Evaluation System Manual
http://www.analog.com/proces-
Using EZ-KIT Lite
sors/resources/crosscore/emulators/index.html. For more
information about the background telemetry channel, see the VisualDSP++ User’s Guide or online Help.
ADSP-21369 EZ-KIT Lite Evaluation System Manual1-13
Background Telemetry Channel
1-14ADSP-21369 EZ-KIT Lite Evaluation System Manual
2EZ-KIT LITE HARDWARE
REFERENCE
This chapter describes the hardware design of the ADSP-21369 EZ-KIT
Lite board. The following topics are covered.
•“System Architecture” on page 2-2
Describes the configuration of the ADSP-21369 board and
explains how the board components interface with the processor.
•“Switch Settings” on page 2-8
Shows the location and describes the function of the board
switches.
•“LEDs and Push Buttons” on page 2-14
Shows the location and describes the function of the board LEDs
and push buttons.
•“Jumpers” on page 2-17
Shows the location and describes the function of the board
jumpers.
•“Connectors” on page 2-20
Shows the location and gives the part number for all of the connectors on the board. Also, the manufacturer and part number
information is given for the mating parts.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board (Figure 2-1).
JTAG
Header
DPI
Conn
RS
232
Conn
r
o
t
c
V
e
0
.
n
7
n
+
o
C
3.3V
A5V
Power Regulation
24.576 MHz
Oscillator
Reset PB
ADM3202
5
1.3V
1
LEDs
(8)
2
t
r
o
P
G
A
T
J
ADSP-21369
DPI
SPI FLASH
0,1, and 3
2
PBs (4)
FLAGs
4M x 32
SDRAM
DSP
2
Stereo In RCA
Jacks (2x1)
512k x 8
SRAM
External
Port
DAI
AD1835
CODEC
Stereo Out RCA
Jacks (4x2)
1M x 8
Flash
Expansion
Connectors
Headphon e
Jack
Type A
SPDIF In
Phono
SPDIF Out
Phono
DAI
Conn
ELVIS
Conn
Figure 2-1. System Architecture Block Diagram
The EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-21369 processor. The processor core is powered at 1.3V, and the
IO is powered at 3.3V.
2-2ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
The
CLKIN pin of the processor connects to a 24.576 MHz oscillator. The
core frequency of the processor is derived by multiplying the frequency at
the
CLKIN pin by a value determined by the state of the processor pins
CLKCFG1 and CLKCFG0. The value at these pins is determined by the state of
SW2 switch (see “Boot Mode and Clock Ratio Select Switch (SW2)” on
the
page 2-8). By default, the EZ-KIT Lite gives a core frequency of
393.216 MHz. It is possible to change the speed of the processor by
changing the value of the
The
SW2 switch also configures the boot mode of the processor. The
PMCTL register.
EZ-KIT Lite is capable of EPROM/flash boot and SPI boot. By default,
the EZ-KIT Lite boots from the flash memory. For information about
configuring the boot modes, see “Boot Mode and Clock Ratio Select
Switch (SW2)” on page 2-8.
External Port
The external port of the ADSP-21369 processor consists of a 24-bit
address bus, 32-bit data memory bus, and control lines. The control lines
are used to select, read, and write to external memory devices.
The external port connects to an 8-bit parallel flash memory, an 8-bit
SRAM memory, and a 32-bit SDRAM memory. See “External Memory”
on page 1-7 for more information about accessing the flash and SDRAM
memories.
All of the external port signals are available externally via the expansion
interface connectors (
J3–1). The pinout of the connectors can be found in
“Schematics” on page B-1.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-3
System Architecture
DAI Interface
The pins of the digital application interface (DAI) connect to the signal
routing unit (SRU). The SRU is a flexible routing system, providing a
large system of signal flows within the processor. In general, the SRU
allows to route the DAI pins to different internal peripherals in various
combinations.
The DAI pins connect to the AD1835A audio codec, a 26-pin header, two
RCA connectors, the audio oscillator output, an external phase lock loop
(PLL) circuit, two LEDs, and two push buttons. Figure 2-2 illustrates the
EZ-KIT Lite’s connections to the DAI.
DAI20 (SFS45)
DAI19 (SCLK45)
DAI18 (SD5B)
DAI17 (SD5A)
DAI16 (SD4B)
DAI15 (SD4A)
DAI14 (SFS23)
DAI13 (SCLK23)
DAI12 (SD3B)
DAI11 (SD3A)
DAI10 (SD2B)
DAI9 (SD2A)
DAI8 (SFS1)
DAI7 (SCLK1)
DAI5 (SD1A)
DAI6 (SD1B)
DAI4 (SFS0)
DAI3 (SCLK0)
DAI2 (SD0B)
DAI1 (SD0A)
DSP
PB_4
PB_3
SPDIF I N
AUDIO OSC
LED7
LED6
ELVIS_TRIG
PLLMCL K IN
PLLMCLK OUT
SPDIF OUT
DAIP17
12.288MHz
Figure 2-2. DAI Connections Block Diagram
DAC_LRCLK
DAC_BCLK
DAC_SDATA1
DAC_SDATA2
DAC_SDATA3
DAC_SDATA4
AD1835
ADC_LRCLK
ADC_BCLK
ADC_SDATA1
MCLK
DAC1
DAC2
DAC3
DAC4
ADC
4x2
RCA
Phono
Jack
OUT
Headphone
Jack
1X2
RCA
Phono
Jack IN
2-4ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
To use the DAI for a different purpose, disable any signal driving the DAI
pins with a switch (see “Codec Setup Switch (SW3)” on page 2-10). In
addition, the
SW3 switch allows flexible routing of the 12.288 MHz audio
oscillator’s output signal. By default, this signal is used as the master clock
(
MCLK) for the AD1835A codec.
All of the DAI signals are available externally via the expansion interface
connectors (
J3–1), as well as the 0.1” spaced header P4. The pinout of
these connectors can be found in “Schematics” on page B-1.
DPI Interface
The pins of the digital peripheral interface (DPI) connect to a second signal routing unit (
routing system, providing a large system of signal flows within the processor. In general, the
peripherals in various combinations.
SRU2). The SRU2 unit, similar to the SRU, is a flexible
SRU2 allows to route the DPI pins to different internal
ADSP-21369
DPI12 (UART CTS)
DPI11 (UART RTS)
DPI10 (UART RX)
DPI9 (UART TX)
DPI14 (LED5)
DPI13 (LED4)
DPI8 (LED3)
DPI7 (LED2)
DPI6 (LED1)
DPI5 (SPI_FLASHCS)
DPI4 (SPI_AD1835CS)
DPI3 (SPICLK)
DPI2 (MISO)
DPI1 (MOSI)
LED5
LED4
LED3
LED2
LED1
T2IN
R2OUT
R1OUT
T1IN
CS/
SCK
SO
SI
CLATCH
CCLK
COUT
CIN
ADM3202
SPI
FLASH
AD1835
T2OUT
R2IN
R1IN
T1OUT
DB-9
Conn
Figure 2-3. DPI Connections Block Diagram
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-5
System Architecture
Figure 2-3 illustrates the EZ-KIT Lite’s connections to the DPI. The DPI
pins connect to the SPI flash memory, the SPI interface of the AD1835A
codec, a UART, a 20-pin header, and five LEDs.
To use the DPI for a different purpose, disable any signal driving the DPI
pins with a switch (see “UART Enable Switch (SW5)” on page 2-11). Any
DPI pin connected to an LED can be used without having to disconnect
the pin. You can, however, see the respective LED turn
ON and OFF when
using the signal for other purposes.
All of the DPI signals are available externally via the expansion interface
connectors (
J3–1), as well as the 0.1” spaced header P3. The pinout of
these connectors can be found in “Schematics” on page B-1.
FLAG Pins
The processor has four general-purpose IO flag pins. Table 2-1 describes
the flag connections.
Table 2-1. IO FLAG Pins
FLAG PinEZ-KIT Lite Function
FLAG0Push button (SW2) input
FLAG1Push button (SW2) input
FLAG2SDRAM chip select
FLAG3LED8
For information on how to disable the push buttons from driving the corresponding processor flag pin, see “Push Button Enable Switch (SW7)” on
page 2-12.
The
FLAG signals are available externally via the expansion interface con-
nectors (
J3–1). The pinout of these connectors can be found in
“Schematics” on page B-1.
2-6ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
External PLL
The ADSP-21369 EZ-KIT Lite contains an external phase lock loop to
help generate a faster and more stable master input clock
MCLK. The PLL
uses DAI pin 3 as an input clock from the ADSP-21369 processor. The
new clock generated by PLL connects to the processor via DAI pin 2.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s external PLL.
Expansion Interface
The expansion interface consists of the three 90-pin connectors. Table 2-2
shows the interfaces each connector provides. For the exact pinout of these
connectors, refer to “Schematics” on page B-1. The mechanical dimensions of the connectors can be obtained from Technical or Customer
Support.
Table 2-2. Expansion Interface Connectors
ConnectorInterfaces
J15V, ADDR[23–0], DATA[31–0]
J2
J35V, 3.3V, reset, parallel port control signals
3.3V, FLAG[3–0], DAIP[20–1], DPI[14–1], SDRAM control signals
Limits to the current and to the interface speed must be taken into consideration when using the expansion interface. The maximum current limit is
dependent on the capabilities of the used regulator. Additional circuitry
can also add extra loading to signals, decreasing their maximum effective
speed.
Analog Devices does not support and is not responsible for the
[
effects of additional circuitry.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-7
Switch Settings
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the internal and
external memory of the processor through a 6-pin interface. The JTAG
emulation port of the processor also connects to the USB debugging interface. When an emulator connects to the board at
interface is disabled. This is not the standard connection of the JTAG
interface.
For information about the standard connection of the interface, see EE-68
published on the Analog Devices Web site. For more information about
the JTAG connector, see “JTAG Header (P2)” on page 2-25. To learn
more about available emulators, go to Analog Devices Web site:
This section describes the function of the EZ-KIT Lite switches.
Figure 2-4 shows the switch locations and default settings.
Boot Mode and Clock Ratio Select Switch (SW2)
The SW2 switch sets the boot mode and clock multiplier ratio. Table 2-3
shows how to set up the boot mode using positions 1 and 2. By default,
the EZ-KIT Lite boots in external port mode from flash memory.
Table 2-4 shows how to set up the clock multiply ratio using positions 3
and 4. By default, the processor increases the clock multiply ratio by sixteen, setting the core clock to 393.216 MHz.
2-8ADSP-21369 EZ-KIT Lite Evaluation System Manual
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-9
Switch Settings
Table 2-4. Core Clock Rate Configuration
CLKCFG1 (Position 3)CLKCFG0 (Position 4)Core to CLKIN Ratio
ON ON6:1
ONOFF
OFFON32:1
16:1
1
OFF
1 Bold typeface denotes the default ratio.
OFF
Reserved
The core clock frequency can be increased or decreased via software by
writing to the
PMCTL register. For more information on changing core
clock frequency and other setup information, refer to the ADSP-2136x
SHARC Processor Hardware Reference for ADSP-21367/8/9 Processors.
Codec Setup Switch (SW3)
The codec setup switch (SW3) can be used to change the routing of some of
the signals going to the AD1835A codec and to setup the communication
protocol of the codec.
Positions 1 and 2 determine the clock routing for the audio oscillator to
the codec and to the processor. Figure 2-5 illustrates how the switch
positions 1 and 2 connect on the board. In the default position, route the
DAI_P17 pin to DAI_P6 (in software) to clock the AD1835A.
Position 3 of the SW3 switch determines if the AD1835A device is a master
or is a slave. If the AD1835A is a master, the device’s serial interface generates the frame sync and clock signals necessary to transfer data. When
the device is a slave, the processor must generate the frame sync and clock
signals. By default, position 3 is
trol signals.
ON, and the AD1835A generates the con-
2-10ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
ADSP-21369 Processor
DAI_P17
SW3.1
SW3.2
AD1835A Codec
MCLK DAI_P6
12.288MHz
OSC
Figure 2-5. Audio Clock Routing
Position 4 of
SW3 disconnects the AD1835A’s ADC_DATA pin from the DAI
interface. This is useful when the DAI interface connects to another
device.
Electret Microphone Select Switch (SW4)
To connect an electret microphone to the audio input, place all positions
of the
of the positions are in the
signal, and gain of the input amplifiers is changed from 1x to 10x.
SW4 switch ON. The default position of the switch is all OFF. When all
ON position, a DC offset of 2.5V is added to the
UART Enable Switch (SW5)
The UART enable switch (SW5) disconnects UART signals from the DPI
pins of the processor. When the switch is in the
ated DPI signal (see Table 2-5) can be used on the expansion interface.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-11
OFF position, the associ-
Switch Settings
Table 2-5. UART Enable Switch (SW5)
Switch PositionEZ-KIT Lite SignalProcessor Signal
1
1 (OFF
2 (ON)RXDPI10
3 (OFF)RTSDP11
4 (ON)T2IN tied to R2OUTN/A
1 Bold typeface denotes the default setting.
)
CTSDPI12
Loop-Back Test Switches (SW6 and SW14)
The loop-back test switch SW6 is located at the top left side of the board.
The second loop-back test switch,
the board. These switches are used only for testing; all switch positions
should be
OFF.
SW14, is located at the top right side of
Push Button Enable Switch (SW7)
The push button enable switch (SW7) disconnects the push buttons from
the corresponding processor pins. This allows the signals to be used for
another purpose. Table 2-6 shows the
position of the
SW7 switch are ON, allowing the push buttons to function as
2-12ADSP-21369 EZ-KIT Lite Evaluation System Manual
SW7 connections. By default, all
EZ-KIT Lite Hardware Reference
ELVIS Oscilloscope Configuration Switch (SW1)
The oscilloscope configuration switch (SW1) determines which audio circuit signals connect to channels A and B of the oscilloscope. The switch is
used only when the board connects to the Educational Laboratory Virtual
Instrumentation Suite (ELVIS) station (see “ELVIS Interface” on
page 1-8). Each channel must have only one signal selected at a time, as
ELVIS Function Generator Configuration Switch
(SW13)
The function generator configuration switch (SW13) controls which signals
connect to the left and right input signals of the audio interface. The
switch is used only when the board connects to the ELVIS station (see
“ELVIS Interface” on page 1-8). Each channel must have only one signal
selected at a time, as described in Table 2-8.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-13
SW13
LEDs and Push Buttons
Table 2-8. ELVIS Function Generator Configuration Switch (SW13)
ChannelSwitch PositionAudio Signal
AMP_LEFT_IN
AMP_RIGHT_IN
AMP_LEFT_IN
AMP_RIGHT_IN
AMP_LEFT_IN
AMP_RIGHT_IN
1 Bold typeface denotes the default settings.
1 (ON1)
2 (ON)RIGHT_IN
3 (OFF)DAC0
4 (OFF)DAC1
5 (OFF)FUNCT_OUT
6 (OFF)FUNCT_OUT
LEFT_IN
LEDs and Push Buttons
This section describes the functionality of the LEDs and push buttons.
Figure 2-6 shows the LED and push button locations.
General Purpose LEDs (LED1–8)
There are eight general-purpose LEDs on the board. Five LEDs connect to
the DPI interface, two LEDs connect to the DAI interface, and one LED
connects to
page 1-10 summarizes the LED connections. In order to use the LEDs
connected to the DAI or DPI, the respective registers inside the processor
must be correctly configured. For more information on how to program
the pins, refer to the ADSP-2136x SHARC Processor Hardware Reference for ADSP-21367/8/9 Processors.
FLAG3 of the processor. “LEDs and Push Buttons” on
Power LED (LED9)
When LED9 is lit (green), it indicates that power is being properly supplied
to the board.
2-14ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Figure 2-6. LED and Push Button Locations
Reset LEDs (LED10 and LED12)
When LED10 is lit (red), the master reset of all the major ICs is active.
When
USB chip is reset only on power-up, or if USB communication has not
been initialized.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-15
LED12 is lit (red), the USB interface chip (U4) is being reset. The
LEDs and Push Buttons
USB Monitor LED (LED11)
The USB monitor LED (LED11) indicates that USB communication has
been initialized successfully, and you can connect to the processor using a
VisualDSP++ EZ-KIT Lite session. Once the USB cable is plugged into
the board, it takes approximately 15 seconds for the USB monitor LED to
light. If the LED does not light, try cycling power on the board and/or
reinstalling the USB driver (see the VisualDSP++ Installation Quick Refer-ence Card).
L
When VisualDSP++ is actively communicating with the EZ-KIT
Lite target board, the LED can flicker, indicating communications
handshake.
Push Buttons (SW8–11)
Four push buttons (SW8–11) are provided for general-purpose user input.
Two of the push buttons connect to the
other two connect to the DAI of the processor. The push buttons are
active
“LEDs and Push Buttons” on page 1-10 for more information. The push
button enable switch (
from the corresponding processor pin (refer to “Push Button Enable
Switch (SW7)” on page 2-12 for more information).
The push buttons and corresponding processor signals summarized in
Table 2-9.
Table 2-9. Push Button Connections
HIGH and, when pressed, send a High (1) to the processor. Refer to
The RESET push button (SW12) resets all of the ICs on the board. The only
exception is the USB interface chip (
the push button is pressed after the USB cable has been plugged in and
communication correctly initialized with the PC. After USB communication has been initialized, the only way to reset the USB is by powering
down the board.
U4). The chip is not being reset when
Jumpers
Figure 2-7 shows the locations and default settings of the EZ-KIT Lite
jumpers.
VCO Select Jumper (JP1)
The voltage controlled oscillator (VCO) select jumper (JP1) configures
the frequency selection of the on-board external PLL (
installed, the VCO output frequency is multiplied by a factor of 1.0. Conversely, when uninstalled, the VCO output frequency is multiplied by a
factor of 0.5 or divided in half. The jumper settings are shown in
Table 2-10.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-17
U39). When JP1 is
Jumpers
Figure 2-7. Jumper Locations
Table 2-10. VCO Select Jumper (JP1)
JP1 SettingMode
OFFVCO Output frequency x ½ (default)
ONVCO output frequency x 1.0
2-18ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
ELVIS Select Jumper (JP2)
TheELVIS select jumper (JP2) configures the EZ-KIT Lite’s connection
to an ELVIS station (see “ELVIS Interface” on page 1-8). When
JP2 is
installed, the connections to the push buttons and LED are re-directed to
the ELVIS station, instead of the processor. The jumper settings are
shown in Table 2-11.
Table 2-11. ELVIS Select Jumper (JP2)
JP2 SettingMode
OFFNot connected to ELVIS (default)
ONConnected to ELVIS
ELVIS Voltage Selection Jumper (JP3)
The ELVIS voltage selection jumper (JP3) is used to select the power
source for the EZ-KIT Lite. In a standard mode of operation, the board
receives its power from an external power supply. When
JP3 is installed,
the board is powered from an ELVIS station and no external power supply
is required. The jumper settings are shown in Table 2-12.
Table 2-12. ELVIS Voltage Selection Jumper (JP3)
JP3 SettingMode
OFFPowered from an external power supply (default)
ONPowered from ELVIS
The external power supply must be disconnected from the board
[
when
JP3 is installed. In this case, the power supply may cause
damage to the EZ-KIT Lite board and ELVIS unit.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-19
Connectors
ELVIS Programmable Flag Jumper (JP4)
The ELVIS programmable flag jumper (JP4) connects the ADSP-21369
processor’s
is directly connected to the ELVIS
uninstalled, the
DAI4 pin to the ELVIS trigger pin. When JP4 is installed, DAI4
TRIG1_2 pin. Conversely, when JP4 is
DAIP4 pin is disconnected and can be used for other
non-ELVIS functionality. The jumper settings are shown in Table 2-13.
Table 2-13. ELVIS Select Jumper (JP4)
JP4 SettingMode
OFFDAI4 disconnected from ELVIS TRIG pin (default)
ONDAI4 connected to ELVIS TRIG pin
Connectors
This section describes the connector functionality and provides information about mating connectors. Figure 2-8 shows the connector locations.
Expansion Interface Connectors (J1–J3)
Three board-to-board connectors (J1–3) provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information about the expansion interface, see
“Expansion Interface” on page 2-7. For the
and pricing, contact Samtec.
2-20ADSP-21369 EZ-KIT Lite Evaluation System Manual
J1–3 connectors’ availability
EZ-KIT Lite Hardware Reference
Figure 2-8. Connector Locations
Part DescriptionManufacturerPart Number
90 Position 0.05" Spacing,
SMT
90 Position 0.05” Spacing
(Through Hole)
SamtecSFC-145-T2-F-D-A
Mating Connector
SamtecTFM-145-x1 Series
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-21
Connectors
Part DescriptionManufacturerPart Number
90 Position 0.05” Spacing
(Surface Mount)
90 Position 0.05” Spacing
(Low Cost)
SamtecTFM-145-x2 Series
SamtecTFC-145 Series
Audio In RCA Connector (P10)
Part DescriptionManufacturerPart Number
Two channel right angle RCA jackSwitchcraftPJRAS1X2S02
Mating Cable
Two channel RCA interconnect cable Monster CableBI100-1M
Audio Out RCA Connector (J5)
Part DescriptionManufacturerPart Number
Six channel right angle RCA jackSwitchcraftPJRAS2X2S01
Mating Cable
Two channel RCA interconnect cable Monster CableBI100-1M
Headphone Out Jack (P7)
Part DescriptionManufacturerPart Number
3.5mm stereo jackShogyoSJ-0359AM-5
Power Jack (J4)
The power connector (J4) provides all of the power necessary to operate
the EZ-KIT Lite board.
2-22ADSP-21369 EZ-KIT Lite Evaluation System Manual
EZ-KIT Lite Hardware Reference
Part DescriptionManufacturerPart Number
2.5 mm Power JackSwitchcraft
Digi-Key
Mating Power Supply (shipped with EZ-KIT Lite)
7V Power SupplyCUI Inc.DMS070214-P6P-SZ
RAPC712
SC1152-ND
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-14 shows the power supply specifications.
Table 2-14. Power Supply Specifications
TerminalConnection
Center pin+7 VDC@2.14A
Outer RingGND
RS-232 Connector (P1)
Part DescriptionManufacturerPart Number
DB9, Female, Right AngleDigi-KeyA2100-ND
Mating Cable
Cable DB9M to DB9F 6 feetDigi-Key45-0308-0000-ND
SPDIF Coax Connectors (P8 and P9)
Part DescriptionManufacturerPart Number
Coaxial SwitchcraftPJRAN1X1U01
Mating Cable
Two channel RCA interconnect
cable
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-23
Monster CableBI100-1M
Connectors
DPI Header (P3)
The DPI connector (P3) provides access to all of the DPI signals in the
from of a .1” spacing header. When using the header to access the DPI
pins of the processor, ensure that signals, which normally drive the DPI
pins, are disabled. For more information, see “DPI Interface” on page 2-5.
Part DescriptionManufacturerPart Number
20-pin IDC HeaderSullinsS2012-10
DAI Header (P4)
The DAI connector (P4) provides access to all of the DAI signals in the
from of a .1” spacing header. When using the header to access the DAI
pins of the processor, ensure that signals, which normally drive the DAI
pins, are disabled. Refer to “Codec Setup Switch (SW3)” on page 2-10 for
more information on how to disable signals already being driven from
elsewhere on the EZ-KIT Lite.
Part DescriptionManufacturerPart Number
26-pin IDC Header Berg54102-T08-13
USB Connector (P5)
The USB connector (P5) allows to configure and program the processor.
Part DescriptionManufacturerPart Number
Type B USB receptacle Mill-Max
Digi-Key
2-24ADSP-21369 EZ-KIT Lite Evaluation System Manual
897-30-004-90-000
ED90003-ND
EZ-KIT Lite Hardware Reference
JTAG Header (P2)
The JTAG header (P2) is the connecting point for a JTAG in-circuit emulator pod. When an emulator is connected to the JTAG header, the USB
debug interface is disabled.
L
L
Part DescriptionManufacturerPart Number
14-pin IDC HeaderBerg54102-T08-07
Pin 3 is missing to provide keying. Pin 3 in the mating connector
should have a plug.
When using an emulator with the EZ-KIT Lite board, follow the
connection instructions provided with the emulator.
ADSP-21369 EZ-KIT Lite Evaluation System Manual2-25
Connectors
2-26ADSP-21369 EZ-KIT Lite Evaluation System Manual
ABILL OF MATERIALS
The bill of materials corresponds to the board schematics on page B-1.
Please check the latest schematics on the Analog Devices website,
P8-9 (SPDIF coax), 2-23
contents, of EZ-KIT Lite package, 1-2
core
frequency, 2-3
to CLKIN ratio, 2-10
current limit, 2-7
customer support, xiv
D
DAI, See digital audio interface
data acquisition (DAQ) device, 1-9
data IO rate, 1-9
DB9 (female) connector, xi, 2-23
default configuration, of this EZ-KIT Lite, 1-3
digital audio interface (DAI)
connectors, 1-11, 1-12, 2-4, 2-14
disabling, 2-5, 2-11
header (P4), xii, 2-4, 2-24
transferring data from codec, 1-9
digital peripheral interface (DPI)