The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase
from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without
prior notice. Information furnished by Analog Devices is believed to be
accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use; nor for any infringement of patents or other rights of
third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice
The Analog Devices logo, VisualDSP++, the VisualDSP++ logo, SHARC,
SHARC logo, CROSSCORE, the CROSSCORE logo, EZ-KIT Lite, and
EZ-Extender are registered trademarks of Analog Devices, Inc.
All other brand and product names are trademarks or service marks of
their respective owners.
Regulatory Compliance
The ADSP-21364 EZ-KIT Lite evaluation system has been certified to
comply with the essential requirements of the European EMC directive
89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE”
mark.
The ADSP-21364 EZ-KIT Lite evaluation system had been appended to
Analog Devices Development Tools Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE
Certification by an appointed European Competent Body and is on file.
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human
body and equipment and can discharge without
detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD
precautions are recommended to avoid performance
degradation or loss of functionality. Store unused
EZ-KIT Lite boards in the protective shipping
package.
CONTENTS
PREFACE
Purpose of This Manual ................................................................. xii
Intended Audience ......................................................................... xii
Manual Contents .......................................................................... xiii
What’s New in This Manual ........................................................... xiv
Technical or Customer Support ...................................................... xiv
Supported Processors ....................................................................... xv
Product Information ....................................................................... xv
MyAnalog.com .......................................................................... xv
Processor Product Information .................................................. xvi
Related Documents .................................................................. xvi
Online Technical Documentation ............................................ xvii
Accessing Documentation From VisualDSP++ .................... xviii
Accessing Documentation From Windows .......................... xviii
Accessing Documentation From Web ................................... xix
Printed Manuals ....................................................................... xix
VisualDSP++ Documentation Set ......................................... xix
Hardware Tools Manuals ....................................................... xx
Processor Manuals ................................................................. xx
ADSP-21364 EZ-KIT Lite Evaluation System Manualv
CONTENTS
Data Sheets .......................................................................... xx
Notation Conventions .................................................................... xx
Power ......................................................................................... B-11
INDEX
viiiADSP-21364 EZ-KIT Lite Evaluation System Manual
PREFACE
Thank you for purchasing the ADSP-21364 EZ-KIT Lite®, Analog
Devices, Inc. evaluation system for SHARC® processors.
The SHARC processors are based on a 32-bit super Harvard architecture
that includes a unique memory architecture comprised of two large
on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives a SHARC processor the bandwidth for sustained
high-speed computations. SHARC processors represents today’s de facto
standard for floating-point processor targeted for premium audio
applications.
The evaluation system is designed to be used in conjunction with the
VisualDSP++® development environment to test the capabilities of the
ADSP-21364 SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code
development and debug, such as:
•Create, compile, assemble, and link application programs written
in C++, C, and ADSP-21364 assembly
•Load, run, step, halt, and set breakpoints in application program
•Read and write data and program memory
•Read and write core and peripheral registers
•Plot memory
ADSP-21364 EZ-KIT Lite Evaluation System Manualix
Access to the ADSP-21364 processor from a personal computer (PC) is
achieved through a USB port or an optional JTAG emulator. The USB
interface gives unrestricted access to the ADSP-21364 processor and the
evaluation board peripherals. Analog Devices JTAG emulators offer faster
communication between the host PC and target hardware. Analog Devices
carries a wide range of in-circuit emulation products. To learn more about
Analog Devices emulators and processor development tools, go to
http://www.analog.com/processors/index.html.
L
alDSP++ installation. The EZ-KIT Lite is a licensed product that
offers an unrestricted evaluation license for the first 90 days. For
details about evaluation license restrictions after the 90 days, refer
to “Evaluation License Restrictions” on page 1-7.
ADSP-21364 EZ-KIT Lite provides example programs to demonstrate the
capabilities of the evaluation board.
The board features:
•Analog Devices ADSP-21364 processor
The ADSP-21364 EZ-KIT Lite installation is part of the Visu-
D 136-pin BGA package
D 300 MHz core clock speed
•Synchronous random access memory (SRAM)
D 512 Kbit x 8-bit
•Flash memory
D 1M x 8-bit
• Serial peripheral interface (SPI) flash memory
D 2Mbit
xADSP-21364 EZ-KIT Lite Evaluation System Manual
•Analog audio interface
D AD1835A codec
D 4x2 RCA phono jack for 4 channels of stereo output
D 2x1 RCA phono jack for 1 channel of stereo input
D Headphone jack for 1 channel stereo output
•Digital audio interface
D RCA phono jack output
D RCA phono jack input
•LEDs
D 11 LEDs: 1 power (green), 1 board reset (red), 1 USB mon-
itor (amber), and 8 general purpose (amber)
•Push buttons
Preface
D 5 push buttons: 1 reset, 2 connected to DAI,
2 connected to the FLAG pins of the processor
•Expansion interface (type A)
D Parallel port, FLAGs, DAI, SPI
•Other features
D JTAG ICE 14-pin header
D 0-ohm resistors for processor current measurement
D SPI header
D DAI header
The EZ-KIT Lite board has a total of 1 MB of parallel flash memory and
2 MB of SPI flash memory. The flash memories can store user-specific
boot code, allowing the board to run as a stand-alone unit. For more
ADSP-21364 EZ-KIT Lite Evaluation System Manualxi
Purpose of This Manual
information, see “External Memory” on page 1-7 and “Boot Mode and
Clock Ratio Select Switch (SW10)” on page 2-12. The board also has
512 KB of SRAM, which can be used at runtime.
The DAI of the processor connects to the AD1835A audio codec and two
connectors, which allow Sony/Philips Digital Interface (S/PDIF) input
and output. The interface facilitates development of digital and analog
audio signal-processing applications. See “Analog Audio” on page 1-8 and
“S/PDIF Coax Connectors (J8 and J9)” on page 2-18 for more
information.
Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector
expansion interface. See “Expansion Interface” on page 2-7 for details.
Purpose of This Manual
The ADSP-21364 EZ-KIT Lite Evaluation System Manual provides
instructions for installing the product hardware (board) and describes the
operation and configuration of the board components. The product software component is detailed in the VisualDSP++ Installation Quick Reference Card. The manual provides guidelines for running your own
code on the ADSP-21364 EZ-KIT Lite. Finally, a schematic and a bill of
materials are provided as a reference for future designs.
Intended Audience
The primary audience for this manual is a programmer who is familiar
with Analog Devices processors. This manual assumes that the audience
has a working knowledge of the appropriate processor architecture and
instruction set. Programmers who are unfamiliar with Analog Devices
processors can use this manual but should supplement it with other texts
xiiADSP-21364 EZ-KIT Lite Evaluation System Manual
Preface
(such as the ADSP-2136x SHARC Processor Programming Reference and
ADSP-2136x SHARC Processor Hardware Reference) that describe your tar-
get architecture.
Programmers who are unfamiliar with VisualDSP++ should refer to the
VisualDSP++ online Help and the VisualDSP++ user’s or getting started
guides. For the locations of these documents, see “Related Documents”.
Manual Contents
The manual consists of:
•Chapter 1, “Using ADSP-21364 EZ-KIT Lite” on page 1-1
Provides information on the EZ-KIT Lite from a programmer’s
perspective and provides an easy-to-access memory map.
•Chapter 2, “ADSP-21364 EZ-KIT Lite Hardware Reference” on
page 2-1
Provides information on the hardware aspects of the evaluation
system.
•Appendix A, “ADSP-21364 EZ-KIT Lite Bill Of Materials” on
page A-1
Provides a list of components used to manufacture the EZ-KIT
Lite board.
•Appendix B, “ADSP-21364 EZ-KIT Lite Schematic” on page B-1
Provides the resources to allow modifications to the EZ-KIT Lite
or to use as a reference design.
L
ADSP-21364 EZ-KIT Lite Evaluation System Manualxiii
Appendix B now is part of the online Help. The PDF version of
the ADSP-21364 EZ-KIT Lite Evaluation System Manual is located
in the
Alternatively, the schematic can be found on the Analog Devices
Web site: http://www.analog.com/processors.
Docs\EZ-KIT Lite Manuals folder on the installation CD.
What’s New in This Manual
What’s New in This Manual
This edition of the ADSP-21364 EZ-KIT Lite Evaluation System Manual
documents ADSP-21364 EZ-KIT Lite compliance with the RoHS and
WEEE directives.
Technical or Customer Support
You can reach Analog Devices, Inc. Customer Support in the following
ways:
•Visit the Embedded Processing and DSP products Web site at
•Contact your Analog Devices, Inc. local sales office or authorized
distributor
•Send questions by mail to:
Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
USA
xivADSP-21364 EZ-KIT Lite Evaluation System Manual
Supported Processors
The ADSP-21364 EZ-KIT Lite evaluation system supports the Analog
Devices ADSP-21364 SHARC processors.
Product Information
You can obtain product information from the Analog Devices Web site,
from the product CD-ROM, or from the printed publications (manuals).
Analog Devices is online at http://www.analog.com. Our Web site provides information about a broad range of products—analog integrated
circuits, amplifiers, converters, and digital signal processors.
MyAnalog.com
Preface
MyAnalog.com is a free feature of the Analog Devices Web site that allows
customization of a Web page to display only the latest information on
products you are interested in. You can also choose to receive weekly
e-mail notifications containing updates to the Web pages that meet your
interests. MyAnalog.com provides access to books, application notes, data
sheets, code examples, and more.
Registration:
Visit http://www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you
to select the information you want to receive.
If you are already a registered user, just log on. Your user name is your
e-mail address.
ADSP-21364 EZ-KIT Lite Evaluation System Manualxv
Product Information
Processor Product Information
For information on embedded processors and DSPs, visit our Web site at
http://www.analog.com/processors, which provides access to technical
publications, data sheets, application notes, product overviews, and product announcements.
You may also obtain additional information about Analog Devices and its
products in any of the following ways.
Online documentation comprises the VisualDSP++ Help system, software
tools manuals, hardware tools manuals, processor manuals, the Dinkum
Abridged C++ library, and Flexible License Manager (FlexLM) network
license manager software documentation. You can easily search across the
entire VisualDSP++ documentation set for any topic of interest. For easy
printing, supplementary .pdf files of most manuals are provided in the
Docs folder on the VisualDSP++ installation CD.
ADSP-21364 EZ-KIT Lite Evaluation System Manualxvii
Product Information
Each documentation file type is described as follows.
File Description
.chmHelp system files and manuals in Help format
.htm or
.html
.pdfVisualDSP++ and processor manuals in Portable Documentation Format (PDF).
Dinkum Abridged C++ library and FlexLM network license manager software documentation. Viewing and printing the
Internet Explorer 5.01 (or higher).
Viewing and printing the .pdf files requires a PDF reader, such as Adobe Acrobat
Reader (4.0 or higher).
.html files requires a browser, such as
If documentation is not installed on your system as part of the software
installation, you can add it from the VisualDSP++ CD at any time by running the Tools installation. Access the online documentation from the
VisualDSP++ environment, Windows
®
Explorer, or the Analog Devices
Web site.
Accessing Documentation From VisualDSP++
To view VisualDSP++ Help, click on the Help menu item or go to the
Windows task bar and navigate to the VisualDSP++ documentation via
the Start menu.
To view ADSP-21364 EZ-KIT Lite Help, which is part of the VisualDSP++ Help system, use the Contents or Search tab of the Help
window.
Accessing Documentation From Windows
In addition to any shortcuts you may have constructed, there are many
ways to open VisualDSP++ online Help or the supplementary documentation from Windows.
xviiiADSP-21364 EZ-KIT Lite Evaluation System Manual
Preface
Help system files (
.chm) are located in the Help folder, and .pdf files are
located in the Docs folder of your VisualDSP++ installation CD-ROM.
The Docs folder also contains the Dinkum Abridged C++ library and the
FlexLM network license manager software documentation.
Your software installation kit includes online Help as part of the Windows
interface. These help files provide information about VisualDSP++ and
the ADSP-21364 EZ-KIT Lite evaluation system.
Select a processor family and book title. Download archive (.zip) files,
one for each manual. Use any archive management software, such as WinZip, to decompress downloaded files.
Printed Manuals
For general questions regarding literature ordering, call the Literature
Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts.
VisualDSP++ Documentation Set
To purchase VisualDSP++ manuals, call 1-603-883-2430. The manuals
may be purchased only as a kit.
If you do not have an account with Analog Devices, you are referred to
Analog Devices distributors. For information on our distributors, log onto
http://www.analog.com/salesdir/continent.asp.
ADSP-21364 EZ-KIT Lite Evaluation System Manualxix
Notation Conventions
Hardware Tools Manuals
To purchase EZ-KIT Lite and In-Circuit Emulator (ICE) manuals, call
1-603-883-2430. The manuals may be ordered by title or by product
number located on the back cover of each manual.
Processor Manuals
Hardware reference and instruction set reference manuals may be ordered
through the Literature Center at 1-800-ANALOGD (1-800-262-5643),
or downloaded from the Analog Devices Web site. Manuals may be
ordered by title or by product number located on the back cover of each
manual.
Data Sheets
All data sheets (preliminary and production) may be downloaded from the
Analog Devices Web site. Only production (final) data sheets (Rev. 0, A,
B, C, and so on) can be obtained from the Literature Center at
1-800-ANALOGD (1-800-262-5643); they also can be downloaded from
the Web site.
To have a data sheet faxed to you, call the Analog Devices Faxback System
at 1-800-446-6212. Follow the prompts and a list of data sheet code
numbers will be faxed to you. If the data sheet you want is not listed,
check for it on the Web site.
Notation Conventions
Text conventions used in this manual are identified and described as
follows.
L
xxADSP-21364 EZ-KIT Lite Evaluation System Manual
Additional conventions, which apply only to specific chapters, may
appear throughout this document.
ExampleDescription
Preface
Close command
(File menu)
{this | that}Alternative required items in syntax descriptions appear within curly
[this | that]Optional items in syntax descriptions appear within brackets and sepa-
[this,…]Optional item lists in syntax descriptions appear within brackets
.SECTIONCommands, directives, keywords, and feature names are in text with
filenameNon-keyword placeholders appear in text with italic style format.
L
a
Titles in reference sections indicate the location of an item within the
VisualDSP++ environment’s menu system (for example, the Close
command appears on the File menu).
brackets and separated by vertical bars; read the example as this or
that. One or the other is required.
rated by vertical bars; read the example as an optional this or that.
delimited by commas and terminated with an ellipse; read the example
as an optional comma-separated list of
letter gothic font.
Note: For correct operation, ...
A Note provides supplementary information on a related topic. In the
online version of this book, the word Note appears instead of this
symbol.
Caution: Incorrect device operation may result if ...
Caution: Device damage may result if ...
A Caution identifies conditions or inappropriate usage of the product
that could lead to undesirable results or product damage. In the online
version of this book, the word Caution appears instead of this symbol.
this.
Warn in g: Injury to device users may result if ...
A Warning identifies conditions or inappropriate usage of the product
[
that could lead to conditions that are potentially hazardous for the
devices users. In the online version of this book, the word Wa rn in g
appears instead of this symbol.
ADSP-21364 EZ-KIT Lite Evaluation System Manualxxi
Notation Conventions
xxiiADSP-21364 EZ-KIT Lite Evaluation System Manual
1USING ADSP-21364 EZ-KIT
LITE
This chapter provides specific information to assist you with development
of programs for the ADSP-21364 EZ-KIT Lite evaluation system.
The information appears in the following sections.
•“Package Contents” on page 1-2
Lists the items contained in your ADSP-21364 EZ-KIT Lite
package.
•“Default Configuration” on page 1-3
Shows the default configuration of the ADSP-21364 EZ-KIT Lite.
•“Installation and Session Startup” on page 1-5
Instructs how to start a new or open an existing ADSP-21364
EZ-KIT Lite session using VisualDSP++.
•“Evaluation License Restrictions” on page 1-7
Describes the restrictions of the VisualDSP++ license shipped with
the EZ-KIT Lite.
•“External Memory” on page 1-7
Describes how to access external memory, defines the memory map
of the EZ-KIT Lite.
•“Analog Audio” on page 1-8·
Describes how to set up and communicate with the on-board audio
codec.
•“LEDs and Push Buttons” on page 1-10
Describes the board’s general-purpose IO pins and buttons.
ADSP-21364 EZ-KIT Lite Evaluation System Manual1-1
Package Contents
•“Example Programs” on page 1-12
Provides information about example programs included in the
ADSP-21364 EZ-KIT Lite evaluation system.
•“Background Telemetry Channel” on page 1-12
Highlights the advantages of the background telemetry channel
feature of VisualDSP++.
For information on the graphical user interface, including the boot loading, target options, and other facilities of the EZ-KIT Lite system, refer to
the online Help.
For detailed information on how to program the ADSP-21364 SHARC
processor, refer to the documents referenced in “Related Documents”.
Package Contents
Your ADSP-21364 EZ-KIT Lite evaluation system package contains the
following items.
•ADSP-21364 EZ-KIT Lite board
•VisualDSP++ Installation Quick Reference Card
•CD containing:
D VisualDSP++ software
D ADSP-21364 EZ-KIT Lite debug software
D USB driver files
D Example programs
D ADSP-21364 EZ-KIT Lite Evaluation System Manual (this
document)
•Universal 7V DC power supply
1-2ADSP-21364 EZ-KIT Lite Evaluation System Manual
Using ADSP-21364 EZ-KIT Lite
•USB 2.0 cable
•Registration card (please fill out and return)
If any item is missing, contact the vendor where you purchased your
EZ-KIT Lite or contact Analog Devices, Inc.
Default Configuration
The EZ-KIT Lite evaluation system contains ESD
(electrostatic discharge) sensitive devices. Electrostatic
charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may occur on devices subjected to
high-energy discharges. Proper ESD precautions are
recommended to avoid performance degradation or
loss of functionality. Store unused EZ-KIT Lite boards
in the protective shipping package.
The ADSP-21364 EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your
computer case.
When removing the EZ-KIT Lite board from the package, handle the
board carefully to avoid the discharge of static electricity, which may damage some components.
To connect the EZ-KIT Lite board:
1. Remove the EZ-KIT Lite board from the package. Be careful when
handling the board to avoid the discharge of static electricity,
which may damage some components.
2. Figure 1-1 shows the default DIP switch, connector locations, and
LEDs used in installation. Confirm that your board is set up in the
default configuration before continuing.
ADSP-21364 EZ-KIT Lite Evaluation System Manual1-3
Default Configuration
Figure 1-1. EZ-KIT Lite Hardware Setup
3. Plug the provided power supply into J7 on the EZ-KIT Lite board.
Visually verify that the green power LED (
that the red reset LED (
LED9) goes on for a moment and then goes
LED10) is on. Also verify
off, and, finally, LED1 through LED8 are blinking sequentially.
4. Connect one end of the USB cable to an available full speed USB
port on your PC and the other end to
ZJ1 on the ADSP-21364
EZ-KIT Lite board.
1-4ADSP-21364 EZ-KIT Lite Evaluation System Manual
Using ADSP-21364 EZ-KIT Lite
Installation and Session Startup
L
For correct operation, install the software and hardware in the
order presented in the VisualDSP++ Installation Quick Reference Card.
1. Verify that the yellow USB monitor LED (ZLED3, located near the
USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++.
2. If you are running VisualDSP++ for the first time, navigate to the
VisualDSP++ environment via the Start –> Programs menu. The
main window appears. Note that VisualDSP++ does not connect to
any session. Skip the rest of this step to step 3.
If you have run VisualDSP++ previously, the last opened session
appears on the screen. You can override the default behavior and
force VisualDSP++ to start a new session by pressing and holding
down the Ctrl key while starting VisualDSP++. Do not release the
Ctrl key until the Session Wizard appears on the screen. Go to
step 4.
3. To connect to a new EZ-KIT Lite session, start Session Wizard by
selecting one of the following.
•From the Session menu, New Session.
•From the Session menu, Session List. Then click New Ses-sion from the Session List dialog box.
•From the Session menu, Connect to Target. Then click
New Session from the Session List dialog box.
4. The Select Processor page of the wizard appears on the screen.
Ensure SHARC is selected in Processor family. In Choose a target processor, select ADSP-21364. Click Next.
ADSP-21364 EZ-KIT Lite Evaluation System Manual1-5
Installation and Session Startup
5. The Select Connection Type page of the wizard appears on the
screen. Select ADSP-21364 and click Next.
6. The Select Platform page of the wizard appears on the screen.
In the Select your platform list, select ADSP-21364 EZ-KIT Lite via Debug Agent. In Session name, highlight or specify the session
name.
The session name can be a string of any length; although, the box
displays approximately 32 characters. The session name can
include space characters. If you do not specify a session name,
VisualDSP++ creates a session name by combining the name of the
selected platform with the selected processor. The only way to
change a session name later is to delete the session and to open a
new session.
Click Next.
7. The Finish page of the wizard appears on the screen. The page dis-
plays your selections. If you are satisfied, click Finish. If not, click Back to make changes.
L
1-6ADSP-21364 EZ-KIT Lite Evaluation System Manual
To disconnect from a session, click the disconnect button
or select Session –>Disconnect from Target.
To delete a session, select Session –> Session List. Select the ses-
sion name from the list and click Delete. Click OK.
Using ADSP-21364 EZ-KIT Lite
Evaluation License Restrictions
The ADSP-21364 EZ-KIT Lite installation is part of the VisualDSP++
installation. The EZ-KIT Lite is a licensed product that offers an unrestricted evaluation license for the first 90 days. Once the initial
unrestricted 90-day evaluation license expires:
1. VisualDSP++ allows a connection to the ADSP-21364 EZ-KIT
Lite via the USB Debug Agent interface only. Connections to simulators and emulation products are no longer allowed.
2. The linker restricts a users program to 10922 words of internal
memory for code space with no restrictions for data space.
Refer to the VisualDSP++ Installation Quick Reference Card for details.
External Memory
The EZ-KIT Lite contains three types of memory: parallel flash (1 MB),
SPI flash (2 MB) and SRAM (512 Kbit). The flash memories can store
user-specific boot code, allowing the board to run as a stand-alone unit.
For more information about setting the boot device for the processor, see
“Boot Mode and Clock Ratio Select Switch (SW10)” on page 2-12.
Table 1-1 provides a map of the board’s external memory.
Table 1-1. EZ-KIT Lite Evaluation Board External Memory
Start AddressEnd AddressContent
0x0100 00000x010F FFFFFlash memory
0x0120 00000x0127 FFFFSRAM memory
0x0140 00000x0140 FFFFLEDs (see “LEDs and Push Buttons” on page 2-13)
0x0160 00000x017F FFFFUnused chip select 1
0x0180 00000x019F FFFFUnused chip select 2
ADSP-21364 EZ-KIT Lite Evaluation System Manual1-7
Analog Audio
The parallel flash memory and the SRAM connect to the parallel port of
the processor. The parallel port is a multiplexed address and data port.
The port can connect to 8-bit and 16-bit memory devices. When configuring the parallel port, keep in mind that the memory devices on the
board are 8 bits wide.
To access the SRAM and flash memories, set up a parallel port DMA. For
more information on how to connect the SRAM and flash memories, see
“Parallel Port” on page 2-3.
The SPI flash memory connects to the SPI port of the processor and uses
FLAG0 as a chip select. In order for FLAG0 to behave as a chip select, clear
the PPFLG bit in the SYSCTL register.
An example program is included in the EZ-KIT Lite installation directory
to demonstrate how the parallel port and SPI port can be configured to
access the memories.
Analog Audio
The AD1835A is a high-performance, single-chip codec featuring four stereo digital-to-analog converters (DAC) for audio output and one stereo
analog-to-digital converters (ADC) for audio input. The codec can input
and output data with a sample rate of up to 96 kHz on all channels. A
192 kHz sample rate can be used with the one of the DAC channels.
The processor interfaces with the AD1835A codec via the DAI port. The
DAI interface pins can be configured to transfer serial data from the
AD1835A codec in either time-division multiplexed (TDM) or two-wire
interface (TWI) mode. For more information on how the AD1835A connects to the DAI, see “DAI Interface” on page 2-5.
The master input clock (MCLK) for the AD1835A can be generated by the
on-board 12.288 MHz oscillator or can be supplied by one of the DAI
pins of the processor. Using one of the pins to generate the
1-8ADSP-21364 EZ-KIT Lite Evaluation System Manual
MCLK, as
Using ADSP-21364 EZ-KIT Lite
opposed to the on-board oscillator, allows synchronization of multiple
devices in the system. This is done on the EZ-KIT Lite when data is coming from the S/PDIF receiver and being output through the audio codec.
The S/PDIF
MCLK is routed to the AD1835A MCLK in the processor’s signal
routing unit (SRU). It is also necessary to disable the on-board audio
oscillator from driving the audio codec and the processor’s input pin. For
instructions on how to configure the clock, refer to “Codec Setup Switch
(SW7)” on page 2-10.
The AD1835A codec can be configured as a master or as a slave, depending on the DIP switch settings. In master mode, the AD1835A drives the
serial port clock and frame sync signals to the processor. In slave mode,
the processor must generate and drive all of the serial port clock and frame
sync signals. For information on how to set the mode, refer to “Codec
Setup Switch (SW7)” on page 2-10.
The AD1835A audio codec’s internal configuration registers are configured using the SPI port of the processor. The FLAG3 register is used as the
select for the device. For information on how to configure the multichannel codec, refer to the codec datasheet, which can be found at
The RCA connector (J4) is used to input analog audio. When using an
electret microphone on this connector, configure the SW6 switch according
to the instructions in “Electret Microphone Select Switch (SW6)” on
page 2-9. The four output channels connect to the RCA connector J5.
Channel 4 of the codec connects to the headphone jack
J6. For more
information, see “Connectors” on page 2-16.
Example programs are included in the EZ-KIT Lite installation directory
to demonstrate how to configure and use the board’s analog audio
interface.
ADSP-21364 EZ-KIT Lite Evaluation System Manual1-9
LEDs and Push Buttons
LEDs and Push Buttons
The EZ-KIT Lite has eight general-purpose user LEDs and four general-purpose push buttons.
Two of the general-purpose push buttons are attached to the FLAG pins of
the processor, while the other two are attached to the DAI pins. All of the
push buttons connect to the processor through a DIP switch. The DIP
switch can disconnect processor pins attached to the push buttons. See
“Push Button Enable Switch (SW9)” on page 2-11 for instructions on
how to disable the push buttons from driving the corresponding processor
pins.
The value of the push buttons connected to the FLAG pins can be determined by reading the FLAG register. The push buttons connected to the
DAI pins must be configured as interrupts. It is necessary to set up an
interrupt routine to determine each pin’s state.
Table 1-2 shows how each push button connects to the processor. Refer to
the related example program shipped with the EZ-KIT Lite for more
information.
Table 1-2. Push Button Connections
Push Button Reference DesignatorProcessor Pin
SW1FLAG1
SW2FLAG2
SW3DAI_P19
SW4DAI_P20
1-10ADSP-21364 EZ-KIT Lite Evaluation System Manual
Using ADSP-21364 EZ-KIT Lite
The LEDs connect to the parallel port pins,
AD7–0, via a latch. The parallel
port of the processor can be set up as a memory bus or as general-purpose
FLAG pins. The latch allows the LEDs to be written to in both cases. Infor-
mation about setting up the latch can be found in “Push Button Enable
Switch (SW9)” on page 2-11.
When the LEDs are accessed as FLAG pins, the latch must be set up to pass
the data through to pins AD7–0 of the processor. In this mode, it is also
necessary to set up the parallel port to be FLAG pins. To set up the parallel
port as FLAG pins, set the PPFLGS bit in the SYSCTL register.
Table 1-3 summarizes the LED and FLAG connections.
Table 1-3. LED Connections
LED Reference Designator Processor PinMapped as FLAG
LED1AD0FLAG8
LED2AD1FLAG9
LED3AD2FLAG10
LED4AD3FLAG11
LED5AD4FLAG12
LED6AD5FLAG13
LED7AD6FLAG14
LED8AD7FLAG15
An example program is included in the EZ-KIT Lite installation
L
directory to demonstrate the functionality of the LEDs and push
buttons.
ADSP-21364 EZ-KIT Lite Evaluation System Manual1-11
Example Programs
Example Programs
Example programs are provided with the ADSP-21364 EZ-KIT Lite to
demonstrate various capabilities of the evaluation board. These programs
are installed with the EZ-KIT Lite software and can be found in the
…\213xx\Examples\ADSP-21364 EZ-KIT Lite subdirectory of the Visu-
alDSP++ installation directory. Please refer to the readme file provided
with each example for more information.
Background Telemetry Channel
The ADSP-21364 USB debug agent supports the background telemetry
channel (BTC), which facilitates data exchange between VisualDSP++ and
the processor without interrupting processor execution.
The BTC allows the user to view a variable as it is updated or changed, all
while the processor continues to execute. For increased performance of the
BTC, including faster reading and writing, please check out our latest line
of SHARC processor emulators at http://www.analog.com/proces-
sors/sharc/evaluationDevelopment/crosscore/index.html. For more
information about the background telemetry channel, see the VisualDSP++ User’s Guide or online Help.
1-12ADSP-21364 EZ-KIT Lite Evaluation System Manual
2ADSP-21364 EZ-KIT LITE
HARDWARE REFERENCE
This chapter describes the hardware design of the ADSP-21364 EZ-KIT
Lite board. The following topics are covered.
•“System Architecture” on page 2-2
Describes the configuration of the ADSP-21364 board and
explains how the board components interface with the processor.
•“Switch Settings” on page 2-9
Shows the location and describes the function of the board
switches.
•“LEDs and Push Buttons” on page 2-13
Shows the location and describes the function of the board LEDs
and push buttons.
•“Connectors” on page 2-16
Shows the location and gives the part number for all of the connectors on the board. Also, the manufacturer and part number
information is given for the mating parts.
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-1
System Architecture
System Architecture
This section describes the processor’s configuration on the EZ-KIT Lite
board shown in Figure 2-1.
Figure 2-1. System Architecture Block Diagram
This EZ-KIT Lite has been designed to demonstrate the capabilities of the
ADSP-21364 processor. The processor core is powered at 1.2V, and the
IO is powered at 3.3V. Two 0-ohm resistors give access to the processor’s
power planes and allow to measure the power consumption of the processor. The R79 resistor provides access to the IO voltage of the processor,
and the
processor.
2-2ADSP-21364 EZ-KIT Lite Evaluation System Manual
R80 resistor provides access to the core voltage plane of the
ADSP-21364 EZ-KIT Lite Hardware Reference
The
CLKIN pin of the processor connects to a 24.576 MHz oscillator. The
core frequency of the processor is derived by multiplying the frequency at
the CLKIN pin by a value determined by the state of the processor pins,
CLKCFG1 and CLKCFG0. The value at these pins is determined by the state of
the SW10 switch (see “Boot Mode and Clock Ratio Select Switch (SW10)”
on page 2-12). By default, the EZ-KIT Lite provides a core frequency of
147.456 MHz. It is possible to increase the speed of the processor by
changing the value of the PMCTL register.
The SW10 switch also configures the boot mode of the processor. The
EZ-KIT Lite is capable of parallel port boot and SPI master boot. By
default, the EZ-KIT Lite boots from the parallel port. For information
about configuring the boot modes, see “Boot Mode and Clock Ratio
Select Switch (SW10)” on page 2-12.
Parallel Port
The parallel port (PP) of the ADSP-21364 processor consists of a 16-bit
multiplex address/data memory bus (AD15–0) and an address latch-enable
pin (ALE). The interface does not have any memory select pins; these signals must be generated by decoding the address.
The PP connections to the EZ-KIT Lite are shown in Figure 2-2. The PP
connects to an 8-bit parallel flash memory, an 8-bit SRAM memory, and
eight general-purpose LEDs. The upper three address bits connect to a
3-to-8 decoder, providing eight memory select pins. See “External Mem-
ory” on page 1-7 for more information about accessing the flash and
SDRAM memories.
Because the PP is a multiplexed address/data memory bus, two 8-bit
latches are used to latch the upper address bits. Additional latch is used to
drive the LEDs. The latter allows the LED values to be written to as if
they were at a memory location. For more information about using the
LEDs, refer to the “LEDs and Push Buttons” on page 1-10.
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-3
System Architecture
AD15-0
DSP
ALE
Expansi on
Inte rface
SR AM _CS
Opening the switch
pu ts l atc h alw ays in
Transparent Mode
WR
D
373
8-bit Latch
(2)
LE
FLASH_CS
A23
C
A22
B
A21
A
Q
A8-19
138
3->8
DEC
0
1
2
3
4
5
6
7
FLASH_CS
SRAM_CS
LED_CS
A0-7
1MB
FLASH
D7-0
A8-18
A0-7
512KB
SRAM
D7-0
CS
8 LED s
D0- 7
CS
SR AM _CS
DQ
373
8-bit
Latch
LE
Figure 2-2. Parallel Port Connections Block Diagram
All of the PP signals are available externally via the expansion interface
connectors (
J1–3). The pinout of the connectors can be found in
“ADSP-21364 EZ-KIT Lite Schematic” on page B-1.
2-4ADSP-21364 EZ-KIT Lite Evaluation System Manual
ADSP-21364 EZ-KIT Lite Hardware Reference
DAI Interface
The pins of the digital application interface (DAI) connect to the signal
routing unit (SRU). The SRU is a flexible routing system, providing a
large system of signal flows within the processor. In general, the SRU
allows to route the DAI pins to different internal peripherals in various
combinations.
The DAI pins connect to the AD1835A audio codec, a 26-pin header, 2
RCA connectors, the audio oscillator output, and two push buttons.
Figure 2-3 illustrates the EZ-KIT Lite’s connections to the DAI.
Figure 2-3. DAI Connections Block Diagram
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-5
System Architecture
To use the DAI for a different purpose, disable any signal driving the DAI
pins, with a switch. See “Codec Setup Switch (SW7)” on page 2-10 for
how to. In addition, the codec setup switch can route the output signal of
the 12.288 MHz audio oscillator. By default, the signal is used as the master clock (
MCLK) for the AD1835A codec.
All of the DAI signals are available externally via the expansion interface
connectors (J1–3), as well as the 0.1” spaced header P3. The pinout of the
connectors can be found in “ADSP-21364 EZ-KIT Lite Schematic” on
page B-1.
SPI Interface
The serial peripheral interface (SPI) of the processor connects to an SPI
flash memory and the AD1835A audio codec. The FLAG0 pin is used as a
memory select for the SPI flash memory, and the FLAG3 pin—for the
AD1835A’s configuration registers.
The SPI chip select lines for the SPI flash memory and the AD1835A
audio codec connect to the processor via switch SW8 pins 1 and 3. The
default for SW8 is all positions ON. The switch disables the SPI devices on
the EZ-KIT Lite, enabling the same flag pins be driven on the expansion
interface
All of the SPI signals are available externally via the expansion interface
connectors (
J1–3), as well as the 0.1” spaced header P2. The pinout of the
connectors can be found in “ADSP-21364 EZ-KIT Lite Schematic” on
page B-1.
FLAG Pins
The processor has four general-purpose IO FLAG pins. Table 2-1 describes
each flag connections.
2-6ADSP-21364 EZ-KIT Lite Evaluation System Manual
ADSP-21364 EZ-KIT Lite Hardware Reference
Table 2-1. IO FLAG Pins
FLAG PinEZ-KIT Lite Function
FLAG0SPI flash chip select
FLAG1Push button (SW1) input
FLAG2Push button (SW2) input
FLAG3AD1835A’s SPI interface chip select
For information on how to disable the push buttons from driving the corresponding processor flag pin, see “Push Button Enable Switch (SW9)” on
page 2-11.
The
FLAG signals are available externally via the expansion interface con-
nectors (J1–3). The pinout of the connectors can be found in
“ADSP-21364 EZ-KIT Lite Schematic” on page B-1.
Expansion Interface
The expansion interface consists of three 90-pin connectors. Table 2-2
shows the interfaces each connector provides. For the exact pinout of the
connectors, refer to “ADSP-21364 EZ-KIT Lite Schematic” on page B-1.
The mechanical dimensions can be obtained from Technical or Customer
Support.
Table 2-2. Expansion Interface Connectors
ConnectorInterfaces
J15V, AD15–0
J23.3V, FLAG3–0, DAI_P20–1, SPI
J35V, 3.3V, reset, parallel port control signals
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-7
System Architecture
Limits to the current and to the interface speed must be taken into consideration when using the expansion interface. The maximum current limit is
dependent on the capabilities of the used regulator. Additional circuitry
can also add extra loading to signals, decreasing their maximum effective
speed.
[
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the internal and
external memory of the processor through a 6-pin interface. The JTAG
emulation port of the processor also connects to the USB debugging interface. When an emulator connects to the board at ZP4, the USB debugging
interface is disabled. This is not the standard connection of the JTAG
interface.
For information about the standard connection of the interface, see EE-68
published on the Analog Devices Web site. For more information about
the JTAG connector, see “JTAG Header (ZP4)” on page 2-20. To learn
more about available emulators, contact Analog Devices (see “Product
Information”).
2-8ADSP-21364 EZ-KIT Lite Evaluation System Manual
ADSP-21364 EZ-KIT Lite Hardware Reference
Switch Settings
Figure 2-4 shows the location and default settings of the EZ-KIT Lite
switches.
Figure 2-4. DIP Switch Locations and Default Settings
Electret Microphone Select Switch (SW6)
To connect an electret microphone to the audio input, place all positions
of the SW6 switch ON. The default position of this switch is all OFF. When
all of the positions are
gain of the input amplifiers is changed from 1x to 10x.
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-9
ON, a DC offset of 2.5V is added to the signal, and
Switch Settings
Codec Setup Switch (SW7)
The codec setup switch (SW7) can re-route signals going to the AD1835A
codec and can setup the communication protocol of the codec.
Positions 1 and 2 determine the clock routing for the audio oscillator to
the codec and to the processor. Figure 2-5 illustrates how the switch
positions 1 and 2 connect on the board. In the default position, route the
DAI_P17 pin to DAIP6 (in software) to clock the AD1835A.
ADSP-21364 Processor
DAI_P17
SW7.1
SW7.2
AD1835 Codec
MCLK DAI_P6
12.288MHz
OSC
Figure 2-5. Audio Clock Routing
Position 3 of the SW7 switch determines if the AD1835A device is a master
or is a slave. If the AD1835A is a master, the device’s serial interface generates the frame sync and clock signals necessary to transfer data. When
the device is a slave, the processor must generate the frame sync and clock
signals. By default, position 3 is ON, and the AD1835A generates the control signals.
Position 4 of
SW7 disconnects the AD1835A’s ADC_DATA pin from the DAI
interface. This is useful when the DAI interface connects to another
device.
2-10ADSP-21364 EZ-KIT Lite Evaluation System Manual
ADSP-21364 EZ-KIT Lite Hardware Reference
SPI Disable Switch (SW8)
The SPI interface switch (SW8) disables the SPI chip select lines connected
to the SPI flash memory and the AD1835A audio codec. The switch also
disables the ADC_LRCLK and ADC_BCLK signals on the AD1835A device. The
switch allows a customer to re-use the same pins on the SPI interface and
on the expansion interface. The SW8 default is all positions ON unless any of
the switch signals or the SPI interface signals are used on the expansion
connector or via an EZ-Extender®.
Push Button Enable Switch (SW9)
The push button enable switch (SW9) disconnects the push buttons from
the corresponding processor pins. This allows the signals to be used elsewhere on the board. Table 2-3 shows the SW9 connections. By default, all
of the switch positions are ON.
Position 6 of SW9 connects or disconnects the latch-enable pin of the LED
to the logical
OR of the ~WE and ~LED_CS signals. When position 6 is OFF,
the latch-enable pin of the LED latch (U24) is pulled high, making the
latch transparent. In this position, the value of the LEDs is directly connected to AD7–0.
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-11
Switch Settings
When position 6 is
ON, the values of the LEDs are set by writing to a mem-
ory location. The lower 8 bits of the data written to the address 0x1400
0000
set the values of the LEDs. By default, position 6 is ON. For more
information refer to “LEDs and Push Buttons” on page 1-10.
Boot Mode and Clock Ratio Select Switch (SW10)
The SW10 switch sets the boot mode and clock multiplier ratio. Table 2-4
shows how to set up the boot mode using
default, the EZ-KIT Lite boots in parallel port mode from the flash
memory.
Table 2-5 shows how to set up the clock multiply ratio using SW10
positions 3 and 4. By default, the processor increases the clock multiply
ratio by six, setting the core clock to 147.456 MHz.
Table 2-5. Core Clock Rate Configuration (SW10)
CLKCFG1 (Position 4)CLKCFG0 (Position 3)Core to CLKIN Ratio
OFF OFF6:1 (default)
OFFON32:1
ONOFF16:1
ON
ON
NA
2-12ADSP-21364 EZ-KIT Lite Evaluation System Manual
ADSP-21364 EZ-KIT Lite Hardware Reference
Loop-Back Test Switch (SW11)
The loop-back test switch (SW11) is located at the bottom of the board.
This switch is used for testing; all switch positions should remain OFF.
LEDs and Push Buttons
This section describes the functionality of the LEDs and push buttons.
Figure 2-6 shows the LED and push button locations.
Figure 2-6. LED and Push Button Locations
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-13
LEDs and Push Buttons
General Purpose LEDs (LED8–1)
Eight general-purpose LEDs connect to the processor through a latch on
signals AD7–0. The LEDs can be accessed by writing to the FLAG registers
or by writing to a memory address. Refer to “LEDs and Push Buttons” on
page 1-10 for more information.
Reset LED (LED9)
When LED9 is lit (red), the master reset of all the major ICs is active.
Power LED (LED10)
When LED10 is lit (green), it indicates that power is being supplied to the
board properly.
USB Monitor LED (ZLED3)
The USB monitor LED (ZLED3) indicates that USB communication has
been initialized successfully, and you can connect to the processor using a
VisualDSP++ EZ-KIT Lite session. Once the USB cable is plugged into
the board, it takes approximately 15 seconds for the USB monitor LED to
light. If the LED does not light, try cycling power on the board and/or
reinstalling the USB driver (see the VisualDSP++ Installation Quick Refer-ence Card).
L
2-14ADSP-21364 EZ-KIT Lite Evaluation System Manual
When VisualDSP++ is actively communicating with the EZ-KIT
Lite target board, the LED can flicker, indicating communications
handshake.
ADSP-21364 EZ-KIT Lite Hardware Reference
Push Buttons (SW1–4)
Four push buttons (SW1–4) are provided for general-purpose user input.
Two push buttons connect to the FLAG pins of the processor. The other
two connect to the DAI of the processor. The push buttons are active high
and, when pressed, send a high (1) to the processor. Refer to “LEDs and
Push Buttons” on page 1-10 for more information. The push button
enable switch (SW9) is capable of disconnecting the push buttons from the
corresponding processor pins (refer to “Push Button Enable Switch
(SW9)” on page 2-11 for more information).
The processor signals and corresponding push buttons are summarized in
Table 2-6.
Table 2-6. Push Button Connections
Processor
Signal
FLAG1SW1DAI_P19SW3
FLAG2SW2DAI_P20SW4
Push Button Reference
Designator
Processor
Signal
Push Button Reference
Designator
Board Reset Push Button (SW5)
The RESET push button (SW5) resets all of the ICs on the board.
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-15
Connectors
Connectors
This section describes the connector functionality and provides information about mating connectors. Figure 2-7 shows the connector locations.
Figure 2-7. Connector Locations
Expansion Interface (J1–J3)
Three board-to-board connectors (J1–3) provide signals for most of the
processor’s peripheral interfaces. The connectors are located at the bottom
of the board. For more information about the interface, see “Expansion
Interface” on page 2-7. For the J1–3 availability and pricing, contact
Samtec.
2-16ADSP-21364 EZ-KIT Lite Evaluation System Manual
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-17
Connectors
Power Jack (J7)
The power connector (J7) provides all of the power necessary to operate
the EZ-KIT Lite board.
Part DescriptionManufacturerPart Number
2.5 mm power jackSWITCHCRAFT
DIGI-KEY
Mating Power Supply (shipped with EZ-KIT Lite)
7V power supplyCUI STACKDMS070214-P6P-SZ
RAPC712X
RAPC712X-ND
The power connector supplies DC power to the EZ-KIT Lite board.
Table 2-7 shows the power supply specifications.
Table 2-7. Power Supply Specifications
TerminalConnection
Center pin+7 VDC@2.14A
Outer ringGND
S/PDIF Coax Connectors (J8 and J9)
Part DescriptionManufacturerPart Number
CoaxialSWITCHCRAFTPJRAN1X1U01X
Mating Cable
Two-channel RCA interconnect
cable
MONSTER CABLEBI100-1M
2-18ADSP-21364 EZ-KIT Lite Evaluation System Manual
ADSP-21364 EZ-KIT Lite Hardware Reference
SPI Header (P2)
The SPI connector (P2) provides access to all of the SPI signals in the from
of a .1” spacing header. In addition, the FLAG1 signal can be used as a chip
select. If you are using FLAG1 as a chip select, disable the push button associated with the flag. For more information, see “Push Button Enable
Switch (SW9)” on page 2-11.
Part DescriptionManufacturerPart Number
6-pin IDC headerSULLINSGEC03DAAN
DAI Header (P3)
The DAI connector (P3) provides access to all of the DAI signals in the
from of a .1” spacing header. When using the header to access the DAI
pins of the processor, ensure that signals, which normally drive the DAI
pins, are disabled. Refer to “Codec Setup Switch (SW7)” on page 2-10 for
more information on how to disable signals already being driven from
elsewhere on the EZ-KIT Lite.
Part DescriptionManufacturerPart Number
26-PIN IDC HEADERBERG54102-T08-13LF
USB Connector (ZJ1)
The USB connector (ZJ1) allows to configure and program the processor.
Part DescriptionManufacturerPart Number
Type B USB receptacleMILL-MAX
DIGI-KEY
ADSP-21364 EZ-KIT Lite Evaluation System Manual2-19
897-30-004-90-000
ED90064-ND
Connectors
JTAG Header (ZP4)
The JTAG header (ZP4) is the connecting point for a JTAG in-circuit
emulator pod. When an emulator connects to the JTAG header, the USB
debug interface is disabled.
L
L
Part DescriptionManufacturerPart Number
14-pin IDC header (ZP4)FCI68737-414HLF
Pin 3 is missing to provide keying. Pin 3 in the mating connector
should have a plug.
When using an emulator with the EZ-KIT Lite board, follow the
connection instructions provided with the emulator.
2-20ADSP-21364 EZ-KIT Lite Evaluation System Manual
AADSP-21364 EZ-KIT LITE BILL
OF MATERIALS
The bill of materials corresponds to “ADSP-21364 EZ-KIT Lite Sche-
matic” on page B-1. Please check the latest schematic on the Analog
port
DAI_P17 pins, 2-10
DAI_P19-20 (SW3-4) pins, 1-10, 2-11, 2-15
DAIP6 pins, 2-10
default configuration, of this EZ-KIT Lite, 1-3
digital audio interface, See DAI
digital-to-analog converters (DACs), See
R79-80 resistors, 2-2
RCA connectors, xi, 1-9, 2-5
registration, of this product, 1-3
reset
processor (LED9), 2-14
push button (SW5), 2-15
restrictions, of the licence, 1-7
S
sample rates, 1-8
schematic, of this EZ-KIT Lite, B-1
serial peripheral interface, See SPI
setup, of this EZ-KIT Lite, 1-3
signal routing units (SRUs), 1-9, 2-5
S/PDIF