Datasheet ADR380, ADR381 Datasheet (ANALOG DEVICES)

Precision Low Drift 2.048 V/2.500 V

V

FEATURES

Initial accuracy: ±5 mV/±6 mV maximum
Initial accuracy error: ±0.24%/±0.24%
Low TCV
Load regulation: 70 ppm/mA
Line regulation: 25 ppm/V
Wide operating ranges

2.4 V to 18 V for ADR380

2.8 V to 18 V for ADR381
Low power: 120 μA maximum
High output current: 5 mA
Wide temperature range: −40°C to +85°C
Tiny 3-lead SOT-23 package with standard pinout

APPLICATIONS

Battery-powered instrumentation
Portable medical instruments
Data acquisition systems
Industrial process control systems
Hard disk drives
Automotive

: 25 ppm/°C maximum

OUT

SOT-23 Voltage Reference

ADR380/ADR381

PIN CONFIGURATION

V

1

IN

ADR380/

ADR381

TOP VIEW

(Not to S cale)

2

OUT

Figure 1. 3-Lead SOT-23

(RT Suffix)

GND

3

02175-001

GENERAL DESCRIPTION

The ADR380 and ADR381 are precision 2.048 V and 2.500 V
band gap voltage references featuring high accuracy, high
stability, and low power consumption in a tiny footprint.
Patented temperature drift curvature correction techniques
minimize nonlinearity of the voltage change with temperature.
The wide operating range and low power consumption make
them ideal for 3 V to 5 V battery-powered applications.

The ADR380 and ADR381 are micropower, low dropout
voltage (LDV) devices that provide a stable output voltage from
supplies as low as 300 mV above the output voltage. They are
specified over the industrial (−40°C to +85°C) temperature
range. The ADR380/ADR381 are available in the tiny 3-lead
SOT-23 package.

Table 1. ADR38x Products

Part Number Nominal Output Voltage (V)

ADR380 2.048
ADR381 2.500

Rev. C

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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: [phone] www.analog.com
Fax: [phone] ©2001–2010 Analog Devices, Inc. All rights reserved.

ADR380/ADR381

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Pin Configuration ............................................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

ADR380 Electrical Characteristics ............................................. 3

ADR381 Electrical Characteristics ............................................. 4

Absolute Maximum Ratings ............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution .................................................................................. 5

Typical Performance Characteristics ............................................. 6

Terminology .................................................................................... 10

REVISION HISTORY

10/10—Rev. B to Rev. C

Deleted Figure 32 ............................................................................ 14

Changes to Ordering Guide .......................................................... 14

1/09—Rev. A to Rev. B

Updated Format .................................................................. Universal

Changes to Table 7 ............................................................................ 5

Changes to Stacking Reference ICs for Arbitrary Outputs

Section, Figure 28, and Figure 29 ................................................. 12

Updated Outline Dimensions ....................................................... 14

Changes to Ordering Guide .......................................................... 14

Theory of Operation ...................................................................... 11

Device Power Dissipation Considerations .............................. 11

Input Capacitor ........................................................................... 11

Output Capacitor ........................................................................ 11

Applications Information .............................................................. 12

Stacking Reference ICs for Arbitrary Outputs ....................... 12

A Negative Precision Reference Without Precision Resistors

....................................................................................................... 12

Precision Current Source .......................................................... 12

Precision High Current Voltage Source .................................. 13

Outline Dimensions ....................................................................... 14

Ordering Guide .......................................................................... 14

7/04—Rev. 0 to Rev. A

Updated Format .................................................................. Universal

Changes to Ordering Guide .......................................................... 16

Updated Outline Dimensions ....................................................... 16

Rev. C | Page 2 of 16

ADR380/ADR381

SPECIFICATIONS

ADR380 ELECTRICAL CHARACTERISTICS

VIN = 5.0 V, TA = 25°C, unless otherwise noted.

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

Output Voltage V
Initial Accuracy Error V

−0.24 +0.24 %
Temperature Coefficient TCV
0°C < TA< 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN – V
Line Regulation ΔV
Load Regulation ΔV

Quiescent Current IIN No load 100 120 μA

−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔV
Output Voltage Hysteresis V
Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA

V

= 15.0 V, TA = 25°C, unless otherwise noted.

IN

2.043 2.048 2.053 V

OUT

−5 +5 mV

OERR

−40°C < TA < +85°C 5 25 ppm/°C

OUT

I

OUT

/DVIN VIN = 2.5 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V

OUT

/DI

OUT

LOAD

1000 Hrs 50 ppm

OUT

40 ppm

OUT_HYS

≤ 3 mA 300 mV

LOAD

V

−40°C < T

= 3 V, I

IN

= 0 mA to 5 mA,

LOAD

< +85°C

A

70 ppm/mA

Table 3.

Parameter Symbol Conditions Min Typ Max Unit

Output Voltage
Initial Accuracy Error V

V

OUT

−5 +5 mV

OERR

2.043 2.048 2.053 V

−0.24 +0.24 %
Temperature Coefficient TCV

−40°C < TA < +85°C 5 25 ppm/°C

OUT

0°C < TA < 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN − V
Line Regulation ΔV
Load Regulation ΔV

I

OUT

/DVIN VIN = 2.5 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V

OUT

/DI

OUT

LOAD

≤ 3 mA 300 mV

LOAD

V

−40°C < T

= 3 V, I

IN

= 0 mA to 5 mA,

LOAD

< +85°C

A

70 ppm/mA

Quiescent Current IIN No load 100 120 μA

−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔV
Output Voltage Hysteresis V

1000 Hrs 50 ppm

OUT

40 ppm

OUT_HYS

Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA

Rev. C | Page 3 of 16

ADR380/ADR381

ADR381 ELECTRICAL CHARACTERISTICS

VIN = 5.0 V, TA = 25°C, unless otherwise noted.

Table 4.

Parameter Symbol Conditions Min Typ Max Unit

Output Voltage
Initial Accuracy Error V

V

OUT

−6 +6 mV

OERR

−0.24 +0.24 %
Temperature Coefficient TCV

−40°C < TA < +85°C 5 25 ppm/°C

OUT

0°C < TA < 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN − V
Line Regulation ΔV
Load Regulation ΔV

I

OUT

/DVIN VIN = 2.8 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V

OUT

/DI

OUT

LOAD

≤ 2 mA 300 mV

LOAD

= 3.5 V, I

V

IN

−40°C < T

= 0 mA to 5 mA,

LOAD

< +85°C

A

Quiescent Current IIN No load 100 120 μA

−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔV
Output Voltage Hysteresis V

1000 Hrs 50 ppm

OUT

75 ppm

OUT_HYS

Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA

2.494 2.500 2.506 V

70 ppm/mA

V

= 5.0 V, TA = 25°C, unless otherwise noted.

IN

Table 5.

Parameter Symbol Conditions Min Typ Max Unit

Output Voltage
Initial Accuracy Error V

V

OUT

−6 +6 mV

OERR

2.494 2.500 2.506 V

−0.24 +0.24 %
Temperature Coefficient TCV

−40°C < TA < +85°C 5 25 ppm/°C

OUT

0°C < TA < 70°C 3 21 ppm/°C
Minimum Supply Voltage Headroom VIN − V
Line Regulation ΔV
Load Regulation ΔV

I

OUT

/DVIN VIN = 2.8 V to 15 V, −40°C < TA < +85°C 10 25 ppm/V

OUT

/DI

OUT

LOAD

≤ 2 mA 300 mV

LOAD

V

−40°C < T

= 3.5 V, I

IN

= 0 mA to 5 mA,

LOAD

< +85°C

A

70 ppm/mA

Quiescent Current IIN No load 100 120 μA

−40°C < TA < +85°C 140 μA
Voltage Noise eN 0.1 Hz to 10 Hz 5 μV p-p
Turn-On Settling Time tR 20 μs
Long-Term Stability ΔV
Output Voltage Hysteresis V

1000 Hrs 50 ppm

OUT

75 ppm

OUT_HYS

Ripple Rejection Ratio RRR fIN = 60 Hz 85 dB
Short Circuit to GND ISC 25 mA

Rev. C | Page 4 of 16

ADR380/ADR381

ABSOLUTE MAXIMUM RATINGS

Table 6.

Parameter1 Rating

Supply Voltage 18 V
Output Short-Circuit Duration to GND

VIN > 15 V 10 sec

VIN ≤ 15 V Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +85°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 60 Sec) 300°C

1

Absolute maximum ratings apply at 25°C, unless otherwise noted.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 7.

Package Type θJA Unit

3-Lead SOT-23 (RT) 333 °C/W

ESD CAUTION

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Rev. C | Page 5 of 16

ADR380/ADR381

TYPICAL PERFORMANCE CHARACTERISTICS

2.054

2.052

60

50

TEMPERATURE + 25°C
–40°C +85°C +25°C

2.050

(V)

2.048

OUT

V

2.046

2.044

2.042

TEMPERATURE (°C)

SAMPLE 1

SAMPLE 3

Figure 2. ADR380 Output Voltage vs. Temperature

2.506

2.504

2.502

(V)

2.500

OUT

V

2.498

2.496

SAMPLE 1

SAMPLE 2

SAMPLE 3

SAMPLE 2

3510–15–40 8560

40

30

FREQUENCY

20

10

0

–11–13–15 –9–7–5–3–113579111315

02175-002

PPM (°C)

TOTAL NUMBER
OF DEVICES IN
SAMPLE = 450

02175-005

Figure 5. ADR381 Output Voltage Temperature Coefficient

140

120

100

80

60

40

SUPPLY CURRENT ( µ A)

20

+85°C

+25°C

–40°C

2.494
–40 –15 10 35 60 85

TEMPERATURE (°C)

Figure 3. ADR381 Output Voltage vs. Temperature

30

TEMPERATURE +25°C –40°C +85°C +25°C

25

20

15

FREQUENCY

10

5

0
–11 –9 –7 –5 –3 –1 1 3 5 7 9 11 13 15 17 19

PPM (°C)

TOTAL NUMBER
OF DEVICES = 130

Figure 4. ADR380 Output Voltage Temperature Coefficient

0

2.5 5.0 7.5 10.0 12.5 15.0

02175-003

INPUT VOLTAGE (V )

02175-006

Figure 6. ADR380 Supply Current vs. Input Voltage

140

120

100

80

60

40

SUPPLY CURRENT ( µ A)

20

0

02175-004

+85°C

2.5 5.0 7.5 10.0 12.5 15.0

+25°C

–40°C

INPUT VOLTAGE (V )

02175-007

Figure 7. ADR381 Supply Current vs. Input Voltage

Rev. C | Page 6 of 16

ADR380/ADR381

70

I

= 0mA TO 5mA

LOAD

60

50

40

VIN = 3V

5

VIN = 2.8V TO 15V

4

3

30

20

LOAD REGUL ATION (ppm/mA)

10

0

–40 –15 10 35 60 85

VIN = 5V

TEMPERATURE (°C)

Figure 8. ADR380 Load Regulation vs. Temperature

70

I

= 5mA

LOAD

60

50

40

30

20

LOAD REGUL ATION (ppm/mA)

10

0

–40 –15 10 35 60 85

VIN = 3.5V

VIN = 5V

TEMPERATURE (°C)

Figure 9. ADR381 Load Regulation vs. Temperature

5

VIN = 2.5V TO 15V

4

2

LINE REGUL ATION (p p m /V)

1

0

02175-008

–40 –15 10 35 60 85

TEMPERATURE ( °C)

02175-011

Figure 11. ADR381 Line Regulation vs. Temperature

0.8

0.6

+85°C

0.4

0.2

DIFFERENTIAL VOLTAGE (V)

0

02175-009

012345

–40°C

LOAD CURRENT (mA)

+25°C

2175-012

Figure 12. ADR380 Minimum Input/Output Differential Voltage vs.

Load Current

0.8

0.6

+85°C

3

2

LINE REGUL ATION (p p m /V)

1

0
–40 –15 10 35 60 85

TEMPERATURE ( °C)

Figure 10. ADR380 Line Regulation vs. Temperature

02175-010

Rev. C | Page 7 of 16

0.4

+25°C

0.2

DIFFERENTIAL VOL TAGE (V)

–40°C

0

012345

LOAD CURRENT (mA)

Figure 13. ADR381 Minimum Input/Output Differential Voltage vs.

Load Current

2175-013

ADR380/ADR381

V

60

TEMPERATURE +25°C –40°C +85°C +25°C

50

40

30

FREQUENCY

20

10

0
–260 –200 –140 –80 –20 40 100 160 220 280 340 400

HYSTERESIS (ppm)

Figure 14. ADR381 V

Hysteresis

OUT

2µV/DI

1

2

LINE INT E RRUPTION

1

0.5V/DIV

02175-014

TIME (10µs/DIV)

Figure 17. ADR381 Line Transient Response

2

0.5V/DIV

1

LINE INTE RRUP TION

C

BYPASS

V

OUT

C

BYPASS

V

OUT

V

IN

= 0µF

1V/DIV

0.5V/DIV

02175-017

= 0.1µF

1V/DIV

0.5V/DIV

TIME (1s/DIV)

Figure 15. ADR381 Typical Noise Voltage, 0.1 Hz to 10 Hz

100µV/DIV

1

TIME (10ms/DIV)

Figure 16. ADR381 Typical Noise Voltage, 10 Hz to 10 kHz

02175-015

TIME (10µs/DIV)

02175-018

Figure 18. ADR381 Line Transient Response

CL = 0µF

V

2

OUT

1V/DIV

LOAD OFF

V

ON

1

02175-016

TIME (200µs/DIV)

I

LOAD

LOAD

= 1mA

2V/DIV

02175-019

Figure 19. ADR381 Load Transient Response with CL = 0 μF

Rev. C | Page 8 of 16

ADR380/ADR381

C

= 0.1µF

CL = 1nF

V

2

OUT

1V/DIV

BYPASS

CL = 40pF

LOAD OFF

V

ON

1

TIME (2 00µs/DIV)

I

LOAD

LOAD

= 1mA

Figure 20. ADR381 Load Transient Response with CL = 1 nF

CL = 100nF

V

2

LOAD OFF

1

TIME (200µs/DIV)

OUT

I

LOAD

V

LOAD

ON

= 1mA

Figure 21. ADR381 Load Transient Response with CL = 100 nF

2V/DIV

1V/DIV

2V/DIV

(10Ω/DIV)

OUT

Z

10 100 1k 10k 100k 1M

02175-020

FREQUENCY (Hz)

CL = 0.1µF

CL = 1µF

02175-023

Figure 23. ADR381 Output Impedance vs. Frequency

150

100

50

0

DRIFT (ppm)

–50

–100

–150

0 100 200 300 400 500 600 700 800 900 1000

02175-021

CONDITIONS: VIN = 6V IN A CONTROLLED
ENVIRONMENT 50°C ± 1°C

HOURS

02175-024

Figure 24. ADR380 Long-Term Drift

150

2

1

TIME (200µ s /DIV)

V

Figure 22. ADR381 Turn-On/Turn-Off Response at 5 V

RL = 500Ω

OUT

V

IN

2V/DIV

5V/DIV

02175-022

100

50

0

DRIFT (ppm)

–50

–100

–150

0 100 200 300 400 500 600 700 800 900 1000

CONDITIONS: VIN = 6V IN A CONTROLLED
ENVIRONMENT 50°C ± 1°C

HOURS

Figure 25. ADR381 Long-Term Drift

02175-025

Rev. C | Page 9 of 16

ADR380/ADR381

TERMINOLOGY

Temperature Coefficient

The change of output voltage over the operating temperature
change and normalized by the output voltage at 25°C, expressed
in ppm/°C. The equation follows:

TVTV

TCV

OUT

−

2

OUT

]Cppm/[ ×

=°

OUT

OUT

)()(

1

6

10

TTC)(25V

)(

−×°

12

where:

V

(25°C) = V

OUT

(T1) = V

V

OUT

V

(T2) = V

OUT

at 25°C.

OUT

at Temperature 1.

OUT

at Temperature 2.

OUT

Line Regulation

The change in output voltage due to a specified change in input
voltage. It includes the effects of self-heating. Line regulation is
expressed in either percent per volt, parts-per-million per volt,
or microvolts per volt change in input voltage.

Load Regulation

The change in output voltage due to a specified change in load
current. It includes the effects of self-heating. Load regulation is
expressed in either microvolts per milliampere, parts-per-million
per milliampere, or ohms of dc output resistance.

Long-Term Stability

A typical shift in output voltage over 1000 hours at a controlled
temperature. Figure 24 and Figure 25 show a sample of parts
measured at different intervals in a controlled environment of
50°C for 1000 hours.

−=Δ

0

OUTOUT

OUT

]ppm[

V

O

UT

=Δ

)()(

tVtVV

1

O

UT

OUT

0

)()(

tVtV

)(

1

6

×

10

−

0

tV

O

UT

where:

V
V

OUT

OUT

(t0) = V
(t1) = V

at Time 0.

OUT

after 1000 hours of operation at a controlled

OUT

temperature.

Note that 50°C was chosen because most applications run at a
higher temperature than 25°C.

Thermal Hysteresis

The change of output voltage after the device is cycled through
temperature from +25°C to −40°C to +85°C and back to +25°C.
This is a typical value from a sample of parts put through such
a cycle.

−°=

O

HYSOUT

UT

]ppm[ ×

V

_

HYSOUT

=

VC)(25VV

OUT

__

TCOUT

)C25(

−°

VV

TCOUTOUT

°

C)(25V

10

6_

where:

V

OUT

V

OUT_TC

(25°C) = V

= V

at 25°C.

OUT

at 25°C after a temperature cycle from +25°C to

OUT

−40°C to +85°C and back to +25°C.

Rev. C | Page 10 of 16

ADR380/ADR381

V

THEORY OF OPERATION

Band gap references are the high performance solution for low
supply voltage and low power voltage reference applications, and
the ADR380/ADR381 are no exception. However, the uniqueness
of this product lies in its architecture. As shown in Figure 26,
the ideal zero TC band gap voltage is referenced to the output,
not to ground. The band gap cell consists of the PNP pair Q51
and Q52, running at unequal current densities. The difference
in V

results in a voltage with a positive TC that is amplified

BE

by the ratio of 2 × R58/R54. This PTAT voltage, combined with

of Q51 and Q52, produce the stable band gap voltage.

the V

BE

Reduction in the band gap curvature is performed by the ratio
of the two resistors, R44 and R59. Precision laser trimming and
other patented circuit techniques are used to further enhance
the drift performance.

R49

R48

IN

V

OUT

GND

02175-026

Q1

R59

R54

Q51

–

+

R60

Figure 26. Simplified Schematic

R53

R44

R58

Q52

R61

DEVICE POWER DISSIPATION CONSIDERATIONS

The ADR380/ADR381 are capable of delivering load currents to
5 mA with an input voltage that ranges from 2.8 V (ADR381 only)
to 15 V. When this device is used in applications with large input
voltages, take care to avoid exceeding the specified maximum
power dissipation or junction temperature that may result in
premature device failure. Use the following formula to calculate
a device’s maximum junction temperature or dissipation:

TT

−

J

A

P

=

D

θ

JA

where:

P

is the device power dissipation,

D

T

and TA are junction and ambient temperatures, respectively.

J

θ

is the device package thermal resistance.

JA

INPUT CAPACITOR

An input capacitor is not required on the ADR380/ADR381.
There is no limit for the value of the capacitor used on the input,
but a capacitor on the input improves transient response in
applications where the load current suddenly increases.

OUTPUT CAPACITOR

The ADR380/ADR381 do not need an output capacitor for
stability under any load condition. Using an output capacitor,
typically 0.1 μF, removes any very low level noise voltage and does
not affect the operation of the part. The only parameter that
degrades by applying an output capacitor is turn-on time. (This
varies depending on the size of the capacitor.) Load transient
response is also improved with an output capacitor, which acts
as a source of stored energy for a sudden increase in load current.

Rev. C | Page 11 of 16

ADR380/ADR381

V

V

APPLICATIONS INFORMATION

STACKING REFERENCE ICs FOR ARBITRARY OUTPUTS

Some applications may require two reference voltage sources,
which are a combined sum of standard outputs. The following
circuit shows how this stacked output reference can be
implemented:

U2

GND

3

U1

GND
3

2

V

OUT

C2
1µF

2

V

OUT

C4
1µF

R1

3.9kΩ

V

V

OUT2

OUT1

2175-027

1

V

IN

0.1µF

C3

0.1µF

C1

IN

ADR380/

ADR381

1

V

IN

ADR380/

ADR381

Figure 27. Stacking Voltage References with the ADR380/ADR381

Two ADR380s or ADR381s are used; the outputs of the individ­ual references are simply cascaded to reduce the supply current.
Such configuration provides two output voltages: V
V

. V

OUT2

is the terminal voltage of U1, while V

OUT1

OUT1

OUT2

and

is the
sum of this voltage and the terminal voltage of U2. U1 and U2
can be chosen for the two different voltages that supply the
required outputs.

While this concept is simple, a precaution is in order. Because
the lower reference circuit must sink a small bias current from
U2, plus the base current from the series PNP output transistor
in U2, the external load of either U1 or R1 must provide a path
for this current. If the U1 minimum load is not well-defined,
Resistor R1 should be used, set to a value that conservatively
passes 600 μA of current with the applicable V

across it. Note

OUT1

that the two U1 and U2 reference circuits are locally treated as
macrocells, each having its own bypasses at input and output for
optimum stability. Both U1 and U2 in this circuit can source dc
currents up to their full rating. The minimum input voltage, V
determined by the sum of the outputs, V

, plus the 300 mV

OUT2

, is

IN

dropout voltage of U2.

A NEGATIVE PRECISION REFERENCE WITHOUT PRECISION RESISTORS

In many current-output CMOS DAC applications where the
output signal voltage must be of the same polarity as the
reference voltage, it is often required to reconfigure a current­switching DAC into a voltage-switching DAC through the use
of a 1.25 V reference, an op amp, and a pair of resistors. Using
a current switching DAC directly requires an additional opera­tional amplifier at the output to reinvert the signal. A negative
voltage reference is then desirable from the point that an additional
operational amplifier is not required for either reinversion

(current-switching mode) or amplification (voltage-switching
mode) of the DAC output voltage. In general, any positive voltage
reference can be converted into a negative voltage reference
through the use of an operational amplifier and a pair of matched
resistors in an inverting configuration. The disadvantage to this
approach is that the largest single source of error in the circuit is
the relative matching of the resistors used.

The circuit in Figure 28 avoids the need for tightly matched
resistors with the use of an active integrator circuit. In this
circuit, the output of the voltage reference provides the input
drive for the integrator. The integrator, to maintain circuit
equilibrium, adjusts its output to establish the proper relation­ship between the reference V

and GND. Thus, any negative

OUT

output voltage desired can be chosen by substituting for the
appropriate reference IC. A precaution should be noted with
this approach: although rail-to-rail output amplifiers work best
in the application, these operational amplifiers require a finite
amount (mV) of headroom when required to provide any load
current. The choice for the circuit’s negative supply should take
this issue into account.

C4

R4

1µF

1kΩ

+5V

R5

R3

C3
1µF

U2

100Ω

+V

A1

–V

OP195

–5V

–V

REF

U1

GND
3

2

V

OUT

100kΩ

1

0.1µF

C2

V

IN

ADR380/

ADR381

V

IN

C1

1µF

Figure 28. Negative Precision Voltage Reference Using No Precision Resistors

PRECISION CURRENT SOURCE

Many times in low power applications, the need arises for a
precision current source that can operate on low supply voltages.
As shown in Figure 29, the ADR380/ADR381 can be configured
as a precision current source. The circuit configuration illustrated
is a floating current source with a grounded load. The reference
output voltage is bootstrapped across R
the output current into the load. With this configuration, circuit
precision is maintained for load currents in the range from the
reference supply current, typically 90 μA to approximately 5 mA.

1

V

V

IN

IN

C1

1µFC20.1µF

OUT

U1

ADR380/

ADR381

GND

3

Figure 29. Precision Current Source

(R1 + P1), which sets

SET

2

C3
1µF

ADJUST

R1
P1

I

SY

I

OUT

R

L

02175-029

2175-028

Rev. C | Page 12 of 16

ADR380/ADR381

V

PRECISION HIGH CURRENT VOLTAGE SOURCE

In some cases, the user may want higher output current delivered
to a load and still achieve better than 0.5% accuracy from the
ADR380/ADR381. The accuracy for a reference is normally
specified on the data sheet with no load. However, the output
voltage changes with load current.

The circuit in Figure 30 provides high current without compromis­ing the accuracy of the ADR380/ADR381. By op amp action,
V

follows V

OUT

equilibrium, the op amp also drives the N-Channel MOSFET
Q1 into saturation to maintain the current needed at different
loads. R2 is optional to prevent oscillation at Q1. In such an
approach, hundreds of milliamps of load current can be achieved,
and the current is limited by the thermal limitation of Q1. V
V

+ 300 mV.

OUT

with very low drop in R1. To maintain circuit

REF

=

IN

IN

8V TO 15V

+V

A1

21

V

V

OUT

IN

U1

ADR380/

ADR381

GND

3

–V

AD820

C1

0.001µF

R2

100Ω

R1

100kΩ

2N7002

Q1

R

L

Figure 30. ADR380/ADR381 for Precision High Current Voltage Source

V

OUT

02175-030

Rev. C | Page 13 of 16

ADR380/ADR381

OUTLINE DIMENSIONS

3.04

2.90

2.80

1.40

1.30

1.20

3

1

2.64

2.10

2

1.02

0.95

0.88

0.100

0.013

SEATING

PLANE

0.60

0.45

2.05

1.78

COMPLIANT TO JEDEC STANDARDS TO- 236-AB

1.03

0.89

0.51

0.37

1.12

0.89

GAUGE

PLANE

0.180

0.085

0.25

0.54
REF

0.60 MAX

0.30 MIN

011909-C

Figure 31. 3-Lead Small Outline Transistor Package [SOT-23-3]

(RT-3)

Dimensions shown in millimeters

ORDERING GUIDE

Package

Model1 Temperature Range Package Description

Option Branding2

ADR380ARTZ-REEL7 −40°C to +85°C 3-Lead SOT-23 RT-3 R2D 2.048 3,000
ADR381ARTZ-R2 −40°C to +85°C 3-Lead SOT-23 RT-3 R3A 2.500 250
ADR381ARTZ-REEL7 −40°C to +85°C 3-Lead SOT-23 RT-3 R3A# 2.500 3,000

1

Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.

2

Prior to Date Code 0542, the ADR380ARTZ-REEL7 parts were branded with R2A without the #.

Output
Voltage

Ordering
Quantity

Rev. C | Page 14 of 16

ADR380/ADR381

NOTES

Rev. C | Page 15 of 16

ADR380/ADR381

NOTES

©2001–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02175-0-10/10(C)

Rev. C | Page 16 of 16