ANALOG DEVICES ADP8861 Service Manual

Charge Pump, 7-Channel

FEATURES

Charge pump with automatic gain selection of 1×, 1.5×, and 2×

for maximum efficiency

7 independent, programmable LED drivers

7 drivers capable of 30 mA (typical)

1 driver also capable of 60 mA (typical) Programmable maximum current limit (128 levels) Standby mode for <1 μA current consumption 16 programmable fade in and fade out times

0.1 sec to 5.5 sec

Choose from linear, square, or cubic rates Fading override

2

I

C-compatible interface for all programming Dedicated reset pin and built-in power-on reset (POR) Short-circuit, overvoltage, and overtemperature protection Internal soft start to limit inrush currents Input-to-output isolation during faults or shutdown Operation down to V

(UVLO) at V

IN

Available in a small 20-ball, 2.15 mm × 2.36 mm × 0.6 mm

WLCSP or a 20-lead, 4 mm × 4 mm × 0.75 mm LFCSP

= 2.5 V with undervoltage lockout

IN

= 2.0 V

Smart LED Driver with I2C Interface

ADP8861

TYPICAL OPERATING CIRCUIT

D1 D2 D3 D4 D5 D6 D7

VIN

C

IN

nRST

SDA

SCL

nINT

1µF

VDDIO

ADP8861

VDDIO

GND1 GND2

Figure 1.

C1+

C1–

C2+

C2–

C 1µF

VOUT

OUT

C1 1µF

C2 1µF

08391-001

APPLICATIONS

Mobile display backlighting Mobile phone keypad backlighting Dual RGB backlighting LED indication General backlighting of small format displays

GENERAL DESCRIPTION

The ADP8861 provides a powerful charge pump driver with independent control of up to seven LEDs. These seven LEDs can be independently driven up to 30 mA (typical). The seventh LED can also be driven to 60 mA (typical). All LEDs are programmable for maximum current and fade in/out times via

2

the I

C interface. These LEDs can also be combined into groups to

reduce the processor instructions during fade in/out.

This entire configuration is driven by a two-capacitor charge pump with gains of 1×, 1.5×, and 2×. The charge pump is capable of driving a maximum I

of 240 mA from a supply

OUT

of 2.5 V to 5.5 V. A full suite of safety features, including shortcircuit, overvoltage, and overtemperature protection, allows easy implementation of a safe and robust design. Additionally, input inrush currents are limited via an integrated soft start combined with controlled input-to-output isolation.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADP8861

REVISION HISTORY

6/10—Rev. 0 to Rev. A

Changes to Features Section and General Description Section . 1

Changes to Thermal Resistance Section and Table 3 ................... 5

Added Figure 4; Renumbered Sequentially .................................. 6

Changes to Table 4 ............................................................................ 6

Changes to Layout Guidelines Section ........................................ 19

Updated Outline Dimensions ....................................................... 39

Changes to Ordering Guide .......................................................... 40

4/10—Revision 0: Initial Version

Rev. A | Page 2 of 40

ADP8861

SPECIFICATIONS

VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nINT = open, nRST = 2.7 V, V typical values are at T

= 25°C and are not guaranteed, minimum and maximum limits are guaranteed from TA = −40°C to +85°C, unless

A

otherwise noted.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

SUPPLY

Input Voltage

Operating Range VIN 2.5 5.5 V Start-Up Level V Low Level V

V

Hysteresis V

IN(START)

UVLO Noise Filter t

VIN increasing 2.05 2.30 V

IN(START)

VIN decreasing 1.75 1.97 V

IN(STOP)

After startup 80 mV

IN(HYS)

10 μs

UVLO

Quiescent Current IQ

Prior to V During Standby I After Startup and Switching I

I

IN(START)

Q(START)

VIN = 3.6 V, Bit nSTBY = 0, SCL = SDA = 0 V 0.3 1.0 μA

Q(STBY)

Q(ACTIVE)

VIN = V

− 100 mV 10 μA

IN(START)

VIN = 3.6 V, Bit nSTBY = 1, I

OSCILLATOR Charge pump gain = 2×

Switching Frequency fSW 0.8 1 1.32 MHz Duty Cycle D 50 %

OUTPUT CURRENT CONTROL

Maximum Drive Current I

D1:D7(MAX)

V

D1:D7

= 0.4 V

Diode1 to Diode 7 Bit SCR = 0 in the ISC7 register

TJ = 25°C 26.2 30 34.1 mA TJ = −40°C to +85°C 24.4 34.1 mA

Diode 7 Only (60 mA Setting) I

VD7 = 0.4 V, Bit SCR = 1 in the ISC7 register

D7(60 mA)

TJ = 25°C 52.5 60 67 mA TJ = −40°C to +85°C 48.8 67 mA

LED Current Source Matching1 I

All Current Sinks I Diode 2 to Diode 7 Current

MATCH

MATCH7

I

MATCH6

V V

= 0.4 V 2.0 %

D1:D7

= 0.4 V 1.5 %

D2:D7

Sinks Leakage Current on LED Pins I Equivalent Output Resistance R

Gain = 1× VIN = 3.6 V, I Gain = 1.5× VIN = 3.1 V, I Gain = 2× VIN = 2.5 V, I

Regulated Output Voltage V

VIN = 5.5 V, V

D1:D7(LKG)

OUT

VIN = 3 V, gain = 2×, I

OUT(REG)

D1:D7

= 100 mA 0.5 Ω

OUT

= 100 mA 3.0 Ω

OUT

= 100 mA 3.8 Ω

OUT

AUTOMATIC GAIN SELECTION

Minimum Voltage

Gain Increases V

Minimum Current Sink Headroom

Decrease V

HR(UP)

IDX = I

V

HR(MIN)

until the gain switches up 162 200 276 mV

D1:D7

× 95% 180 mV

DX(MAX )

Voltage

Gain Delay t

GAIN

The delay after gain has changed and before gain is allowed to change again

= 0.4 V, Capacitor C1 = 1 F, Capacitor C2 = 1 F, C

D1:D7

= 0 mA, gain = 2× 4.5 7.2 mA

OUT

= 1 F,

= 2.5 V, Bit nSTBY = 1 0.5 μA

= 10 mA 4.3 4.9 5.5 V

OUT

100 μs

Rev. A | Page 3 of 40

ADP8861

SDA

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

FAULT PROTECTION

Start-Up Charging Current Source ISS V Output Voltage Threshold V

Exit Soft Start V Short-Circuit Protection V

Output Overvoltage Protection V

OUT

OUT(START)

OUT(SC)

OVP

Activation Level 5.8 V OVP Recovery Hysteresis 500 mV

Thermal Shutdown

Threshold TSD 150 °C Hysteresis TSD

Isolation from Input to Output

(HYS)

VIN = 5.5 V, V

I

OUTLKG

During Fault

Time to Validate a Fault t

2 μs

FAULT

I2C INTERFACE

Operating V

Volt age V

DDIO

5.5 V

DDIO

Logic Low Input2 VIL V Logic High Input3 VIH V

I2C TIMING SPECIFICATIONS Guaranteed by design

20 μs

Delay from Reset Deassertion to

2

C Access

I SCL Frequency f SCL High Time t SCL Low Time t

t

RESET

400 kHz

SCL

0.6 μs

HIGH

1.3 μs

LOW

Setup Time

Data t

Repeated Start t

Stop Condition t

100 ns

SU, DAT

0.6 μs

SU, STA

0.6 μs

SU, STO

Hold Time

Data t

Start/Repeated Start t Bus Free Time (Stop and Start

0 0.9 μs

HD, DAT

0.6 μs

HD, STA

t

1.3 μs

BUF

Conditions) Rise Time (SCL and SDA) tR 20 + 0.1 CB 300 ns Fall Time (SCL and SDA) tF 20 + 0.1 CB 300 ns Pulse Width of Suppressed Spike tSP 0 50 ns Capacitive Load per Bus Line C

1

Current source matching is calculated by dividing the difference between the maximum and minimum currents from the sum of the maximum and minimum.

2

VIL is a function of the input voltage. See Figure 16 in the Typical Performance Characteristics section for typical values over operating ranges.

3

VIH is a function of the input voltage. See Figure 16 in the Typical Performance Characteristics section for typical values over operating ranges.

B

= 3.6 V, V

IN

V

OUT

V

OUT

rising 0.92 × VIN V falling 0.55 × VIN V

= 0.8 × VIN 2.5 3.75 5.5 mA

OUT

20 °C

= 0 V, Bit nSTBY = 0 1.5 μA

OUT

= 2.5 V 0.5 V

IN

= 5.5 V 1.55 V

IN

400 pF

I2C TIMING DIAGRAM

SCL

S

S = START CO NDITION Sr = REPEATED START CONDITION P = STOP CONDITION

t

LOW

t

R

t

HD, DAT

t

SU, DAT

t

HIGH

Figure 2. I

t

F

t

F

t

SU, STA

2

C Interface Timing Diagram

Sr

Rev. A | Page 4 of 40

t

HD, STA

t

SP

t

SU, STO

t

R

t

BUF

P S

08391-002

ADP8861

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

VIN, VOUT −0.3 V to +6 V

D1, D2, D3, D4, D5, D6, and D7 −0.3 V to +6 V

nINT, nRST, SCL, and SDA −0.3 V to +6 V

Output Short-Circuit Duration Indefinite

Operating Temperature Range

Ambient (TA) –40°C to +85°C1

Junction (TJ) –40°C to +125°C Storage Temperature Range –65°C to +150°C Soldering Conditions JEDEC J-STD-020 ESD (Electrostatic Discharge)

Human Body Model (HBM) ±3 kV

Charged Device Model (CDM) ±1.5 kV

1

The maximum operating junction temperature (T

over the maximum operating ambient temperature (T Maximum Temperature Ranges section for more information.

) takes precedence

J(MAX)

). See the

A(MAX)

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all voltages are referenced to ground.

MAXIMUM TEMPERATURE RANGES

The maximum operating junction temperature (T precedence over the maximum operating ambient temperature (T

). Therefore, in situations where the ADP8861 is

A(MAX)

exposed to poor thermal resistance and high power dissipation (P

), the maximum ambient temperature may need to be

D

derated. In these cases, the maximum ambient temperature can be calculated with the following equation:

T

A(MAX)

= T

J(MAX)

− (θJA × P

D(MAX)

)

J(MAX)

) takes

THERMAL RESISTANCE

θJA (junction to air) is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. The θ

, θJB (junction to board), and θJC (junction to

JA

case) are determined according to JESD51-9 on a 4-layer printed circuit board (PCB) with natural convection cooling. For the LFCSP package, the exposed pad must be soldered to GND.

Table 3. Thermal Resistance

Package Type θJA θ

θ

JB

Unit

JC

WLCSP 48 9 N/A1 °C/W LFCSP 49.5 N/A1 5.3 °C/W

1

N/A stands for not applicable.

ESD CAUTION

Rev. A | Page 5 of 40

ADP8861

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

234

TOP VIEW

(Not to S cale)

D6

D4 20

1

D3

2

D2

3

D1

4

SCL

5

nRST

6

NOTES

1. CONNECT THE EXPOSE D P ADDLE TO GND1 AND/OR G ND2.

nINT

D7

D5

NA

19

18

17

16

15

GND1

14

VIN

13

VOUT

12

C2+

11

C1+

9

8

7

10 C2–

C1–

SDA

GND2

8391-005

Figure 3. LFCSP Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

LFCSP WLCSP Mnemonic Description

14 A3 VIN Input Voltage, 2.5 V to 5.5 V. 3 D3 D1 LED Sink 1. 2 E3 D2 LED Sink 2. 1 E4 D3 LED Sink 3. 20 D4 D4 LED Sink 4. 19 C4 D5 LED Sink 5. 17 B4 D6 LED Sink 6. 16 B3 D7 LED Sink 7. 18 C3 NA This pin is not used and must be connected to ground. 13 A2 VOUT Charge Pump Output. 11 A1 C1+ Charge Pump C1+. 9 C1 C1− Charge Pump C1−. 12 B1 C2+ Charge Pump C2+. 10 B2 C2− Charge Pump C2−. 15 A4 GND1 Ground. Connect the exposed pad to GND1 and/or GND2. 8 D1 GND2 Ground. Connect the exposed pad to GND1 and/or GND2. 6 D2 nINT

Processor Interrupt (Active Low). Requires an external pull-up resistor. If this pin is not used, it can be left floating.

5 E1 nRST

Hardware Reset (Active Low). This pin resets the device to the default conditions. If not used, this pin must be tied above V

IH(MIN)

. 7 C2 SDA I2C Serial Data. Requires an external pull-up resistor. 4 E2 SCL I2C Clock. Requires an external pull-up resistor. 21 NA EPAD Exposed Paddle. Connect the exposed paddle to GND1 and/or GND2.

1

C1+

A

C2+

B

C1–

C

GND2

D

nRST

E

(BALL SIDE DOWN)

VOUT

C2–

SDA

nINT

SCL

TOP VIEW

Not to Scale

VIN

D7

NA

D1

D2

GND1

Figure 4. WLCSP Pin Configuration

D6

D5

D4

D3

08391-004

Rev. A | Page 6 of 40

ADP8861

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nRST = 2.7 V, V T

= 25°C, unless otherwise noted.

A

2.0 I

= NO LOAD

OUT

1.8

1.6

1.4

1.2

1.0

(mA)

Q

I

0.8

0.6

0.4

0.2

0

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)

Figure 5. Typical Quiescent Current, G = 1×

5.0

4.5

4.0

3.5

3.0

2.5

(mA)

Q

I

2.0

1.5

1.0

0.5

0

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)

Figure 6. Typical Quiescent Current, G = 2×, I

10

1

–40°C +25°C +85°C +105°C

I

= NO LOAD

OUT

–40°C +25°C +85°C +105°C

Q(ACTIVE)

SCL = SDA = 0V nRST = 2. 7V

= 0.4 V, CIN = 1 F, Capacitor C1 = 1 F, Capacitor C2 = 1 F, C

D1:D7

35

VIN = 3.6V

= 30mA

I

D1:D7

30

25

20

(mA)

OUT

15

I

10

5

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

08391-100

VHR (V)

Figure 8. Typical Diode Current vs. Current Sink Headroom Voltage (VHR)

35

V

= 0.4V

D1:D7

34

33

32

31

(mA)

30

OUT

I

29

28

27

26

25

2.0 5.52.5 3.0 3.5 4.0 4.5 5.0

08391-101

VIN (V)

Figure 9. Typical Diode Current vs. V

6

–40°C +25°C +85°C

5

+105°C

4

OUT

IN

VIN = 3.6V I

= 30mA

D1:D7

= 1 F,

D1 D2 D3 D4 D5 D6 D7

08391-103

D1 D2 D3 D4 D5 D6 D7

08391-104

(µA) I

Q

0.001

0.1

0.01

–40°C +25°C +85°C +105°C

10 23456

VIN (V)

08391-102

Figure 7. Typical Standby IQ vs. VIN

Rev. A | Page 7 of 40

3

MISMATCH (%)

2

1

0

0.2 2.01.81.61.41.21.00.80.60.4 VHR (V)

08391-105

Figure 10. Typical Diode Matching vs. Current Sink Headroom Voltage (VHR)

ADP8861

35

VIN = 3.6V I

= 30mA

D1:D7

30

25

20

(mA)

OUT

15

I

10

5

0

00.2 2.01.81.61.41.21.00.80.60.4 VHR (V)

–40°C +25°C +85°C +105°C

Figure 11. Typical Diode Current vs. Current Sink Headroom Voltage (VHR)

1

VIN = 3.6V V

= 0.40V

D1:D7

0

–1

–2

–3

DEVIATION (%)

OUT

I

–4

–5

–6

–40 –10 20 50 80 110

JUNCTION TEMPERATURE (°C)

Figure 12. Typical Change In Diode Current vs. Temperature

7

I

= 100mA

OUT

6

5

4

(Ω)

OUT

3

R

2

G = 2× @ V

G = 1.5× @ V

= 2.5V

IN

= 3V

08391-106

08391-107

1.0

0.9

0.8

0.7

0.6

(Ω)

0.5

OUT

R

0.4

0.3

0.2

0.1

0

2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

Figure 14. Typical R

VIN (V)

(G = 1×) vs. V

OUT

I

OUT

IN

10

V

= 80% OF V

OUT

9

8

7

6

(mA)

5

OUT

I

4

3

2

1

0

2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

IN

VIN (V)

Figure 15. Typical Output Soft Start Current, I

1.4

1.2

1.0

0.8

0.6

THRESHOLD (V)

0.4

VIH @ +25°C VIH @ +85°C VIH @ –40°C

= 100mA

–40°C +25°C +85°C +105°C

08391-109

–40°C +25°C +85°C +105°C

08391-110

SS

VIL @ +25°C VIL @ +85°C VIL @ –40°C

1

0

–40 –20 0 20 40 60 80 100

G = 1× @ VIN = 3.6V

TEMPERATURE (°C)

Figure 13. R

vs. Temperature

OUT

08391-108

Rev. A | Page 8 of 40

0.2

0

2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)

Figure 16. Typical I2C Thresholds, VIH and VIL

08391-111

ADP8861

5.5 VIN = 3V GAIN = 2×

5.4 I

= 10mA

OUT

5.3

5.2

5.1

(V)

5.0

OUT

V

4.9

4.8

4.7

4.6

4.5

–10–40 20 50 80 110

JUNCTION TEMPERATURE (°C)

Figure 17. Typical Regulated Output Voltage (V

6.0

5.8

(V)

5.6

OUT

V

OVP THRESHOLD

OUT(REG)

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

I

= 140mA, Vf = 3.85V

OUT

10

I

= 210mA, Vf = 4.25V

OUT

0

2.5 5.55.04.54.03.53.0

08391-113

)

Figure 20. Typical Efficiency (High Vf Diode)

VIN (V)

T

1

2

VIN (AC-COUPLED) 50mV /DIV

V

(AC-COUPLED) 50mV /DIV

OUT

450

400

350

300

250

200

150

100

50

0

(mA)

IN

I

08391-116

5.4

OVP RECOVERY

5.2

–10–40 20 50 80 110

JUNCTION TEMPERATURE (°C)

Figure 18. Typical Overvoltage Protection (OVP) Threshold

90

80

70

60

50

40

EFFICIENCY (%)

30

20

I

10

0

2.5 5.55.04.54.03.53.0

= 140mA, Vf = 3.1V

OUT

I

= 210mA, Vf = 3.2V

OUT

VIN (V)

Figure 19. Typical Efficiency (Low Vf Diode)

3

CIN = 1µF, C

= 3.6V

V

IN

= 120mA

I

OUT

08391-114

IIN (AC-COUPLED) 10mA/DIV

= 1µF, C1 = 1µF, C2 = 1µF

OUT

500ns/DIV

08391-117

Figure 21. Typical Operating Waveforms, G = 1×

450

400

350

300

250

(mA)

IN

200

I

150

100

50

0

08391-115

1

2

3

CIN = 1µF, C

= 3.0V

V

IN

= 120mA

I

OUT

Figure 22. Typical Operating Waveforms, G = 1.5×

VIN (AC-COUPLED) 50mV /DIV

V

OUT

IIN (AC-COUPLED) 10mA/DIV

= 1µF, C1 = 1µF, C2 = 1µF

OUT

T

(AC-COUPLED) 50mV/DIV

500ns/DIV

08391-118

Rev. A | Page 9 of 40

ADP8861

2

VIN = 3.7V

V

(1V/DIV)

OUT

T

VIN (AC-COUPLED) 50mV /DIV

1

V

(AC-COUPLED) 50mV/DIV

OUT

2

3

CIN = 1µF, C V I

OUT

= 2.5V

IN

= 120mA

IIN (AC-COUPLED) 10mA/DIV

= 1µF, C1 = 1µF, C2 = 1µF

OUT

Figure 23. Typical Operating Waveforms, G = 2×

500ns/DIV

4

08391-119

IIN (10mA/DIV)

I

(10mA/DIV)

OUT

Figure 24. Typical Start-Up Waveform

100µs/DIV

08391-120

Rev. A | Page 10 of 40

ADP8861

THEORY OF OPERATION

The ADP8861 provides a powerful charge pump driver with programmable LED control. Up to seven LEDs can be independently driven up to 30 mA (typical) each. The seventh LED can also be driven to 60 mA (typical). All LEDs can be individually programmed or combined into a group to operate backlight

LEDs. A full suite of safety features, including short-circuit, overvoltage, and overtemperature protection with input-tooutput isolation, allows for a robust and safe design. The integrated soft start limits inrush currents at startup, restart attempts, and gain transitions.

D4 D5

ID4 ID5

EN

VIN

ID6

V

I

REFS

D6 D7

ID7

CLK

GND1

GND2

GAIN

SELECT

LOGIC

CHARGE

PUMP

LOGIC

SOFT

START

CHARGE

PUMP

(1×, 1.5× , 2×)

V

IN

I

SS

VOUT

C

OUT

C1+

C1

1µF C1– C2+

C2

1µF C2–

08391-011

VBAT

VDDIO

nRST

SCL

SDA

nINT

VIN

C

IN

D1

ID1

ID2

VIN

STNDBY

NOISE FILTER

50µs

RESET

I2C

LOGIC

D2 D3

ID3

UVLO

STANDBY

SWITCH CO NTROL

CURRENT SINK CONT ROL

Figure 25. Detailed Block Diagram

Rev. A | Page 11 of 40

ADP8861

V

POWER STAGE

Because typical white LEDs require up to 4 V to drive them, some form of boosting is required over the typical variation in battery voltage. The ADP8861 accomplishes this with a high efficiency charge pump capable of producing a maximum I of 240 mA over the entire input voltage range (2.5 V to 5.5 V). Charge pumps use the basic principle that a capacitor stores charge based on the voltage applied to it, as shown in the following equation:

Q = C × V (1)

By charging the capacitors in different configurations, the charge, and therefore the gain, can be optimized to deliver the voltage required to power the LEDs. Because a fixed charging and discharging combination must be used, only certain multiples of gain are available. The ADP8861 is capable of automatically optimizing the gain (G) from 1×, 1.5×, and 2×. These gains are accomplished with two capacitors (labeled C1 and C2 in Figure 25) and an internal switching network.

In G = 1× mode, the switches are configured to pass VIN directly to VOUT. In this mode, several switches are connected in parallel to minimize the resistive drop from input to output. In G = 1.5× and 2× modes, the switches alternatively charge from the battery and discharge into the output. For G = 1.5×, the capacitors are charged from V V

in parallel. For G = 2×, the capacitors are charged from VIN

OUT

in series and are discharged to

IN

OUT

in parallel and are discharged to V modes, the switches are opened and the output is physically isolated from the input.

Automatic Gain Selection

Each LED that is driven requires a current source. The voltage on this current source must be greater than a minimum headroom voltage (180 mV typical) to maintain accurate current regulation. The gain is automatically selected based on the minimum voltage (V

) at all of the current sources. At startup,

DX

the device is placed into G = 1× mode and the output charges to V

. If any V

IN

level is less than the required headroom

D1:D7

(180 mV), the gain is increased to the next step (G = 1.5×). A 100 s delay is allowed for the output to stabilize prior to the next gain switching decision. If there remains insufficient current sink headroom, then the gain is increased again to 2×. Conversely, to optimize efficiency, it is not desirable for the output voltage to be too high. Therefore, the gain reduces when the headroom voltage is great enough. This point (labeled V

in Figure 26) is internally calculated to ensure that the

DMAX

lower gain still results in ample headroom for all the current sinks. The entire cycle is illustrated in Figure 26.

Note that the gain selection criteria apply only to active current sources. If current sources have been deactivated through an

2

I

C command (for example only five LEDs are used), then the

voltages on the deactivated current sources are ignored.

in parallel. In certain fault

OUT

STANDBY

EXIT

STARTUP

G = 1

G = 1.5

G = 2

NOTES

1.

IS THE CALCULATED GAIN DOWN TRANSITION POINT.

DMAX

EXIT STANDBY

1

100µs (TYP)

1

WAIT

100µs (TYP)

Figure 26. State Diagram for Automatic Gain Selection

STARTUP:

CHARGE

V

IN

0

VOUT > V

WAIT

TO V

OUT

OUT(START)

1

Rev. A | Page 12 of 40

MIN (V

1

D1:D7

MIN (V

0

) < V

D1:D7

HR(UP)

) < V

0

) < V

HR(UP)

DMAX

0

MIN (V

0

D1:D7

) > V

DMAX

08391-012

ANALOG DEVICES ADP8861 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

TYPICAL OPERATING CIRCUIT

APPLICATIONS

GENERAL DESCRIPTION

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

I2C TIMING DIAGRAM

ABSOLUTE MAXIMUM RATINGS

MAXIMUM TEMPERATURE RANGES

THERMAL RESISTANCE

ESD CAUTION

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

THEORY OF OPERATION

POWER STAGE

Automatic Gain Selection