ANALOG DEVICES ADP8860 Service Manual

Charge Pump, 7-Channel

V

R

Smart LED Driver with I2C Interface

FEATURES

Charge pump with automatic gain selection of 1×, 1.5×, and

2× for maximum efficiency

Up to two built-in comparator inputs with programmable

modes for ambient light sensing

Outdoor, office, and dark modes for maximum backlight

power savings

7 independent and programmable LED drivers

6 drivers capable of 30 mA (typical)

1 driver capable of 60 mA (typical) Programmable maximum current limit (128 levels) Standby mode for <1 μA current consumption 16 programmable fade in and fade out times

0.1 sec to 5.5 sec

Choose from linear, square, or cubic rates Fading override

2

I

C-compatible interface for all programming Dedicated reset pin and built-in power-on reset (POR) Short-circuit, overvoltage, and overtemperature protection Internal soft start to limit inrush currents Input-to-output isolation during faults or shutdown Operation down to V

(UVLO) at V

IN

Small wafer level chip scale package (WLCSP) or lead frame

chip scale package (LFCSP)

APPLICATIONS

Mobile display backlighting Mobile phone keypad backlighting Dual RGB backlighting LED indication General backlighting of small format displays

GENERAL DESCRIPTION

The ADP8860 combines a programmable backlight LED charge pump driver with automatic phototransistor control. This combination allows for significant power savings because it changes the current intensity in office and dark ambient light conditions. By performing this function automatically, it eliminates the need for a processor to monitor the phototransistor.

The light intensity thresholds are fully programmable via the

2

I

C® interface. A second phototransistor input, with dedicated comparators, improves the ambient light detection levels for various user operating conditions.

= 2.5 V with undervoltage lockout

IN

= 2.0 V

ADP8860

TYPICAL OPERATING CIRCUIT

OPTIONAL

OUT

CMP_IN2

ADP8860

GND1

PHOTOSENSOR

D7

D6/

D1

GND2

V

nRST

SDA

SCL

nINT

IN

V

D3D1E3D2E4D3D4D4C4D5B4

A3

1µF

VDDIO

E1

VDDIO

C2

VDDIO

E2

VDDIO

D2

A4

Figure 1.

The ADP8860 allows as many as six LEDs to be independently driven up to 30 mA (typical). A seventh LED can be driven to 60 mA (typical). All LEDs are programmable for minimum/maximum current and fade in/out times via the I LEDs can also be combined into groups to reduce the processor instructions during fade in/out.

Driving this entire configuration is a two-capacitor charge pump with gains of 1×, 1.5×, and 2×. This setup is capable of driving a maximum I

of 240 mA from a supply of 2.5 V to 5.5 V. The

OUT

device includes a variety of safety features including short-circuit, overvoltage, and overtemperature protection. These features allow easy implementation of a safe and robust design. Additionally, input inrush currents are limited via an integrated soft start combined with controlled input-to-output isolation.

The ADP8860 is available in two package types, either a compact 2 mm × 2.4 mm × 0.6 mm WLCSP (wafer level chip scale package) or a small LFCSP (lead frame chip scale package).

ALS

PHOTOSENSO

CMP_IN

B3

C3

A2

A1

C1

B1

B2

2

C interface. These

C1+

C1–

C2+

C2–

0.1µF

1µF

V

OUT

C1 1µF

C2 1µF

07967-001

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infrin gements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADP8860

REVISION HISTORY

5/09—Revision 0: Initial Version

Rev. 0 | Page 2 of 52

ADP8860

SPECIFICATIONS

VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nINT = open, nRST = 2.7 V, CMP_IN = 0 V, V typical values are at T

= 25°C and are not guaranteed, minimum and maximum limits are guaranteed from TA = −40°C to +85°C, unless

A

= 0.4 V, C1 = 1 F, C2 = 1 F, C

D1:D7

OUT

= 1 F,

otherwise noted.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

SUPPLY

Input Voltage

Operating Range VIN 2.5 5.5 V Startup Level V Low Level V

V

Hysteresis V

IN(START)

UVLO Noise Filter t

VIN increasing 2.05 2.30 V

IN(START)

VIN decreasing 1.75 1.97 V

IN(STOP)

After startup 80 mV

IN(HYS)

10 μs

UVLO

Quiescent Current IQ

Prior to V During Standby I After Startup and Switching I

I

IN(START)

Q(START)

VIN = 3.6 V, Bit nSTBY = 0, SCL = SDA = 0 V 0.3 1.0 μA

Q(STBY)

Q(ACTIVE)

VIN = V

− 100 mV 10 μA

IN(START)

VIN = 3.6 V, Bit nSTBY = 1, I

= 0 mA,

OUT

4.5 7.2 mA

gain = 2×

OSCILLATOR

Switching Frequency fSW 0.8 1 1.32 MHz Duty Cycle D 50 %

OUPUT CURRENT CONTROL

Maximum Drive Current I

D1:D7(MAX)

V

D1:D7

= 0.4 V

D1 to D7 Bit SCR = 0 in the ISC7 register

TJ = 25°C 26.2 30 34.1 mA TJ = −40°C to +85°C 24.4 34.1 mA

D7 Only (60 mA Setting) I

VD7 = 0.4 V, Bit SCR = 1 in the ISC7 register

D7(60 mA)

TJ = 25°C 52.5 60 67 mA TJ = −40°C to +85°C 48.8 67 mA

LED Current Source Matching

All Current Sinks I

D2 to D7 Current Sinks I Leakage Current on LED Pins I Equivalent Output Resistance R

Gain = 1× VIN = 3.6 V, I

Gain = 1.5× VIN = 3.1 V, I

Gain = 2× VIN = 2.5 V, I Regulated Output Voltage V

1

I

MATCH

V

MATCH7

V

MATCH6

VIN = 5.5 V, V

D1:D7(LKG)

OUT

VIN = 3 V, gain = 2×, I

OUT(REG)

= 0.4 V 2.0 %

D1:D7

= 0.4 V 1.5 %

D2:D7

= 2.5 V, Bit nSTBY = 1 0.5 μA

D1:D7

= 100 mA 0.5 Ω

OUT

= 100 mA 3.0 Ω

OUT

= 100 mA 3.8 Ω

OUT

= 10 mA 4.3 4.9 5.5 V

OUT

AUTOMATIC GAIN SELECTION

Minimum Voltage

Gain Increases V Minimum Current Sink Headroom

Decrease V

HR(UP)

V

IDX = I

HR(MIN)

until the gain switches up 162 200 276 mV

D1:D7

× 95% 180 mV

DX(MAX )

Voltage Gain Delay t

The delay after gain has changed and

GAIN

100 μs

before gain is allowed to change again

Rev. 0 | Page 3 of 52

ADP8860

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

AMBIENT LIGHT SENSING

COMPARATORS Ambient Light Sensor Current I DAC Bit Step

Threshold L2 Level I Threshold L3 Level I

FAULT PROTECTION

Startup Charging Current Source ISS V Output Voltage Threshold V

Exit Soft Start V Short-Circuit Protection V

Output Overvoltage Protection V

Activation Level 5.8 V OVP Recovery Hysteresis 500 mV

Thermal Shutdown

Threshold TSD 150 °C Hysteresis TSD

Isolation from Input to Output

During Fault

Time to Validate a Fault t

I2C INTERFACE

V

Voltage Operating Range V

DDIO

Logic Low Input2 VIL V Logic High Input3 VIH V

I2C TIMING SPECIFICATIONS Guaranteed by design

Delay from Reset Deassertion to

I2C access SCL Clock Frequency f SCL High Time t SCL Low Time t Setup Time

Data t

Repeated Start t

Stop Condition t Hold Time

Data t

Start/Repeated Start t Bus Free Time (Stop and Start

Conditions) Rise Time (SCL and SDA) tR 20 + 0.1 CB 300 ns Fall Time (SCL and SDA) tF 20 + 0.1 CB 300 ns Pulse Width of Suppressed Spike tSP 0 50 ns Capacitive Load Per Bus Line C

1

Current source matching is calculated by dividing the difference between the maximum and minimum current from the sum of the maximum and minimum.

2

VIL is a function of the input voltage. See in the section for typical values over operating ranges. Figure 16

3

VIH is a function of the input voltage. See in the section for typical values over operating ranges.

CMP_IN = VD6 = 2.8 V, Bit CMP2_SEL = 1 0.70 1.08 1.33 mA

ALS

I

L2BIT

I

L3BIT

OUT

OUT(START)

V

OUT(SC)

OVP

20 °C

(HYS)

I

VIN = 5.5 V, V

OUTLKG

2 μs

FAULT

5.5 V

DDIO

t

20 μs

RESET

400 KHz

SCL

0.6 μs

HIGH

1.3 μs

LOW

100 ns

SU, DAT

0.6 μs

SU, STA

0.6 μs

SU, STO

0 0.9 μs

HD, DAT

0.6 μs

HD, STA

t

1.3 μs

BUF

B

Figure 16

= I

L2BIT

L3BIT

V

/250 4.3 μA

ALS

= I

/2000 0.54 μA

ALS

= 3.6 V, V

IN

rising 0.92 × VIN V

OUT

falling 0.55 × VIN V

OUT

= 3.6 V 0.6 V

IN

= 3.6 V 1.30 V

IN

= 0.8 × VIN 2.5 3.75 5.5 mA

OUT

= 0 V, Bit nSTBY = 0 1.5 μA

OUT

400 pF

Typical Performance Characteristics

Rev. 0 | Page 4 of 52

ADP8860

SDA

I2C TIMING DIAGRAM

t

LOW

SCL

S

S = START CONDITION Sr = REPEATED ST ART CONDITI ON P = STOP CONDITION

t

R

t

HD, DAT

t

SU, DAT

t

HIGH

Figure 2. I

t

F

t

F

t

SU, STA

2

C Interface Timing Diagram

Sr

t

HD, STA

t

SP

t

SU, STO

t

R

BUF

P S

07967-002

Rev. 0 | Page 5 of 52

ADP8860

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

VIN, VOUT −0.3 V to +6 V D1, D2, D3, D4, D5, D6, and D7 −0.3 V to +6 V CMP_IN −0.3 V to +6 V nINT, nRST, SCL, and SDA −0.3 V to +6 V Output Short-Circuit Duration Indefinite Operating Ambient Temperature Range –40°C to +85°C1 Operating Junction Temperature Range –40°C to +125°C Storage Temperature Range –65°C to +150°C Soldering Conditions JEDEC J-STD-020 ESD (Electrostatic Discharge)

Human Body Model (HBM) ±2 kV Charged Device Model (CDM) ±2 kV

1

The maximum operating junction temperature (T

maximum operating ambient temperature (T Temperature Ranges section for more information.

) supersedes the

J(MAX)

). See the Maximum

A(MAX)

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all voltages are referenced to GND.

THERMAL RESISTANCE

θJA (junction to air) is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages. The θ case) are determined according to JESD51-9 on a 4-layer printed circuit board (PCB) with natural convection cooling. For the LFCSP package, the exposed pad must be soldered to the GND1 and/or GND2 terminal(s) on the board.

Table 3. Thermal Resistance

Package Type θJA θ

WLCSP 48 9 N/A °C/W LFCSP_VQ 49.5 N/A 5.3 °C/W

1

N/A means not applicable.

ESD CAUTION

, θJB (junction to board), and θJC (junction to

JA

1

θ

JB

Unit

JC

MAXIMUM TEMPERATURE RANGES

The maximum operating junction temperature (T supersedes the maximum operating ambient temperature (T

). Therefore, in situations where the ADP8860 is

A(MAX)

exposed to poor thermal resistance and a high power dissipation (P

), the maximum ambient temperature may need

D

to be derated. In these cases, the ambient temperature maximum can be calculated with the following equation:

T

A(MAX)

= T

J(MAX)

− (θJA × P

D(MAX)

)

J(MAX)

)

Rev. 0 | Page 6 of 52

ADP8860

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

ADP8860

234

1

CMP_IN

D5

D4

D6/CMP_IN2

D7

17

16

18

19

20

PIN 1 INDICATO R

1D3 2D2

ADP8860

3D1

TOP VIEW

4SCL

(Not to Scale)

5nRST

8

6

7

ND2

SDA

nINT

NOTES

1. CONNECT THE EXPOSED PADDLE TO GND1 AND/O R GND2.

G

15 GND1 14 VIN 13 VOUT 12 C2+ 11 C1+

9

10

C2–

C1–

Figure 3. LFCSP Pin Configuration

7967-003

C1+

A

C2+

B

C1–

C

GND2

D

nRST

E

(BALL SIDE DOW N)

Figure 4. WLCSP Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic Description LFCSP WLCSP

14 A3 VIN Input Voltage 2.5 V to 5.5 V. 3 D3 D1 LED Sink 1. 2 E3 D2 LED Sink 2. 1 E4 D3 LED Sink 3. 20 D4 D4 LED Sink 4. 19 C4 D5 LED Sink 5. 17 B4 D6/CMP_IN2 LED Sink 6/Comparator Input for Second Phototransistor. When using this pin as a second

phototransistor input, a capacitor (0.1 μF recommended) must be connected from this pin to ground. 16 B3 D7 LED Sink 7. 18 C3 CMP_IN Comparator Input for Phototransistor. When using this function, a capacitor (0.1 μF recommended) must

be connected from this pin to ground. 13 A2 VOUT Charge Pump Output. 11 A1 C1+ Charge Pump C1+. 9 C1 C1−

Charge Pump C1−. 12 B1 C2+ Charge Pump C2+. 10 B2 C2− Charge Pump C2−. 15 A4 GND1 Ground. Connect the exposed pad to GND1 and/or GND2. 8 D1 GND2 Ground. Connect the exposed pad to GND1 and/or GND2. 6 D2 nINT Processor Interrupt (Active Low). Requires an external pull-up resistor. If this pin is not used, it can be left

floating. 5 E1 nRST Hardware Reset (Active Low). This bit resets the device to the default conditions. If not used, this pin

must be tied above V

IH(MIN)

. 7 C2 SDA I2C Serial Data. Requires an external pull-up resistor. 4 E2 SCL I2C Clock. Requires an external pull-up resistor.

VIN

GND1VOUT

D7

C2–

SDA

nINT D4

TOP VIEW

Not to Scale

CMP_IN2

CMP_IN

D1

D2

D6/

D5

D3SCL

07967-004

Rev. 0 | Page 7 of 52

ADP8860

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 3.6 V, SCL = 2.7 V, SDA = 2.7 V, nRST = 2.7 V, V otherwise noted.

2.0 I

= NO LOAD

OUT

1.8

1.6

1.4

1.2

1.0

(mA)

Q

I

0.8

0.6

0.4

0.2

0

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)

Figure 5. Typical Operating Current, G = 1×

5.0

4.5

4.0

3.5

3.0

2.5

(mA)

Q

I

2.0

1.5

1.0

0.5

0

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIN (V)

Figure 6. Typical Operating Current, G = 2×, I

10

1

–40°C +25°C +85°C +105°C

I

= NO LOAD

OUT

–40°C +25°C +85°C +105°C

Q(ACTIVE)

SCL = SDA = 0V nRST = 2. 7V

= 0.4 V, CIN = 1 μF, C1 = 1 μF, C2 = 1 μF, C

D1:D7

35

VIN = 3.6V I

D1:D7

30

25

20

(mA)

OUT

15

I

10

5

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

07967-100

Figure 8. Typical Diode Current vs. Current Sink Headroom Voltage (VHR)

35

V

D1:D7

34

33

32

31

(mA)

30

OUT

I

29

28

27

26

25

2.0 5.52.5 3.0 3.5 4.0 4.5 5.0

07967-101

6

5

4

= 1 μF, TA= 25°C, unless

OUT

= 30mA

VHR (V)

= 0.4V

VIN (V)

Figure 9. Typical Diode Matching vs. VIN

–40°C +25°C +85°C +105°C

VIN = 3.6V I

D1:D7

D1 D2 D3 D4 D5 D6 D7

07967-103

D1 D2 D3 D4 D5 D6 D7

07967-104

= 30mA

(µA)

Q

I

0.01

0.001

0.1

–40°C +25°C +85°C +105°C

10 23456

VIN (V)

07967-102

Figure 7. Typical Standby IQ

Rev. 0 | Page 8 of 52

3

MISMATCH (%)

2

1

0

0.2 2.01.81.61.41.21.00.80.60.4 VHR (V)

07967-105

Figure 10. Typical Diode Matching vs. Current Sink Headroom Voltage (VHR)

ADP8860

35

VIN = 3.6V

= 30mA

I

D1:D7

30

25

20

(mA)

OUT

15

I

10

5

0

00.2 2.01.81.61.41.21.00. 80. 60. 4

(V)

V

HR

–40°C +25°C +85°C +105°C

Figure 11. Typical Diode Current vs. Current Sink Headroom Voltage (VHR)

1

VIN = 3.6V V

= 0.40V

D1:D7

0

–1

–2

–3

DEVIATION (%)

OUT

I

–4

–5

–6

–40 –10 20 50 80 110

JUNCTION TEM PERATURE (°C)

Figure 12. Typical Change In Diode Current vs. Temperature

7

I

= 100mA

OUT

6

5

4

(Ω)

OUT

3

R

2

G = 2× @ V

G = 1.5× @ V

= 2.5V

IN

= 3V

07967-106

07967-107

1.0

0.9

0.8

0.7

0.6

(Ω)

0.5

OUT

R

0.4

0.3

0.2

0.1

0

2.0 2.5 3.0 3.5 4. 0 4.5 5.0 5.5

VIN (V)

I

OUT

Figure 14. Typical ROUT (G = 1×) vs. VIN

10

V

= 80% OF V

OUT

9

8

7

6

(mA)

5

OUT

I

4

3

2

1

0

2.0 2.5 3.0 3.5 4. 0 4.5 5.0 5.5

IN

VIN (V)

Figure 15. Typical Soft Start Current, ISS

1.4

1.2

1.0

0.8

0.6

THRESHOLD (V)

0.4

VIH = +25°C

VIH = +85°C

VIH = –40°C

= 100mA

–40°C +25°C +85°C +105°C

07967-109

–40°C +25°C +85°C +105°C

07967-110

VIL = +25°C

VIL = +85°C

VIL = –40°C

1

0

–40 –20 0 20 40 60 80 100

G = 1× @ V = 3.6V

TEMPERATURE (°C)

Figure 13. R

IN

vs. Temperature

OUT

07967-108

Rev. 0 | Page 9 of 52

0.2

0

2.5 3.0 3.5 4.0 4.5 5.0 5.5

VIN (V)

Figure 16. Typical I2C Thresholds, VIH and VIL

07967-111

ADP8860

1.4

1.3

1.2

1.1

(mA)

ALS

1.0

I

0.9

0.8

0.7

5.5 VIN = 3V GAIN = 2×

5.4 I

OUT

5.3

5.2

5.1

(V)

5.0

OUT

V

4.9

4.8

4.7

4.6

4.5

Figure 18. Typical Regulated Output Voltage (V

6.0

5.8

(V)

5.6

OUT

V

–40°C +25°C +85°C +105°C

3.02.5 3.5 4.0 4.5 5. 0 5.5

Figure 17. Typical ALS Current, I

V

(V)

IN

ALS

= 10mA

–10–40 20 50 80 110

JUNCTION TEMPERATURE (°C)

OUT(REG)

OVP THRESHOLD

0.9

0.8

0.7

0.6

0.5

0.4

EFFICIENCY (%)

0.3

0.2

I

0.1

0

2.5 5.55.04. 54. 03. 53. 0

07967-112

= 140mA, Vf = 3. 1V

OUT

I

= 210mA, Vf = 3. 2V

OUT

VIN (V)

450

400

350

300

250

200

150

100

50

0

(mA)

IN

I

07967-115

Figure 20. Typical Efficiency (Low Vf Diode)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

EFFICIENCY (%)

0.3

0.2

I

= 140mA, Vf = 3. 85V

OUT

0.1 I

= 210mA, Vf = 4. 25V

OUT

0

2.5 5.55.04.54.03.53.0

07967-113

)

Figure 21. Typical Efficiency (High Vf Diode)

VIN (V)

450

400

350

300

250

200

150

100

50

0

(mA)

IN

I

07967-116

T

1

2

VIN (AC-COUPLED) 50mV/DIV

V

(AC-COUPLED) 50mV/DIV

OUT

5.4

OVP RECOVERY

5.2 –10–40 20 50 80 110

JUNCTION TEMPERATURE (°C)

Figure 19. Typical Overvoltage Protection (OVP) Threshold

07967-114

Rev. 0 | Page 10 of 52

3

CIN = 1µF, C V I

OUT

IN

= 3.6V

= 120mA

IIN (AC-COUPLED) 10mA/ DIV

= 1µF, C1 = 1µF, C2 = 1µF

OUT

Figure 22. Typical Operating Waveforms, G = 1×

500ns/DIV

07967-117

ADP8860

2

VIN = 3.7V

V

(1V/DIV)

OUT

T

VIN (AC-COUPLED) 50mV /DIV

1

V

(AC-COUPLED) 50mV/DIV

OUT

2

3

C

= 1µF, C

IN

= 3.0V

V

IN

= 120mA

I

OUT

IIN (AC-COUPLED) 10mA/ DIV

= 1µF, C1 = 1µF, C2 = 1µF

OUT

Figure 23. Typical Operating Waveforms, G = 1.5×

T

VIN (AC-COUPLED) 50mV /DIV

1

V

(AC-COUPLED) 50mV/DIV

OUT

2

3

CIN = 1µF, C

= 2.5V

V

IN

= 120mA

I

OUT

IIN (AC-COUPLED) 10mA/ DIV

= 1µF, C1 = 1µF, C2 = 1µF

OUT

Figure 24. Typical Operating Waveforms, G = 2×

500ns/DIV

IIN (10mA/DIV)

4

07967-118

I

OUT

(10mA/DIV)

100µs/DIV

07967-120

Figure 25. Typical Start-Up Waveform

07967-119

Rev. 0 | Page 11 of 52

ADP8860

THEORY OF OPERATION

The ADP8860 combines a programmable backlight LED charge pump driver with automatic phototransistor control. This combination allows for significant power savings because it is able to change the current intensity based on the lighting conditions. It performs this function automatically thereby removing the need for a processor to monitor the phototransistor. The light intensity levels are fully programmable via the I second phototransistor input, with dedicated comparators, improves the ambient light detection abilities for various useroperating conditions.

2

C interface. A

The ADP8860 allows up to seven LEDs to be independently driven up to 30 mA (typical). The seventh LED can also be driven to 60 mA (typical). All LEDs can be individually programmed or combined into a group to operate backlight LEDs. A full set of safety features including short-circuit, overvoltage, and overtemperature protection with input-to-output isolation allow for a robust and safe design. The integrated soft start limits inrush currents at startup, restart attempts, and gain transitions.

V

ALS

OPTIONAL

PHOTOSENSOR

VBAT

VDDIO

nRST

SCL

SDA

nINT

D1

50µs

ID2

UVLO

D2E3D3

E4

ID3

STNDBY

SWITCH CONTROL

ILED CONTROL

D3

ID1

A3

C

VIN

IN

STNDBY

NOISE FILTER

E1

RESET

E2

C2

D2

I2C

LOGIC

D4D4D5

ID4 ID5

EN

LIGHT

SENSOR

LOGIC

VIN

ID6

V

I

REFS

D6B4D7

ID7

CLK

A4

GND1

B3

GND2

D1

GAIN

SELECT

LOGIC

CHARGE

PUMP LOGIC

C4

CMP_IN

C3

PHOTOSENSOR

CONVERSION

SOFT START

(1×, 1.5×, 2×)

CHARGE

PUMP

V

IN

I

SS

VOUT

A2

C

OUT

C1+

A1

C1 1µF

C1

C1– C2+

B1

C2 1µF

B2

C2–

07967-011

Figure 26. Detailed Block Diagram

Rev. 0 | Page 12 of 52

ADP8860

POWER STAGE

Because typical white LEDs require up to 4 V to drive them, some form of boosting is required over the typical variation in battery voltage. The ADP8860 accomplishes this with a high efficiency charge pump capable of producing a maximum I of 240 mA over the entire input voltage range (2.5 V to 5.5 V). Charge pumps use the basic principle that a capacitor stores charge based on the voltage applied to it, as shown in the following equation:

Q = C × V (1)

By charging the capacitors in different configurations, the charge, and therefore the gain, can be optimized to deliver the voltage required to power the LEDs. Because a fixed charging and discharging combination must be used, only certain multiples of gain are available. The ADP8860 is capable of automatically optimizing the gain (G) from 1×, 1.5×, and 2×. These gains are accomplished with two capacitors (labeled C1 and C2 in Figure 26) and an internal switching network.

In G = 1× mode, the switches are configured to pass VIN directly to VOUT. In this mode, several switches are connected in parallel to minimize the resistive drop from input to output. In G = 1.5× and 2× modes, the switches alternatively charge from the battery and discharge into the output. For G = 1.5×, the capacitors are charged from VIN in series and are discharged to VOUT in parallel. For G = 2×, the capacitors are charged

OUT

from VIN in parallel and are discharged to VOUT in parallel. In certain fault modes, the switches are opened and the output is physically isolated from the input.

Automatic Gain Selection

Each LED that is driven requires a current source. The voltage on this current source must be greater than a minimum headroom voltage (200 mV typical) to maintain accurate current regulation. The gain is automatically selected based on the minimum voltage (V

) at all of the current sources. At startup,

Dx

the device is placed into G = 1× mode and the output charges to V

. If any VDx level is less than the required headroom

IN

(200 mV), the gain is increased to the next step (G = 1.5×). A 100 s delay is allowed for the output to stabilize prior to the next gain switching decision. If there remains insufficient current sink headroom, then the gain is increased again to 2×. Conversely, to optimize efficiency, it is not desirable for the output voltage to be too high. Therefore, the gain reduces when the headroom voltage is great enough. This point (labeled V

in Figure 27) is internally calculated to ensure that the

DMAX

lower gain still results in ample headroom for all the current sinks. The entire cycle is illustrated in Figure 27.

Note that the gain selection criteria apply only to active current sources. If current sources have been deactivated through an

2

I

C command (for example, only five LEDs are used), then the

voltages on the deactivated current sources are ignored.

Rev. 0 | Page 13 of 52

ADP8860

V

0

VOUT > V

WAIT

100µs (TYP)

WAIT

100µs (TYP)

STATUP: CHARGE

TO V

IN

OUT(START)

OUT

STBY

EXIT

STARTUP

G = 1

G = 3/2

G = 2

NOTES

1.

IS THE CALCULATED GAIN DOWN TRANSITI ON POINT.

DMAX

EXIT STBY

1

100µs (TYP)

1

Figure 27. State Diagram for Automatic Gain Selection

Soft Start Feature

At startup (either from UVLO activation or fault/standby recovery), the output is first charged by I until it reaches about 92% of V

. This soft start feature reduces

IN

(3.75 mA typical)

SS

the inrush current that is otherwise present when the output capacitance is initially charged to V

. When this point is

IN

reached, the controller enters 1× mode. If the output voltage is not sufficient, then the automatic gain selection determines the optimal point as defined in the Automatic Gain Selection section.

OPERATING MODES

There are four different operating modes: active, standby, shutdown, and reset.

Active Mode

In active mode, all circuits are powered up and in a fully operational state. This mode is entered when nSTBY (in Register MDCR) is set to 1.

Standby Mode

Standby mode disables all circuitry except for the I2C receivers. Current consumption is reduced to less than 1 A. This mode is entered when nSTBY is set to 0 or when the nRST pin is held low for more than 100 s (maximum). When standby is exited, a soft start sequence is performed.

0

MIN (V

1

D1:D7

MIN (V

) < V

D1:D7

HR(UP)

) < V

0

) < V

HR(UP)

DMAX

0

MIN (V

0

D1:D7

) > V

DMAX

07967-012

Shutdown Mode

Shutdown mode disables all circuitry, including the I2C receivers. Shutdown occurs when V When V

rises above V

IN

is below the undervoltage thresholds.

IN

(2.05 V typical), all registers are

IN(START)

reset and the part is placed into standby mode.

Reset Mode

In reset mode, all registers are set to their default values and the part is placed into standby. There are two ways to reset the part: power-on reset (POR) and the nRST pin. POR is activated anytime that the part exits shutdown mode. After a POR sequence is complete, the part automatically enters standby mode.

After startup, the part can be reset by pulling the nRST pin low. As long as the nRST pin is low, the part is held in a standby state

2

but no I

C commands are acknowledged (all registers are kept at their default values). After releasing the nRST pin, all registers remain at their default values, and the part remains in standby; however, the part does accept I

2

C commands.

The nRST pin has a 50 s (typical) noise filter to prevent inadvertent activation of the reset function. The nRST pin must be held low for this entire time to activate reset.

The operating modes function according to the timing diagram in Figure 28.

Rev. 0 | Page 14 of 52

ADP8860

SHUTDOWN

V

nSTBY

nRST

IN

VIN CROSSES ~2.05V AND TRIGG ERS POWER O N RESET

BIT nSTBY IN REGISTER MDCR GOES HIGH

~100µs DELAY BET WEEN POWER UP AND

2

C COMMANDS CAN BE RECEIV ED

WHEN I

25µs TO 100µ s NOISE F ILTE R

nRST MUST BE HIGH FO R 20µs (MAX) BEFORE SENDING I

nRST IS LOW, WHICH FORCES nSTBY LOW AND RESETS ALL I

2

C COMMANDS

2

C REGISTERS

V

OUT

V

IN

~3.75mA CHARGES V

TO VIN LEVEL

OUT

1×

10µs 100µs

1.5×

2×

GAIN CHANGES ONLY OCCUR WHEN NECESSARY, BUT HAVE A MIN TI ME BEFORE CHANGING

SOFT STARTSOFT START

7967-013

Figure 28. Typical Timing Diagram

Rev. 0 | Page 15 of 52

ADP8860

BACKLIGHT OPERATING LEVELS

Backlight brightness control operates in three distinct levels: daylight (L1), office (L2), and dark (L3). The BLV bits in Register 0x04 control the specific level in which the backlight operates. These bits can be changed manually, or if in automatic mode (CMP_AUTOEN is set high in Register 0x01), by the ambient light sensor (see the Ambient Light Sensing section).

DAYLIGHT (L1) O FFICE ( L2) DARK (L 3)

30mA

DAYLIGHT_M AX

OFFICE _MAX

HT CURRENT

DAYLIGHT_DIM

BACKLIG

0

BACKLIGHT O PERATING LEVEL S

Figure 29. Backlight Operating Levels

By default, the backlight operates at daylight level (BLV = 00), where the maximum brightness is set using Register 0x09 (BLMX1). A daylight dim setting can also be set using Register 0x0A (BLDM1). When operating at office level (BLV =

01), the backlight maximum and dim brightness settings are set by Register 0x0B (BLMX2) and Register 0x0C (BLDM2). When operating at the dark level (BLV = 10), the backlight maximum and dim brightness settings are set by Register 0x0D (BLMX3) and Register 0x0E (BLDM3).

DARK_MAX

OFFICE_DIM

DARK_DIM

07967-014

Rev. 0 | Page 16 of 52

ANALOG DEVICES ADP8860 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

TYPICAL OPERATING CIRCUIT

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

I2C TIMING DIAGRAM

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

ESD CAUTION

MAXIMUM TEMPERATURE RANGES

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

THEORY OF OPERATION

POWER STAGE

Automatic Gain Selection

Soft Start Feature

OPERATING MODES

Active Mode

Standby Mode

Shutdown Mode

Reset Mode

BACKLIGHT OPERATING LEVELS