Efficient asynchronous boost converter for driving up to
6 white LEDs
2.7 V to 5.5 V input voltage range
128 programmable backlight LED current levels (30 mA
maximum)
Ambient light sensing with autonomous backlight
adjustment
Programmable backlight fade-in/fade-out times
Programmable backlight dim and off times
8 configurable GPIO pins (input, output, up to 4 × 4 keypad)
Up to 3 auxiliary LED current sinks (1 dedicated, 2 configurable)
64 programmable auxiliary LED current levels (14 mA
maximum)
Programmable auxiliary LED fade-in/fade-out times
Programmable auxiliary LED on and off times (allows
blinking)
2
I
C-compatible serial interface
Interrupt line for signaling an external processor (nINT)
Hard reset (nRST)
Current limit protection
Thermal overload protection
Available in small 4.0 mm × 4.0 mm, 24-lead LFCSP package
I/O RAIL
10kΩ
TYPICAL OPERATING CIRCUIT
VBAT
10kΩ
1µF
1
21
16
2.2kΩ
2.2kΩ
5
4
3
15
1µF
4.7µH
2SW22
PGND
VBAT
VDDIO
SCL
SDA
nINT
nRST
13R36R27R18R09C010C111C212
BST
ADP5520
I/O
I/O
ABCD
EFGH
Figure 1.
ADP5520
23
BL_SNK
GND
GND
GND
CMP_IN
ILED
14
VBAT
20
19
18
24
17
CAP_OUT
C3
1µF
100nF
VBAT
7445-001
APPLICATIONS
Display backlight driver for phones that require slider or flip
keypad functions with single or multiple LED indicators
GENERAL DESCRIPTION
The ADP5520 is a versatile single-chip, white LED backlight
driver with a user configurable I/O expander. This device fits
handset applications where the flip or slider section of the phone
requires backlighting, I/O signaling and detecting, auxiliary LED
lighting, and keypad functions. By incorporating an I
compatible serial interface and a single line interrupt, the
ADP5520 significantly reduces the total number of lines
required to interface with the baseband processor across the
hinge flex.
2
C®-
The ADP5520 can detect ambient light levels and adjust the
backlight brightness accordingly, resulting in extended battery
operation.
Once configured, the ADP5520 is capable of controlling the
flip/slider backlight intensity, on/off timing, dimming, and
fading without the intervention of the main processor, which
results in valuable battery power saving.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital inputs.
6
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital inputs, with debounce enabled.
7
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital outputs.
8
C3 and R3 are configured as digital inputs with pull-up.
9
C0, C1, C2, C3, R0, R1, R2, and R3 are configured as digital inputs with pull-up.
2.7 5.5 V
BAT
1.8 3.32 V
VDDIO
VBAT falling 1.7 2.1 V
VBAT
VBAT rising 2.4 2.7 V
VBAT
VDDIO falling 1.1 1.3 V
VDDIO
VDDIO rising 1.4 V
VDDIO
0.1 1 A
LEAKAGE
VDDIO = 0 V 0.1 1 A
SD
1.8 V ≤ VDDIO ≤ 3.3 V2,
STNBY
25 45 A
nSTNBY = 0
0.7 1 1.2 mA
FULLSCALE
1.8 V ≤ VDDIO ≤ 3.3 V2 0.1 1 µA
I-LEAKAGE
50 75 100 µs
IL-DBNC
= 1 mA 0.4 V
SINK
= 1 mA VDDIO − 0.2 V
SOURCE
= 1 mA 0.4 V
SINK
1.8 V ≤ VDDIO ≤ 3.3 V2 0.1 1 µA
OH-LEAKAGE
Sink disabled 0.1 1 µA
LEAKAGE
Applied pin voltage = 1 V 10.5 14 16.5 mA
FULLSCALE
T
HYS
falling 10 °C
J
= 25⁰C, VBAT = 3.6 V.
A
Rev. 0 | Page 3 of 40
ADP5520
www.BDTIC.com/ADI
I2C TIMING SPECIFICATIONS
Table 2.
Parameter Description Min Max Unit
Delay from Reset Deassertion to I2C Access 60 s
f
SCL clock frequency 400 kHz
SCL
t
SCL high time 0.6 s
HIGH
t
SCL low time 1.3 s
LOW
t
Data setup time 100 ns
SU, DAT
t
Data hold time 0 0.9 s
HD, DAT
t
Setup time for repeated start 0.6 s
SU, STA
t
Hold time for start/repeated start 0.6 s
HD, STA
t
Bus free time for stop and start condition 1.3 s
BUF
t
Setup time for stop condition 0.6 s
SU, STO
tR Rise time for SCL and SDA 20 + 0.1 CB 300 ns
tF Fall time for SCL and SDA 20 + 0.1 CB 300 ns
tSP Pulse width of suppressed spike 0 50 s
1
C
Capacitive load for each bus line 400 pF
B
1
CB is the total capacitance of one bus line in picofarads.
SDA
t
t
LOW
SCL
S
S = START CONDI TION
Sr = REPEATED START CONDITION
P = STOP CO NDITION
t
R
t
HD, DAT
t
SU, DAT
t
HIGH
Figure 2. I
t
F
t
F
t
SU, STA
2
C Interface Timing Diagram
SrPS
t
HD, STA
t
SP
t
SU, STO
BUF
t
R
07445-002
Rev. 0 | Page 4 of 40
ADP5520
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
VBAT to GND −0.3 V to +6 V
VDDIO to GND −0.3 V to VBAT
SW, BST to GND −0.3 V to +30 V
ILED, R0, R1, R2, R3, C0, C1, C2, C3, CMP_IN,
−0.3 V to +6 V
SCL, SDA, nINT, nRST, CAP_OUT, BL_SNK
to GND
PGND to GND −0.3 V to +0.3 V
Operating Ambient Temperature Range −40°C to +85°C1
Operating Junction Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Soldering Conditions JEDEC J-STD-020
1
In applications where high power dissipation and poor thermal resistance
are present, the maximum ambient temperature may have to be derated.
Maximum ambient temperature (T
operating junction temperature (T
dissipation of the device (PD
resistance of the part/package in the application (θ
equation: T
A(MAX)
= T
J(MAXOP)
(MAX)
− (θJA × P
) is dependent on the maximum
A(MAX)
= 125°C), the maximum power
J(MAXOP)
), and the junction-to-ambient thermal
).
D(MAX)
), using the following
JA
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type θJA Unit
24-Lead LFCSP (CP-24-2) 50 °C/W
ESD CAUTION
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all other voltages are
referenced to GND.
Rev. 0 | Page 5 of 40
ADP5520
www.BDTIC.com/ADI
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VBAT
BST
BL_SNK
GND
CAP_OUT
GND
20
19
21
22
23
24
PIN 1
INDICATOR
1PGND
2SW
3nINT
ADP5520
4SDA
TOP VIEW
5SCL
(Not to Scal e)
6R2
9
7
8
R0
C0
NOTES
1. EXPOSED PAD MUST BE CONNE CTED
TO GROUND.
R1
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1 PGND Power Switch Output to Ground.
2 SW Power Switch Input.
3 nINT Processor Interrupt. This pin is active low, open drain, and should be pulled up to VDDIO.
4 SDA I2C-Compatible Serial Data Line. Open drain requires external pull-up to VDDIO.
5 SCL I2C-Compatible Serial Clock Line. Open drain requires external pull-up to VDDIO.
6 R2 Row 2 when configured in a keypad matrix, D2 when configured as an I/O.
7 R1 Row 1 when configured in a keypad matrix, D1 when configured as an I/O.
8 R0 Row 0 when configured in a keypad matrix, D0 when configured as an I/O.
9 C0 Column 0 when configured in a keypad matrix, D4 when configured as an I/O.
10 C1 Column 1 when configured in a keypad matrix, D5 when configured as an I/O.
11 C2 Column 2 when configured in a keypad matrix, D6 when configured as an I/O.
12 C3 Column 3 when configured in a keypad matrix, D7 when configured as an I/O, LED 2 when configured as a current sink.
13 R3 Row 3 when configured in a keypad matrix, D3 when configured as an I/O, LED 3 when configured as a current sink.
14 ILED LED 1 Current Sink.
15 nRST
Reset Input, Active Low. This input signal resets the device to the power-up default conditions. Must be driven low
for 75 µs (typical) to be valid.
16 VDDIO
Supply Voltage for the I/O Pins. Voltage is 1.8 V to 3.3 V (or VBAT, whichever is smaller). If VDDIO = 0, the device goes
into full shutdown mode.
17 CMP_IN Input for Ambient Light Sensing.
18 GND Ground.
19 GND Ground.
20 CAP_OUT
Capacitor for Internal 2.7 V LDO. A 1 F capacitor must be connected between this pin and GND. Do not use this
pin to supply external loads.
21 VBAT Main Supply Voltage for the IC (2.7 V to 5.5 V).
22 BST Overvoltage Monitor Input for the Boost Converter.
23 BL_SNK Backlight Current Sink.
24 GND Ground.
18 G ND
17 CMP_IN
16 V DDIO
15 n RST
14 ILE D
13 R3
Figure 5. Efficiency vs. Backlight Current (4, 5, and 6 LEDS)
90
85
80
75
70
65
60
EFFICIE NCY (%)
55
50
45
40
024681012141618202224262830
BACKLIGHT CURRENT (mA)
6 LEDs, VBAT = 4.2V
6 LEDs, VBAT = 4.2V,
AUTOLOAD-ENABLED
Figure 6. Efficiency vs. Backlight Current (Autoload On/Off)
16
14
12
10
8
6
4
2
AUX LED FULL -SCALE SINK CURRENT (mA)
0
00.51.01.52.02.53.0
07445-048
AUX LED PIN VO LTAGE (V)
07445-051
Figure 8. Typical Auxiliary LED Pin (R3, C3, or ILED), Full-Scale Sink Current vs.
Applied Pin Voltage
07445-049
Rev. 0 | Page 7 of 40
ADP5520
www.BDTIC.com/ADI
SW
1
INDUCTOR CURRENT
2
BST
BL_SNK
3
4
CH1 20.0V
CH3 10.0V
CH2 500mA
CH4 1.0V
Figure 9. Boost Operation (Backlight = 30 mA)
SW
1
INDUCTOR CURRENT
2
BST
TIME (4µs/DIV)
SW
1
INDUCTOR CURRENT
2
BST
BL_SNK
3
4
CH1 20.0V
07445-052
CH3 10.0V
CH2 500mA
CH4 1.0V
TIME (4µs/DIV)
07445-054
Figure 11. Boost Operation (Backlight = 2 mA)
SW
1
INDUCTOR CURRENT
2
BST
BL_SNK
3
4
CH1 20.0V
CH3 10.0V
CH2 500mA
CH4 1.0V
Figure 10. Boost Operation (Backlight = 15 mA)
TIME (4µs/DIV)
07445-053
3
4
BL_SNK
CH1 10.0V
CH3 10.0V
CH2 500mA
CH4 1.0V
TIME (1ms/DIV)
Figure 12. Boost Startup
07445-055
Rev. 0 | Page 8 of 40
ADP5520
www.BDTIC.com/ADI
THEORY OF OPERATION
VBAT
1µF
4.7µH
1µF
PGND
VBAT
VDDIO
CAP_OUT
1µF
SCL
SDA
nINT
nRST
1
21
16
20
5
4
3
15
GND GND GND
2
POR
INTERFACE
ADP5520
191824
SW
I-LIMIT
BOOST
CONTROL
IN
EN
LDO
OUT
2.7V
BIAS/CLOCK
I/O CONF IG
GPIO/KEYPAD
6R27R18R09C010C111
27V
THERMAL S/D
Figure 13. Internal Block Diagram
The ADP5520 is a backlight white LED driver with an I/O port
expander. It is ideal for cell phone designs and other portable
devices, where keypad and/or extended I/O functionality is
needed. Programmable fade-in, fade-out, dim, and off timers
provide the backlight with flexible control features. Using an
external photodiode, the ADP5520 can perform ambient light
sensing, and adjust the backlight brightness according to
varying lighting conditions.
The I/O port expander has eight configurable GPIO pins. The
I/Os can be configured as a keypad matrix, digital inputs, or
digital outputs. Additionally, two of the I/Os (R3 and C3) can be
configured as current sink lines and, paired with a dedicated
sink line (ILED), can be used to drive up to three auxiliary LEDs.
Programmable fading is also available for auxiliary LEDs.
Once programmed through its I
2
C-compatible interface, the
ADP5520 can run autonomously. An interrupt line (nINT) is
available to alert an external microprocessor of the status of its
I/Os, keypad presses and releases, ambient light sensor comparator
states, and overvoltage conditions.
BSTBL_SNK
22
AUTO
LOAD
OVP
STATE MACHINE
REGISTER MAP
INTERRUPT/ RESET
CONTROL
13
R3
C2
FB
BACKLIGHT
CURRENT
CONTROL
12
C3
ILED
14
BACKLIGHT DRIVE AND CONTROL
White LEDs are common in backlighting the displays of modern
portable devices such as cell phones. White LEDs require a high
forward voltage, V
Display panels, depending on their size, can be backlit with
single or multiple white LEDs. In panels that require multiple
LEDs, the LEDs are commonly connected in a series string to
achieve uniform brightness in each LED by passing a common
current through all of them. The LED string needs to be biased
with a voltage greater than the sum of the V
before it conducts.
The ADP5520 is an asynchronous boost converter capable of
driving an LED string with 24.5 V (minimum). For detailed
information about the boost device, see the Applications
Information section. With sufficient forward voltage created,
the ADP5520 controls the current (and thus the brightness)
of the LED string via an adjustable internal current sink. An
internal state machine, in conjunction with programmable
timers, dynamically adjusts the current sink between 0 mA
and 30 mA to achieve impressive backlight control features.
23
0.65V
VBAT
100nF
07445-004
of each LED
F
LIGHT
SENSOR
LED
CURRENT
CONTROL
, before they conduct current and emit light.
F
17
CMP_IN
Rev. 0 | Page 9 of 40
ADP5520
A
Y
www.BDTIC.com/ADI
BACKLIGHT MAXIMUM AND DIM SETTINGS
The backlight maximum and dim current settings are determined by a 7-bit code programmed by the user into the registers
listed in the Backlight Operating Levels section. This 7-bit
resolution allows the user to set the backlight to 1 of 128
different levels between 0 mA and 30 mA. The ADP5520 can
implement two distinct algorithms to achieve a linear and a
nonlinear relationship between input code and backlight
current. The BL_LAW bits in Register 0x02 are used to swap
between algorithms.
By default, the ADP5520 uses a linear algorithm (BL_LAW =
00), where backlight current increases linearly for a corresponding increase of input code. Backlight current (in mA) is determined
by the following equation:
Backlight Current = Code × (Fullscale_Current/127) (1)
where:
Code is the input code programmed by the user.
Fullscale_Current is the maximum sink current allowed
(typically 30 mA).
The ADP5520 can also implement a nonlinear (square approximation) relationship between input code and backlight current level.
In this case (BL_LAW = 01), the backlight current (in mA) is
determined by the following equation:
2
⎞
⎟
⎟
⎠
07445-007
Backlight Current =
⎛
⎜
×
Code (2)
⎜
⎝
127
CurrentFullscale
_
Figure 16 shows the backlight current level vs. input code for
both the linear and square law algorithms.
30
25
20
15
10
BACKLIGHT CURRENT (mA)
5
0
0326496128
LINEAR
SQUARE
SINK CODE
Figure 16. Backlight Current vs. Sink Code
DAYLIGHT_MAX
DAYLIGHT_DIM
OFFICE_MAX
OFFICE_DIM
DARK_MAX
DARK_DIM
BL_LVL
MUX
BST
BL_OFFT
BL_DIMT
BL_FI
BL_FO
BL_VALUE
COUNTERS
AND
CONTROL
LOGIC
BL_SNK
BL_EN
DIM_EN
BL_LAW
CLOCK
GENERATOR
Figure 14. Backlight Brightness Control
BACKLIGHT OPERATING LEVELS
Backlight brightness control can operate in three distinct levels:
daylight (L1), office (L2), and dark (L3). The BL_LVL bits in
Register 0x02 control the level in which the backlight operates.
The BL_LVL bits can be changed manually, or if in automatic
mode, by the ambient light sensor (see the Ambient Light Sensing
section). By default, the backlight operates at daylight level
(BL_LVL = 00), where the maximum brightness is set using
Register 0x05 (DAYLIGHT_MAX). A daylight dim setting can
also be set using Register 0x06 (DAYLIGHT_DIM). When operating at office level (BL_LVL = 01), the backlight maximum and
dim brightness settings are set by Register 0x07 (OFFICE_MAX)
and Register 0x08 (OFFICE_DIM). When operating at dark
level (BL_LVL = 10), the backlight maximum and dim brightness
settings are set by Register 0x09 (DARK_MAX) and Register 0x0A
(DARK_DIM).
D
30mA
BACKLIGHT CURRENT
0
LIGHT ( L1)OFFICE (L2)DARK (L3)
DAYLIGHT_MAX
OFFICE_MAX
DARK_MAX
DAYLIGHT_DIM
OFFICE_DIM
DARK_DIM
BACKLIGHT OPERATING LEVELS
Figure 15. Backlight Operating Levels
07445-005
07445-006
Rev. 0 | Page 10 of 40
ADP5520
www.BDTIC.com/ADI
BACKLIGHT TURN ON/OFF/DIM
With the device in operating mode (nSTNBY = 1), the backlight
can be turned on using the BL_EN bit in Register 0x00. Before
turning on the backlight, the user should choose which level
(daylight (L1), office (L2), or dark (L3)) to operate in, and ensure
that maximum and dim settings are programmed for that level.
The backlight turns on when BL_EN = 1. The backlight turns
off when BL_EN = 0.
BACKLIGHT
CURRENT
MAX
AUTOMATIC DIM AND TURN OFF TIMERS
The user can program the backlight to dim automatically by
using the BL_DIMT timer in Register 0x03. The dim timer has
15 settings ranging from 10 sec to 2 min. The user should
program the dim timer before turning on the backlight. If
BL_EN = 1, the backlight turns on to its maximum setting, and
the dim timer starts counting. When the dim timer expires, the
internal state machine sets DIM_EN = 1, and the backlight goes
to its dim setting.
BACKLIGHT
CURRENT
MAX
DIM
DIM TIME R
RUNNING
DIM TIMER
RUNNING
BL_EN = 1BL_EN = 0
Figure 17. Backlight Turn On/Off
07445-008
While the backlight is on (BL_EN = 1), the user can make it
change to a dim setting by programming DIM_EN = 1 in
Register 0x00. If DIM_EN = 0, the backlight reverts to its
maximum setting.
BACKLIGHT
CURRENT
MAX
DIM
BL_EN = 1
Figure 18. Backlight Turn On/Dim/Off
DIM_EN = 1 DIM_EN = 0 BL_EN = 0
07445-009
The maximum and dim settings can be set between 0 mA and
30 mA; therefore, it is possible to program a dim setting that is
greater than a maximum setting. For normal expected operation,
users should ensure that the dim setting is programmed to be less
than the maximum setting.
It is also possible to activate the backlight automatically when a
key press is detected. With the row and column pins configured as
a keypad matrix, and the KP_BL_EN bit asserted in Register 0x02,
the internal state machine asserts BL_EN and turns on the backlight if a key is pressed. See the I/O Expansion Pins (Keypad
Matrix) section for more information on using keypad
functionality.
BL_EN = 1
SET BY USER
SET BY INTERNAL STATEMACHINE
Figure 19. Dim Timer
BL_EN = 1
OR
DIM_EN = 1
BL_EN = 0DIM_EN = 1DIM_EN = 0
If the user clears the DIM_EN bit (or reasserts the BL_EN bit),
the backlight reverts to its maximum setting and the dim timer
begins counting again. When the dim timer expires, the internal
state machine again sets DIM_EN = 1, and the backlight goes to
its dim setting. Reasserting BL_EN at any point during the dim
timer countdown causes the timer to reset and begin counting
again. The backlight can be turned off at any point during the
dim timer countdown by clearing BL_EN.
The user can also program the backlight to turn off automatically by using the BL_OFFT timer in Register 0x03. The off
timer has 15 settings ranging from 10 sec to 2 min. The user
should program the off timer before turning on the backlight.
If BL_EN = 1, the backlight turns on to its maximum setting,
and the off timer starts counting. When the off timer expires,
the internal state machine clears the BL_EN bit, and the
backlight turns off.
BACKLIGHT
CURRENT
MAX
OFF TIMER
RUNNING
07445-010
Rev. 0 | Page 11 of 40
SET BY USER
SET BY INTERNAL STATE MACHINE
BL_EN = 1 BL_EN = 0
Figure 20. Off Timer
07445-011
ADP5520
A
www.BDTIC.com/ADI
Reasserting BL_EN at any point during the off timer countdown
causes the timer to reset and begin counting again. The backlight
can be turned off at any point during the off timer countdown
by clearing BL_EN.
The dim timer and off timer can be used together for sequential
maximum-to-dim-to-off functionality. With both the dim and
off timers programmed, if BL_EN is asserted, the backlight turns
on to its maximum setting. When the dim timer expires, the
backlight changes to its dim setting. When the off timer expires,
the backlight turns off.
BACKLIGHT
CURRENT
MAX
DIM
SET BY USER
SET BY INTERNAL STATE MACHINE
DIM TIMER
RUNNING
OFF TIMER
RUNNING
BL_EN = 1BL _EN = 0DIM_EN = 1
Figure 21. Dim and Off Timers Used Together
LINEAR BACKLIGHT FADE IN AND FADE OUT
To counteract the abrupt visual effect of near instant turn-on
and turn-off of the backlight, the ADP5520 contains timers to
facilitate the smooth fading between off, on, and dim states. By
default (BL_LAW = 00), the ADP5520 implements a fading
scheme using the linear backlight code algorithm (see Equation 1).
The BL_FI timer in Register 0x04 can be used for smooth fade-in
transitions from low to high backlight settings, such as off-to-dim,
off-to-maximum, and dim-to-maximum. The BL_FI timer can be
programmed to one of 15 settings ranging from 0.3 sec to 5.5 sec.
The BL_FI timer should be programmed before asserting BL_EN.
30.0
27.5
25.0
22.5
20.0
17.5
15.0
12.5
10.0
7.5
BACKLIGHT CURRENT (mA)
5.0
2.5
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
FADE-IN TIME (s)
Figure 22. Linear Fade-In Times
0.3 SEC
0.6 SEC
0.9 SEC
1.2 SEC
1.5 SEC
1.8 SEC
2.1 SEC
2.4 SEC
2.7 SEC
3.0 SEC
3.5 SEC
4.0 SEC
4.5 SEC
5.0 SEC
5.5 SEC
07445-013
Rev. 0 | Page 12 of 40
07445-012
The time programmed in BL_FI represents the time it takes the
backlight current to go from 0 mA to 30 mA. Fading between
intermediate settings is shorter.
The BL_FO timer in Register 0x04 can be used for smooth fadeout transitions from high to low backlight settings such as
maximum-to-dim and dim-to-off. The BL_FO timer can be
programmed to one of 15 settings ranging from 0.3 sec to 5.5 sec.
The BL_FO timer should be programmed before asserting BL_EN.
30.0
27.5
25.0
22.5
20.0
17.5
15.0
12.5
10.0
7.5
BACKLIGHT CURRENT (mA)
5.0
2.5
0
0 0.51.01.52.02.53.03.54.04.55.05.5
FADE-OUT TI ME (s)
Figure 23. Linear Fade-out Times
0.3 SEC
0.6 SEC
0.9 SEC
1.2 SEC
1.5 SEC
1.8 SEC
2.1 SEC
2.4 SEC
2.7 SEC
3.0 SEC
3.5 SEC
4.0 SEC
4.5 SEC
5.0 SEC
5.5 SEC
07445-014
The time programmed in BL_FO represents the time it takes
the backlight current to go from 30 mA to 0 mA. Fading
between intermediate settings is shorter.
Figure 24 shows the fade timers in use. With BL_FI and BL_FO
programmed, if BL_EN is asserted, then the backlight fades in
to its maximum setting. If DIM_EN is asserted, then the backlight
fades out to its dim setting. If BL_EN is cleared, the backlight
fades out to off.
F
BACKLIGHT
CURRENT
FADE -IN
OFF-TO-MAX
MAX
DIM
BL_EN = 1BL_EN = 0BL_EN = 0BL_EN = 0
DIM_EN = 1
SET BY USER
DE-OUT
MAX-TO-DIM
FADE-OUT
DIM-TO-OF F
FADE-OUTFADE-I N
FADE -OU TFADE-IN
BL_EN = 1BL_EN = 1
Figure 24. Backlight Turn On/Off/Dim with Fade Timers
During any point in a fade-out, if BL_EN is asserted, then the
backlight stops at its current fade-out position and begins
fading in.
The fade-in and fade-out timers can be used independently of each
other, that is, fade-in can be enabled while fade-out is disabled.
The fade timers can also be used with the off and dim timers.
07445-015
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