ANALOG DEVICES ADP5037 Service Manual

Dual 3 MHz, 800 mA Buck

Data Sheet

FEATURES

Main input voltage range: 2.3 V to 5.5 V
Two 800 mA buck regulators and two 300 mA LDOs
24-lead, 4 mm × 4 mm LFCSP package
Regulator accuracy: ±3%
Factory programmable or external adjustable VOUTx
3 MHz buck operation with forced PWM and auto PWM/PSM

modes
BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V
LDO1/LDO2: output voltage range from 0.8 V to 5.2 V
LDO1/LDO2: input supply voltage from 1.7 V to 5.5 V
LDO1/LDO2: high PSRR and low output noise

APPLICATIONS

Power for processors, ASICS, FPGAs, and RF chipsets
Portable instrumentation and medical devices
Space constrained devices

GENERAL DESCRIPTION

The ADP5037 combines two high performance buck regulators
and two low dropout (LDO) regulators in a small, 24-lead 4 mm ×

Regulators with Two 300 mA LDOs

ADP5037

4 mm LFCSP to meet demanding performance and board space
requirements.

The high switching frequency of the buck regulators enables tiny
multilayer external components and minimizes the board space.
When the MODE pin is set high, the buck regulators operate in
forced PWM mode. When the MODE pin is set low and the
load is above a predefined threshold, the buck regulators
operate in PWM mode. When the load current falls below a
predefined threshold, the regulator operates in power save
mode (PSM), improving the light-load efficiency.

The two bucks operate out of phase to reduce the input capaci­tor requirement. The low quiescent current, low dropout voltage,
and wide input voltage range of the ADP5037 LDOs extend the
battery life of portable devices. The ADP5037 LDOs maintain
power supply rejection greater than 60 dB for frequencies as
high as 10 kHz while operating with a low headroom voltage.

Regulators in the ADP5037 are activated though dedicated
enable pins. The default output voltages can be externally set in
the adjustable version or factory programmable to a wide range
of preset values in the fixed voltage version.

TYPICAL APPLICATION CIRCUIT

AVIN

0.1µF

C1

4.7µF

C2

ON

1µF

ON

1µF

AVIN

VIN1

EN1

VIN2

EN2

EN3

VIN3

C3

EN4

VIN4

C4

C

2.3V TO

5.5V

OFF

4.7µF

1.7V TO

5.5V

OFF

HOUSEKEEPING

EN1

EN2

EN3

(ANALOG)

EN4

(DIGITAL)

ADP5037

BUCK1

MODE

MODE

BUCK2

LDO1

LDO2

AGND

Figure 1.

VOUT1

SW1
FB1

PGND1

MODE
VOUT2

SW2
FB2

PGND2
VOUT3

FB3

VOUT4
FB4

L1 1µH

R1

R2

PWM

L2 1µH

R3

R4

R5

R6

R7

R8

C5
10µF

PSM/PWM

C6
10µF

C7
1µF

C8
1µF

V

OUT1

800mA

V

OUT2

800mA

V

OUT3

300mA

V

OUT4

300mA

AT

AT

AT

AT

09887-001

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2011-2012 Analog Devices, Inc. All rights reserved.

ADP5037 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1 

General Description ......................................................................... 1

Typical Application Circuit ............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

General Specifications ................................................................. 3

BUCK1 and BUCK2 Specifications ........................................... 4

LDO1 and LDO2 Specifications ................................................. 4

Input and Output Capacitor, Recommended Specifications .. 5

Absolute Maximum Ratings ............................................................ 6

Thermal Resistance ...................................................................... 6

ESD Caution .................................................................................. 6

Pin Configuration and Function Descriptions ............................. 7

Typical Performance Characteristics ............................................. 8

Power Dissipation and Thermal Considerations ....................... 15

Buck Regulator Power Dissipation .......................................... 15

Junction Temperature ................................................................ 16

Theory of Operation ...................................................................... 17

Power Management Unit ........................................................... 17

BUCK1 and BUCK2 .................................................................. 19

LDO1 and LDO2 ........................................................................ 20

Applications Information .............................................................. 21

Buck External Component Selection ....................................... 21

LDO External Component Selection ...................................... 23

PCB Layout Guidelines .................................................................. 24

Typical Application Schematics .................................................... 25

Bill of Materials ............................................................................... 26

Outline Dimensions ....................................................................... 27

Ordering Guide .......................................................................... 27

REVISION HISTORY

1/12—Rev. 0 to Rev. A

Changes to Features Section and Figure 1 ..................................... 1

Changes to Table 2 and Table 3 ....................................................... 4

Changes to Table 4 ............................................................................ 5

Changes to Table 5 ............................................................................ 6

Changes to Table 7 ............................................................................ 7

Changes to Figure 34 ...................................................................... 13

Changes to Buck Regulator Power Dissipation Section ............ 15

Changes to Undervoltage Lockout Section ................................. 18

Changes to LDO1 and LDO2 Section ......................................... 20

Changes to Table 9 .......................................................................... 22

Changes to Figure 52 and Figure 53 ............................................. 25

Changes to Ordering Guide .......................................................... 27

8/11—Revision 0: Initial Version

Rev. A | Page 2 of 28

Data Sheet ADP5037

High UVLO Input Voltage Falling

UVLO

3.1

V

SPECIFICATIONS

GENERAL SPECIFICATIONS

V

= V

= V

AVI N

IN1

= 2.3 V to 5.5 V; V

IN2

25°C for typical specifications, unless otherwise noted.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT VOLTAGE RANGE V
THERMAL SHUTDOWN

Threshold TSSD TJ rising 150 °C

Hysteresis TS

START-UP TIME1

BUCK1, LDO1, LDO2 t

BUCK2 t

EN1, EN2, EN3, EN4, MODE INPUTS

Input Logic High VIH 1.1 V

Input Logic Low VIL 0.4 V

Input Leakage Current V

INPUT CURRENT

All Channels Enabled I

All Channels Disabled I

VIN1 UNDERVOLTAGE LOCKOUT

High UVLO Input Voltage Rising UVLO

Low UVLO Input Voltage Rising UVLO

Low UVLO Input Voltage Falling UVLO

1

Start-up time is defined as the time from EN1 = EN2 = EN3 = EN4 from 0 V to V

times are shorter for individual channels if another channel is already enabled. See the Typical Performance Characteristics section for more information.

IN3

= V

= 1.7 V to 5.5 V; TJ = −40°C to +125°C for minimum/maximum specifications, and TA =

IN4

, V

, V

AVIN

SD-HYS

STA RT1

STA RT2

I-LEAKAGE

STBY-NOSW

SHUTDOWN

2.3 5.5 V

IN1

IN2

20 °C

250 µs
300 µs

0.05 1 µA

No load, no buck switching 108 175 µA

TJ = −40°C to +85°C 0.3 1 µA

3.9 V

VIN1RISE

VI N1 FAL L

2.275 V

VIN1RISE

1.95 V

VIN1FA LL

to VOUT1, VOUT2, VOUT3, and VOUT4 reaching 90% of their nominal level. Start-up

AVIN

Rev. A | Page 3 of 28

ADP5037 Data Sheet

VOLTAGE FEEDBACK

V

, V

Models with adjustable outputs

0.485

0.5

0.515

V

Current Limit

I

, I

pFET switch peak current limit

1200

1550

1900

mA

Load Regulation3

(∆V

)/∆I

,

I

= I

= 1 mA to 300 mA

0.001

0.003

%/mA

BUCK1 AND BUCK2 SPECIFICATIONS

V

= V

= V

AVI N

IN1

specifications, unless otherwise noted.

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

OUTPUT CHARACTERISTICS

Output Voltage Accuracy ΔV

Line Regulation (∆V

Load Regulation (∆V

OPERATING SUPPLY CURRENT MODE = ground

BUCK1 Only IIN I

BUCK2 Only IIN I

BUCK1 and BUCK2 IIN I

PSM CURRENT THRESHOLD I
SW CHARACTERISTICS

SW On Resistance R
R
R
R

ACTIVE PULL-DOWN R
OSCILLATOR FREQUENCY fSW 2.5 3.0 3.5 MHz

1

All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).

= 2.3 V to 5.5 V; TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical

IN2

OUT1/VOUT1

ΔV

OUT2/VOUT2

OUT1/VOUT1

(∆V

OUT2/VOUT2

OUT1/VOUT1

(∆V

OUT2/VOUT2

FB1

1

,

PWM mode; I

LOAD1

= I

= 0 mA to 800 mA −3 +3 %

LOAD2

)/∆V

,

PWM mode −0.05 %/V

IN1

)/∆V

IN2

OUT1,

OUT2

I

= 0 mA to 800 mA, PWM mode −0.1 %/A

LOAD

= 0 mA, device not switching, all other

LOAD1

44 μA

)/∆I
)/∆I

FB2

channels disabled

= 0 mA, device not switching, all other

LOAD2

55 μA

channels disabled

= I

LOAD1

= 0 mA, device not switching,

LOAD2

67 μA

LDO channels disabled

PSM to PWM operation 100 mA

PSM

V

NFET

V

PFET

V

NFET

V

PFET

LIMIT1

LIMIT2

Channel disabled 75 Ω

PDWN-B

= V

= 3.6 V 155 240 mΩ

IN1

IN2

= V

= 3.6 V 205 310 mΩ

IN1

IN2

= V

= 5.5 V 137 204 mΩ

IN1

IN2

= V

= 5.5 V 162 243 mΩ

IN1

IN2

LDO1 AND LDO2 SPECIFICATIONS

V

= (V

IN3

1 µF; T

Table 3.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT VOLTAGE RANGE V
OPERATING SUPPLY CURRENT

Bias Current per LDO2 I
I
I

Total System Input Current

LDO1 or LDO2 Only I
LDO1 and LDO2 Only I

OUTPUT CHARACTERISTICS

Output Voltage Accuracy

Line Regulation (∆V

+ 0.5 V) or 1.7 V (whichever is greater) to 5.5 V, V

OUT3

= −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.1

J

, V

1.7 5.5 V

IN3

IN4

VIN3BIAS/IVIN4BIAS

IIN

I

OUT3

OUT3

OUT3

Includes all current into AVIN, VIN1, VIN2, VIN3,

= (V

IN4

= I

= 0 µA 10 30 µA

OUT4

= I

= 10 mA 60 100 µA

OUT4

= I

= 300 mA 165 245 µA

OUT4

+ 0.5 V) or 1.7 V (whichever is greater) to 5.5 V; CIN = C

OUT4

and VIN4

= I

OUT3

OUT3

= 0 µA, all other channels disabled 53 µA

OUT4

= I

= 0 µA, buck channels disabled 74 µA

OUT4

ΔV

OUT3/VOUT3

ΔV

OUT4/VOUT4

OUT3/VOUT3

(∆V

OUT4/VOUT4

OUT3/VOUT3

(∆V

OUT4/VOUT4

,

)/∆V
)/∆V

)/∆I

IN3

IN4

OUT3

OUT4

,

100 µA < I

I

= I

OUT3

OUT4

OUT3

OUT4

Rev. A | Page 4 of 28

< 300 mA, 100 µA < I

OUT3

< 300 mA −3 +3 %

OUT4

= 1 mA −0.03 +0.03 %/V

OUT

=

Data Sheet ADP5037

DROPOUT VOLTAGE4

V

V

= V

= 5.2 V, I

= I

= 300 mA

50 mV

100 kHz, V

= 3.3 V, V

= 2.8 V, I

= 1 mA

62 dB

BUCK1, BUCK2 Output Capacitor Ratings

C

, C

10 40

µF

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

V

VOLTAGE FEEDBACK

V
V
V
CURRENT-LIMIT THRESHOLD5 I
ACTIVE PULL-DOWN R
OUTPUT NOISE

Regulator LDO1 NOISE
Regulator LDO2 NOISE

POWER SUPPLY REJECTION

RATIO
Regulator LDO1 10 kH z, V

1 MHz, V

Regulator LDO2 10 kH z, V
100 kHz, V
1 MHz, V

1

All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).

2

This is the input current into VIN3/VIN4, which is not delivered to the output load.

3

Based on an endpoint calculation using 1 mA and 300 mA loads.

4

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only to output voltages

above 1.7 V.

5

Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.

, V

FB3

FB4

DROPOUT

, I

LIMIT3

PDWN-L

335 600 mA

LIMIT4

Channel disabled 600 Ω

10 Hz to 100 kHz, V

LDO1

10 Hz to 100 kHz, V

LDO2

0.485 0.5 0.515 V

OUT3

OUT3

OUT3

OUT3

= V
= V
= V

OUT4

OUT4

OUT4

OUT4

= 3.3 V, I
= 2.5 V, I
= 1.8 V, I

OUT3

OUT3

OUT3

OUT3

= 5 V, V

IN3

= 5 V, V

IN4

OUT4

= I

= 300 mA 75 140 mV

OUT4

= I

= 300 mA 100 mV

OUT4

= I

= 300 mA 180 mV

OUT4

= 2.8 V 100 µV rms

OUT3

= 1.2 V 60 µV rms

OUT4

PSRR

= 3.3 V, V

IN3

IN3

= 3.3 V, V

IN3

= 1.8 V, V

IN4

= 1.8 V, V

IN4

= 1.8 V, V

IN4

OUT3

OUT3

OUT3

OUT4

OUT4

OUT4

= 2.8 V, I

= 2.8 V, I

= 1.2 V, I

= 1.2 V, I

= 1.2 V, I

= 1 mA 60 dB

OUT3

OUT3

= 1 mA 63 dB

OUT3

= 1 mA 54 dB

OUT4

= 1 mA 57 dB

OUT4

= 1 mA 64 dB

OUT4

INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS

TA = −40°C to +125°C, unless otherwise specified.

Table 4.

Parameter Symbol Min Typ Max Unit

NOMINAL INPUT AND OUTPUT CAPACITOR RATINGS

BUCK1, BUCK2 Input Capacitor Ratings C

LDO1 Input and Output Capacitor Ratings C
CAPACITOR ESR R

1

The minimum input and output capacitance should be greater than 0.70 µF over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R- and X5R-type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use because of their poor temperature and dc bias characteristics.

, C

MIN1

MIN1

MIN3

ESR

4.7 40 µF

MIN2

MIN2

, C

1.0 µF

MIN4

0.001 1 Ω

Rev. A | Page 5 of 28

ADP5037 Data Sheet

VIN1, VIN2 to AVIN

−0.3 V to +0.3 V

VOUT3 to AGND

−0.3 V to (VIN3 + 0.3 V)

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter Rating

AVIN to AGND −0.3 V to +6 V

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

PGND1, PGND2 to AGND −0.3 V to +0.3 V
VIN3, VIN4, VOUT1, VOUT2, FB1, FB2,

FB3, FB4, EN1, EN2, EN3, EN4,
MODE to AGND

VOUT4 to AGND −0.3 V to (VIN4 + 0.3 V)
SW1 to PGND1 −0.3 V to (VIN1 + 0.3 V)
SW2 to PGND2 −0.3 V to (VIN2 + 0.3 V)
Storage Temperature Range −65°C to +150°C
Operating Junction Temperature

Range

Soldering Conditions JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

For detailed information on power dissipation, see the Power
Dissipation and Thermal Considerations section.

−0.3 V to (AVIN + 0.3 V)

−40°C to +125°C

Table 6. Thermal Resistance

Package Type θJA θJC Unit

24-Lead, 0.5 mm pitch LFCSP 35 3 °C/W

ESD CAUTION

Rev. A | Page 6 of 28

Data Sheet ADP5037

PIN 1
INDICATOR

NOTES

1. NC = NO CONNE C T. DO NOT CONNECT TO THIS PIN.

2. IT I S RE COMMENDED THAT THE EXPOSED PAD
BE SOLDERED TO THE GROUND PLANE.

1
2
3
4
5
6

15

16

17

18

14
13

7

8

9

11

12

10

21

22

23

24

20

19

ADP5037

TOP VIEW

(Not to S cale)

VOUT4

FB3

VOUT3

VIN3

EN3

VIN4

AGND
AVIN
VIN1
SW1
PGND1
MODE

FB4

EN4
VIN2
SW2

PGND2

NC

EN1

FB1

VOUT1

VOUT2

FB2

EN2

09887-003

11

FB1

BUCK1 Feedback Input. For device models with adjustable output voltage, connect this pin to the middle of the
EPAD (EP)

Exposed Pad. It is recommended that the exposed pad be soldered to the ground plane.

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 2. Pin Configuration—View from the Top of the Die

Table 7. Pin Function Descriptions

Pin No. Mnemonic Description

1 FB4 LDO2 Feedback Input. For device models with adjustable output voltage, connect this pin to the middle of the

LDO2 resistor divider. For device models with fixed output voltage, connect this pin to the top of the capacitor on

VOUT4.
2 EN4 LDO2 Enable Pin. High level turns on this regulator, and low level turns it off.
3 VIN2 BUCK2 Input Supply (2.3 V to 5.5 V). Connect VIN2 to VIN1 and AVIN.
4 SW2 BUCK2 Switching Node.
5 PGND2 Dedicated Power Ground for BUCK2.
6 NC No Connect. Leave this pin unconnected.
7 EN2 BUCK2 Enable Pin. High level turns on this regulator, and low level turns it off.
8 FB2 BUCK2 Feedback Input. For device models with adjustable output voltage, connect this pin to the middle of the

BUCK2 resistor divider. For device models with fixed output voltage, leave this pin unconnected.
9 VOUT2 BUCK2 Output Voltage Sensing Input. Connect VOUT2 to the top of the capacitor on VOUT2.
10 VOUT1 BUCK1 Output Voltage Sensing Input. Connect VOUT1 to the top of the capacitor on VOUT1.

BUCK1 resistor divider. For device models with fixed output voltage, leave this pin unconnected.
12 EN1 BUCK1 Enable Pin. High level turns on this regulator, and low level turns it off.
13 MODE BUCK1/BUCK2 Operating Mode. MODE = high: forced PWM operation. MODE = low: auto PWM/PSM operation.
14 PGND1 Dedicated Power Ground for BUCK1.
15 SW1 BUCK1 Switching Node.
16 VIN1 BUCK1 Input Supply (2.3 V to 5.5 V). Connect VIN1 to VIN2 and AVIN.
17 AVIN Analog Input Supply (2.3 V to 5.5 V). Connect AVIN to VIN1 and VIN2.
18 AGND Analog Ground.
19 FB3 LDO1 Feedback Input. For device models with adjustable output voltage, connect this pin to the middle of the

LDO1 resistor divider. For device models with fixed output voltage, connect this pin to the top of the capacitor on

VOUT3.
20 VOUT3 LDO1 Output Voltage.
21 VIN3 LDO1 Input Supply (1.7 V to 5.5 V).
22 EN3 LDO1 Enable Pin. High level turns on this regulator, and low level turns it off.
23 VIN4 LDO2 Input Supply (1.7 V to 5.5 V).
24 VOUT4 LDO2 Output Voltage.

Rev. A | Page 7 of 28

ADP5037 Data Sheet

0

20

40

60

80

100

120

140

2.3 2.8 3.3 3.8 4.3 4.8 5.3
INPUT VOLTAGE (V)

QUIESCENT CURRENT (µA)

09887-039

4

1

3

T

2

CH1 2.00V

B

W

CH4 5.00V

B

W

M 40.0µs A CH3 2.2V

T 11.20%

CH2 50.0mA Ω

B

W

CH3 5.00V

B

W

SW

IOUT

VOUT

EN

09887-049

4

1

3

T

2

CH1 2.00V

CH4 5.00V

M 40.0µs A CH3 2.2V

T 11.20%

B

W

CH2 50.0mA Ω

B

W

B

W

CH3 5.00V

B

W

SW

IOUT

VOUT

EN

09887-048

3.25

3.27

3.29

3.31

3.33

3.35

0 0.2 0.4 0.6 0.8 1.0 1.2

V

OUT

(V)

I

OUT

(A)

VIN = 3.6V, +85°C

VIN = 3.6V, +25°C

V

IN

= 3.6V, –40° C

09887-025

1.764

1.784

1.804

1.824

1.844

1.864

0 0.2 0.4 0.6 0.8 1.0 1.2

V

OUT

(V)

I

OUT

(A)

VIN = 3.6V, +85°C

V

IN

= 3.6V, +25°C

V

IN

= 3.6V, –40° C

09887-024

0.789

0.790

0.791

0.792

0.793

0.794

0.795

0.796

0.797

0.798

0.799

0 0.2 0.4 0.6 0.8 1.0 1.2

V

OUT

(V)

I

OUT

(A)

V

IN

= 3.6V, +85°C

VIN = 3.6V, +25°C

V

IN

= 3.6V, –40° C

09887-026

TYPICAL PERFORMANCE CHARACTERISTICS

V

= V

= V

= V

IN1

IN2

IN3

= 3.6 V, TA = 25°C, unless otherwise noted.

IN4

Figure 3. System Quiescent Current vs. Input Voltage, V

V

= 1.8 V, V

OUT2

Figure 4. BUCK1 Startup, V

= 1.2 V, V

OUT3

= 3.3 V, All Channels Unloaded

OUT4

OUT1

= 1.8 V, I

OUT1

= 5 mA

OUT1

= 3.3 V,

Figure 6. BUCK1 Load Regulation Across Temperature, V

Auto Mode

Figure 7. BUCK2 Load Regulation Across Temperature, V

Auto Mode

OUT1

OUT2

= 3.3 V,

= 1.8 V,

Figure 5. BUCK2 Startup, V

OUT2

= 3.3 V, I

= 10 mA

OUT2

Figure 8. BUCK1 Load Regulation Across Input Voltage, V

OUT1

= 3.3 V,

PWM Mode

Rev. A | Page 8 of 28

Data Sheet ADP5037

0

10

20

30

40

50

60

70

80

90

100

0.0001 0.001 0.01 0.1 1

EFFICIENCY (%)

I

OUT

(A)

V

IN

= 3.9V

V

IN

= 5.5V

V

IN

= 4.2V

09887-027

0

10

20

30

40

50

60

70

80

90

100

0.001

0.01

0.1

1

EFFICIENCY (%)

I

OUT

(A)

VIN = 4.2V

VIN = 5.5V

VIN = 3.9V

09887-018

0

10

20

30

40

50

60

70

80

90

100

0.001 0.01 0.1 1

EFFICIENCY (%)

I

OUT

(A)

VIN = 2.3V

VIN = 5.5V

VIN = 4.2V

VIN = 3.6V

09887-020

0

10

20

30

40

50

60

70

80

90

100

0.001 0.01 0.1 1

EFFICIENCY (%)

I

OUT

(A)

V

IN

= 2.3V

V

IN

= 3.6V

V

IN

= 4.2V

V

IN

= 5.5V

09887-016

0

10

20

30

40

50

60

70

80

90

100

0.001 0.01 0.1 1

EFFICIENCY(%)

I

OUT

(A)

VIN = 2.3V

V

IN

= 5.5V

VIN = 4.2V

V

IN

= 3.6V

09887-015

0

10

20

30

40

50

60

70

80

90

100

0.001 0.01 0.1 1

EFFICIENCY (%)

I

OUT

(A)

VIN = 2.3V

VIN = 4.2V

VIN = 5.5V

VIN = 3.6V

09887-017

Figure 9. BUCK1 Efficiency vs. Load Current, Across Input Voltage,

V

= 3.3 V, Auto Mode

OUT1

Figure 10. BUCK1 Efficiency vs. Load Current, Across Input Voltage,

V

= 3.3 V, PWM Mode

OUT1

Figure 12. BUCK2 Efficiency vs. Load Current, Across Input Voltage,

V

= 1.8 V, PWM Mode

OUT2

Figure 13. BUCK1 Efficiency vs. Load Current, Across Input Voltage,

V

= 0.8 V, Auto Mode

OUT1

V

= 1.8 V, Auto Mode

OUT2

Figure 11. BUCK2 Efficiency vs. Load Current, Across Input Voltage,

Figure 14. BUCK1 Efficiency vs. Load Current, Across Input Voltage,

V

= 0.8 V, PWM Mode

OUT1

Rev. A | Page 9 of 28