Handles all CDMA Baseband and RF/IF Power Management
Functions
LDOs Optimized for Specific CDMA Subsystems
Four Backup LDOs for Stand-By mode operation
Four Li-Ion Battery Charge Modes
5mA Pre Charge
Low Current Charge
Full Current Charge
Regulator mode (no current limit)
Ambient Temperature: -30 °°°°Cto+85°°°°C
64pin 7x7 LQFP package
POWER ON
KEYPAD I/F
GPIO
LOGIC
BLOCK
DELAY 10mS
INTERRUPT
CONTROL
LDO CONTROL
ANALOG
BLOCK
BATTERY
CHARGER
REFERENCE
LDO1 to 11
APPLICATIONS
CDMA/CDMA2000/PCS Handsets
GENERAL DESCRIPTION
The ADP3500 is a multifunction power system chip optimized
for CDMA cell phone power management. It contains 15 LDOs.
Sophisticated controls are available for power up during battery
charging, keypad interface, GPIO/INT function and RTC
function. The battery charger has four modes as Pre-charge, Low
Current Charge, Full Current Charge, and Regulator modes, and
is designed for Li-Ion/Li-Polymer batteries.
SERIAL I/F
32KHz OUTPUT
CONTROL
RESET OUTPUT
Figure 1. Functional Block Diagram
RESET
RTC COUNTER
STAY-ALIVE
TIMER
VOLTAGE
DETECTOR
ADP3500
REV. PrP 2/6/02
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or apatent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700World Wide Web Site: http://www.analog.com
Fax: 781/326-87ß3 ANALOG DEVICES, INC., 2002
ADP3500 - SPECIFICATIONS
PRELIMINARY TECHNICAL DATA
MAIN FUNCTIONS
TA=-30 to +85°C, C
ParameterSymbolConditionsMinTypMaxUnits
SHUTDOWN GND CURRENT
Power OFF
OPERATING GND CURRENT
Stand-by mode operation (light load)
Stand-by mode operation (Mid-load)
Active operation
Thermal Shutdown Threshold160
Thermal Shutdown Hysteresis35
Operational Temperature rangeTope-30+85
Adapter Voltage range (recommendation)VADP5.512V
VBAT Voltage rangeVBAT3.35.5V
=1µF MLCC, VBAT=3.6V unless otherwise noted. See Table 2 for C
VBAT
IGND
LDO3b : ON, connect to RTCV
through Schottky diode.
RTC/32K OSC : Active
AllotherLDOs:OFF
All logic inputs : VBAT or GND
MVBAT: OFF
IGND
LDO1b, 2b, 3b, 6b: ON
Io=1mA for LDO1b & 3b
Io=300µA for LDO2b & 6b
AllotherLDOs:OFF
RTC/32K OSC: Active
MVBAT: OFF
All logic output: no load
LDO1, 2, 3, 6, all Sub-LDO: ON,
Io=70% load
AllotherLDOs:OFF
RTC/32K OSC: Active
MVBAT: ON
All logic outputs: n o load
LDO5: OFF
All other LDOs: ON, 70% load
RTC/32K OSC: Active
All logic outputs: n o load
MVBAT: ON
ParameterSymbolConditionsMinTypMaxUnits
Charger Control Voltage Range
2 – bit programmable
Charger Control Voltage Range
2 – bit programmable
=10µF MLCC, C
VBAT
=1µF MLCC, 4.0V ≤ ADAPTER ≤ 12V
Adapter
VBAT
SENSE
Ta= 25 °C,
V
R_SENSE
5.5V ≤ ADAPTER ≤ 12V (note 1)
code 00 (default)
code 01
code 10
code 11
VBAT
SENSE
Ta= -20 to 55°C,
V
R_SENSE
5.5V ≤ ADAPTER ≤ 12V (note 1)
code 00 (default)
code 01
code 10
code 11
unless otherwise noted
= 6mV & 115mV,
= 6mV & 115mV,
3.926
4.150
4.170
4.190
3.905
4.130
4.146
4.166
3.980
4.190
4.210
4.230
3.980
4.190
4.210
4.230
4.034
4.230
4.250
4.270
4.065
4.250
4.278
4.300
V
V
V
V
V
V
V
V
REV.PrP 2/6/02 - 5 -
ADP3500
PRELIMINARY TECHNICAL DATA
Charger Detect On ThresholdADAPT
ERVBAT
Charger Detect Off ThresholdADAPT
ER-
VBAT
Charger Supply CurrentI
Current Limit Threshold
High Current Limit
(Full charge current enabled)
Low Current Limit
(Full charge current disabled)
Pre-Charge Current Source
Base Pin Drive CurrentNote 2.1528mA
Deep Discharge Lock-Out (Releasing voltage)DDLOVBAT<DDLO, Ta=25C, 5mA Pre-
Deep Discharge Lock-Out Hysteresis200mV
ISENSE Bias CurrentI
BATID pull-up resistor to ADAPTERR
Minimum Load for StabilityI
ADAPTER
ADAPT
ER-V
ISNS
BATID
L
ADAPTER=5V,VBAT=4.3V2mA
ADAPTER=5V
VBAT=3.6V
ISNS
VBAT=3.0 V
VBAT ≤ DDLO
charge, VBAT ramping up
V
=5V1
ISNS
BATID=H. Note 3.10mA
Note 1: Overhead includes external components, including sense resistor, PNP and isolation diode.
2: DDLO hysteresis is dependent upon DDLO threshold value. If DDLO threshold is at maximum, DDLO hysteresis is at
Input High Voltage
Input Low Voltage
Hysteresis
Output High Voltage
Output Low Voltage
INT-
Output High Voltage
Output Low Voltage
BLIGHT (Open Drain Output)
Output Low Voltage
KEYPADCOL (Open Drain Output)
Output Low Voltage
PWRONKEY-, OPT1 (Internal 140KΩ Pull-up)
Input High Voltage
Input Low Voltage
Hysteresis
OPT2- (Input/Open Drain Output)
Input High Voltage
Input Low Voltage
Hysteresis
Output Low Voltage
OPT3
Input High Voltage
Input Low Voltage
Hysteresis
32KOUT
Output High Voltage
Output Low Voltage
RESET+ (Open Drain Output)
Output Low Voltage
OFF Leak
RSTDELAY-, RESETOUT- (Open Drain Output)
Output Low Voltage
BATID (Internal 100KΩ pull-up)
Input High Voltage
Input Low Voltage
Hysteresis
Supply Current of RTCVI
VADP: Adapter voltage
=1µF MLCC, VBAT = 3.6 V
VBAT
VIH
VIL
VIH
VIL
VOH
VOL
VOH
VOL
VOL
VOL
VIH
VIL
Vhys
VIH
VIL
Vhys
VOL
VIH
VIL
Vhys
VOH
VOL
VOL
OFF
VOL
VIH
VIL
OSC
IOH=400µA
IOL=-1.8mA
IOH=400µA
IOL=-1.8mA
IOL=-100mA
IOL=-1.8mA
IOL=-1.8mA
IOH=400µA
IOL=-1.8mA
IOL=-1.8mA
LEAK
IOL=-1.8mA
VADP=5 to 12V0.8xVADP
RTCV=3V,
VBAT=0V
All logic: No load.
2.25
2.25
2.69
2.69
0.8xVBAT
0.8xVBAT
0.7xVBAT
0.9xRTCV
470
470
950
950
300
0.005
0.16 x
VADP
1
0.5
0.5
0.28
0.28
0.4
0.15
0.2xVBAT
0.2xVBAT
0.1xVBAT
0.2xVBAT
0.1xRTCVVV
0.1xRTCV
1
0.1xRTCV
0.2xVADPVV
V
V
mV
V
V
V
mV
V
V
V
V
V
V
V
V
mV
V
V
mV
V
V
V
mV
V
µA
V
V
µA
AC Specifications
All specs include temperature unless otherwise noted
ParameterSymbolConditionsMinTypMaxUnits
Operational Supply RangeRTCV23.1*V
Oscillator FrequencyF
Start-up Time (note)t
Frequency deviationf
REV.PrP 2/6/02 - 7 -
CLK
START
DEV
RTCV=0V to 3V100200mS
RTCV=2 to 3VTBD
32.768KHz
ADP3500
PRELIMINARY TECHNICAL DATA
Frequency Jitter
Cycle to Cycle
>100cycles
Long term DriftRTCV=3V, 3 minutes10*ppm
SERIAL INTERFACE
ParameterMin.Typ.MaxUnitsTest Condition/Comments
t
t
t
t
t
t
t
t
t
t
t
CKS
CSS
CKH
CKL
CSH
CSR
DS
DH
RD
RZ
CSZ
50nSCLK set-up time
50nSCS set-up time
100nSCLK “High” Duration
100nSCLK “Low” Duration
100nSCS hold time
62
µS
50nSInput data set-up time
40nSInput data hold time
50nSData output delay time
50nSData output floating time
50nSData output floating time after CS goes low.
Note: These parameters are not tested.
ABSOLUTE MAXIMUM RATINGS
Voltage on ADAPTER pin to GND ……………………………..... -0.3, 15Vmax
Voltage on VBAT pin to GND …………………………………… -0.3, 7Vmax
Voltage on Pin 6-13, 21-28 to GND ……………………………… -0.3, V
Voltage on Pin 1, 62-64 ………………………………………….. - 0.3, VBAT+0.3V max
Voltage on Pin 20, 32 …………………………………………….. - 0.3, V
Voltage on Pin 60, 61 ……………………………………………... - 0.3, V
Voltage on Pin 2-5, 14, 30, 31, 33 …………………………………. - 0.3, 7V max
Storage Temperature Range ………………………………………. - 65 to +150 °C
Operating Temperature Range ……………………………………. - 30 to +85°C
Maximum Junction Temperature …………………………………. 125°C
Thermal Impedance (LQFP-64) ………………………………. 2 layer bo ard 76°C/W
θ
JA
θ
Thermal Impedance (LQFP-64) ………………………………. 4 layer bo ard 54°C/W
JA
Lead Temperature Range (Soldering, 60 sec) ……………………... 300°C
1OPT3IVBATOptional Power ON input. ADP3500 will keep “power ON” during this pin goes “High”.
2KEYPADCOL0OLDO1Keypad Column Strobe 0 (Open Drain, pull low)
3KEYPADCOL1OLDO1Keypad Column Strobe 1 (Open Drain, pull low)
4KEYPADCOL2OLDO1Keypad Column Strobe 2 (Open Drain, pull low)
5KEYPADCOL3OLDO1Keypad Column Strobe 3 (Open Drain, pull low)
6KEYPADROW0ILDO1
7KEYPADROW1ILDO1
8KEYPADROW2ILDO1
9KEYPADROW3ILDO1
10 KEYPADROW4ILDO1
11 KEYPADROW5ILDO1
12 TCXO_ONILDO1Logic input pin for Main LDOs (LDO1, LDO2, LDO3, LDO6) turning on control. L: OFF, H
13 SLEEP-ILDO1Logic input pin for RF Rx LDOs (LDO7 and LDO9). Gatingregister data with this input for
14 BLIGHTOVBATLEDdrive. Open drain output.
15 DGND--Digital Ground
16 INT-OLDO1Interrupt signal output
17 RTCV--Supply input for RTC, 32KHz OSC, and some other logics. Connects to Coin cell battery in
18 OSCOUT-RTCVConnect to 32.768KHz crystal.
19 AGND--Analog Ground
20 OSCIN-RTCVConnect to 32.768KHz crystal.
21 GPIO0I/OLDO1General Purpose Input and Output port. Integrated Interrupt function. Interrupt occurs both
22 GPIO1I/OLDO1General Purpose Input and Output port. Integrated Interrupt function. Interrupt occurs both
23 GPIO2I/OLDO1General Purpose Input and Output port. Integrated Interrupt function. Interrupt occurs both
24 GPIO3I/OLDO1General Purpose Input and Output port. Integrated Interrupt function. Interrupt occurs both
25 DATAI/OLDO1Serial Interface data input and output.
26 CSILDO1Serial Interface Chip Select input. ActiveHigh input.
27 CLKINILDO1Serial Interface Clock input.
28 RESETIN-ILDO1Reset input signal for internal reset signal and starts Stay-Alive timer.
29 32KOUTORTCV32.768KHz output. Output after 30mS when Reset is released.
Keypad Row Input 0. Pulled up internally, 10KΩ
Keypad Row Input 1. Pulled up internally, 10KΩ
Keypad Row Input 2. Pulled up internally, 10KΩ
Keypad Row Input 3. Pulled up internally, 10KΩ
Keypad Row Input 4. Pulled up internally, 10KΩ
Keypad Row Input 5. Pulled up internally, 10KΩ
ON
these LDOs. LDO7 and LDO9 are turned OFF when SLEEP- goes Low even if the registers
set to ON.