Analog Devices ADP3414JR Datasheet

Dual Bootstrapped

a

FEATURES
All-In-One Synchronous Buck Driver
Bootstrapped High-Side Drive
One PWM Signal Generates Both Drives
Anticross-Conduction Protection Circuitry
Pulse-by-Pulse Disable Control

APPLICATIONS
Mobile Computing CPU Core Power Converters
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
Standard-to-Synchronous Converter Adaptations

GENERAL DESCRIPTION

The ADP3414 is a dual MOSFET driver optimized for driving
two N-channel MOSFETs which are the two switches in a
nonisolated synchronous buck power converter. Each of the
drivers is capable of driving a 3000 pF load with a 20 ns propa­gation delay and a 30 ns transition time. One of the drivers can
be bootstrapped, and is designed to handle the high-voltage
slew rate associated with “floating” high-side gate drivers.
The ADP3414 includes overlapping drive protection (ODP)
to prevent shoot-through current in the external MOSFETs.

The ADP3414 is specified over the commercial temperature
range of 0°C to 70°C and is available in an 8-lead SOIC package.

ADP3414

VCC

MOSFET Driver

ADP3414

FUNCTIONAL BLOCK DIAGRAM

VCC

IN

OVERLAP

PROTECTION

CIRCUIT

ADP3414

7V

D1

BST

12V

BST

DRVH

SW

DRVL

PGND

IN

DELAY

1V

Figure 1. General Application Circuit

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

C

BST

DRVH

SW

+1V

DRVL

PGND

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

Q1

Q2

1

ADP3414–SPECIFICATIONS

Parameter Symbol Conditions Min Typ Max Unit

SUPPLY

Supply Voltage Range VCC 4.15 7.5 V
Quiescent Current ICC

PWM INPUT

Input Voltage High
Input Voltage Low

2

2

HIGH-SIDE DRIVER

Output Resistance, Sourcing Current V

Output Resistance, Sinking Current V

3

Transition Times

Propagation Delay

(See Figure 2) tr

3, 4

(See Figure 2) tpdh

LOW-SIDE DRIVER

Output Resistance, Sourcing Current VCC = 5 V 3.0 5.0 Ω

Output Resistance, Sinking Current VCC = 5 V 1.5 3.0 Ω

3

Transition Times

Propagation Delay

NOTES

1

All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.

2

Logic inputs meet typical CMOS I/O conditions for source/sink current (~1 µA).

3

AC specifications are guaranteed by characterization, but not production tested.

4

For propagation delays, “tpdh” refers to the specified signal going high; “tpdl” refers to it going low.

Specifications subject to change without notice.

(See Figure 2) tr

3, 4

(See Figure 2) tpdh

DRVH

tf

DRVH

tpdl

DRVL

tf

DRVL

tpdl

Q

DRVH

DRVH

DRVL

DRVL

(TA = 0ⴗC to 70ⴗC, VCC = 7 V, BST = 4 V to 26 V, unless otherwise noted.)

12 mA

2.3 V

0.8 V

– VSW = 5 V 3.0 5.0 Ω

BST

– VSW = 7 V 2.0 3.5 Ω

V

BST

– VSW = 5 V 1.25 2.5 Ω

BST

V

– VSW = 7 V 1.0 2.5 Ω

BST

V

– VSW = 7 V, C

BST

V

– VSW = 7 V, C

BST

V

– V

BST

V

– V

BST

SW

= 7 V 65 86 ns

SW

= 7 V 21 32 ns

= 3 nF 36 47 ns

LOAD

= 3 nF 20 30 ns

LOAD

VCC = 7 V 2.0 3.5 Ω

VCC = 7 V 1.0 2.5 Ω
VCC = 7 V, C
VCC = 7 V, C

= 3 nF 27 35 ns

LOAD

= 3 nF 19 26 ns

LOAD

VCC = 7 V 30 35 ns
VCC = 7 V 15 25 ns

–2–

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ADP3414

IN

VCC

BST

NC

DRVH

SW

DRVL

PGND

8

7

6

5

NC = NO CONNECT

ADP3414

TOP VIEW

(Not To Scale)

1

2

3

4

ABSOLUTE MAXIMUM RATINGS*

VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +8 V

BST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +30 V

BST to SW . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +8 V

SW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5.0 V to +25 V

IN . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC + 0.3 V

Model Range Description Option

ADP3414JR 0°C to 70°C 8-Lead Standard SO-8

ORDERING GUIDE

Temperature Package Package

Small Outline (SOIC)

Operating Ambient Temperature Range . . . . . . . 0°C to 70°C

Operating Junction Temperature Range . . . . . . 0°C to 125°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155°C/W

θ

JA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W

θ

JC

PIN CONFIGURATION

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C

*This is a stress rating only; operation beyond these limits can cause the device to

be permanently damaged. Unless otherwise specified, all voltages are referenced
to PGND.

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Function

1 BST Floating Bootstrap Supply for the Upper MOSFET. A capacitor connected between BST and SW pins

holds this bootstrapped voltage for the high-side MOSFET as it is switched. The capacitor should be

chosen between 100 nF and 1 ␮F.
2 IN TTL-level Input Signal, which has primary control of the drive outputs.
3 NC No Connection.
4 VCC Input Supply. This pin should be bypassed to PGND with ~1 µF ceramic capacitor.
5 DRVL Synchronous Rectifier Drive. Output drive for the lower (synchronous rectifier) MOSFET.
6 PGND Power Ground. Should be closely connected to the source of the lower MOSFET.
7 SW This pin is connected to the buck-switching node, close to the upper MOSFET’s source. It is the floating

return for the upper MOSFET drive signal. It is also used to monitor the switched voltage to prevent turn-

on of the lower MOSFET until the voltage is below ~1 V. Thus, according to operating conditions, the

high-low transition delay is determined at this pin.
8 DRVH Buck Drive. Output drive for the upper (buck) MOSFET.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although

WARNING!

the ADP3414 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

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–3–

ESD SENSITIVE DEVICE