Ultralow, IQ, anyCAP
®
FEATURES
Accuracy over line and load: ±4.0% @ 25°C,
±5% over temperature
Ultralow dropout voltage: 190 mV (typ) @ 300 mA
Requires only CO = 1.0 µF for stability
anyCAP architecture stable with any type of capacitor
(including MLCC)
Current and thermal limiting
Low shutdown current: < 2 µA
1.7 V ≤ V
2.8 V ≤ V
V
OUT
0°C to +100°C ambient temperature range
Ultrasmall thermally enhanced 8-lead MSOP package
APPLICATIONS
Notebook PCs
Desktop PCs
GENERAL DESCRIPTION
The ADP3342 is a unique member of the ADP33xx family
of precision low dropout anyCAP voltage regulators. The
ADP3342 operates with an input voltage range of 1.7 V to 6 V
and delivers a continuous load current up to 300 mA. In order
to support the ability to regulate from such a low input voltage,
the power rail to the IC, VCC, has been split off from the main
power rail, IN, from which the output is powered.
The ADP3342 stands out from the conventional LDOs because
it has the lowest thermal resistance of any MSOP-8 package and
an enhanced process that enables it to offer performance
advantages beyond its competition. Its patented design requires
only a 1.0 µF output capacitor for stability. This device is
insensitive to output capacitor equivalent series resistance (ESR)
and is stable with any good quality capacitor, including ceramic
(MLCC) types for space-restricted applications. The dropout
voltage of the ADP3342 is only 190 mV (typical) at 300 mA.
This device also includes a safety current limit, thermal
overload protection, and a shutdown control pin.
≤ 6 V
IN
≤ 6 V
CC
= 1.2 V ±5%
PWRGD
Low Dropout Regulator
FUNCTIONAL BLOCK DIAGRAM
Q1
DRIVER
GND
Figure 1.
3.3V
3
VCC
ADP3342
INSDOUT
PWRGD
GND
4
VCC
SD
IN
THERMAL
PROTECTION
ADP3342
V
IN
1.8V
+
1µF1µF
ON
OFF
Figure 2. Typical Application Circuit
CC
27
56
ADP3342
g
m
BAND GAP +
REF –
V
OUT
1.2V
+
02712-002
OUT
02712-001
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved.
www.analog.com
ADP3342
TABLE OF CONTENTS
Specifications..................................................................................... 3
Capacitor Selection .................................................................... 12
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 11
Application Information................................................................ 12
PC Application—VCCVID ....................................................... 12
REVISION HISTORY
2/05— Rev. C to Rev. D
Format Updated..................................................................Universal
Change to Features........................................................................... 1
Change to Specifications.................................................................. 3
Changes to Table 3............................................................................ 5
11/04—Rev. B to Rev. C
Changes to ORDERING GUIDE ................................................... 3
3/03—Rev. A to Rev. B
Changes to FEATURES .....................................................................1
Changes to Figure 1............................................................................1
Changes to SPECIFICATIONS.........................................................2
Changes to ABSOLUTE MAXIMUM RATINGS..........................3
Changes to PIN FUNCTION DESCRIPTIONS ............................3
Changes to PC Application—VCCVID section .............................7
Deleted Paddle under Lead Package section...................................7
Changes to Calculating Junction Temperature section.................8
Updated OUTLINE DIMENSIONS ................................................8
Input Bypass Capacitor.............................................................. 12
Power Good Monitoring Function .......................................... 12
Shutdown Mode ......................................................................... 12
Thermal Overload Protection .................................................. 12
Calculating Junction Temperature........................................... 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
10/02—Rev. 0 to Rev. A
Changes to PIN CONFIGURATION .............................................. 3
Changes to PIN FUNCTION DESCRIPTION.............................. 3
Updated OUTLINE DIMENSIONS ................................................8
Rev. D | Page 2 of 16
ADP3342
SPECIFICATIONS
VCC = 3.0 V, VIN = 1.8 V, CIN = C
= 1 µF, TA = 0°C to 100°C, unless otherwise noted.
OUT
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT
Voltage Accuracy V
OUT
I
T
V
I
T
VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V −4.0 +4.0 %
= 0.1 mA to 300 mA
L
= 25°C
A
= 2.8 V to 6 V, VIN = 1.7 V to 6 V −5.0 +5.0 %
CC
= 0.1 mA to 300 mA
L
= −40°C to +100°C
A
Line Regulation VCC = 2.8 V to 6 V, VIN = 1.7 V to 6 V 0.04 mV/V
T
= 25°C
A
Load Regulation IL = 0.1 mA to 300 mA 0.12 mV/mA
T
Dropout Voltage V
DROP
I
I
I
Current Limiting I
Output Noise V
LIM
NOISE
I
= 25°C
A
V
= 98% of V
OUT
= 300 mA 190 450 mV
L
= 200 mA 125 mV
L
= 100 mA 70 mV
L
OUTNOM
VCC = 3 V, VIN = 1.8 V 450 mA
f = 10 Hz to 100 kHz, CL = 1 µF 60 µV rms
= 300 mA
L
OPERATING CURRENTS
Ground Current in Regulation I
GND
I
I
I
I
VCC Current in Regulation I
Ground Current in Shutdown I
VCC
GNDSD
IL = 300 mA, TA = −40°C to +100°C 3.0 8.5 mA
= 300 mA, TA = 0°C to 100°C 3.0 6.0 mA
L
= 300 mA, TA = 25°C 3.0 4.0 mA
L
= 200 mA 2.0 mA
L
= 0.1 mA 100 175 µA
L
IL = 300 mA 100 170 µA
SD = 0 V, VCC = 6 V, VIN = 1.8 V 0.01 2 µA
SHUTDOWN
Threshold Voltage V
THSD
On VCC − 0.9 V
Off 0.6 V
SD
Input Current
Output Current in Shutdown I
T
I
SD 0 ≤
OSD
TA = 25°C, VCC = 6 V, VIN = 6 V 0.01 1 µA
SD
≤ 6 V
= 100°C, VCC = 6 V, VIN = 6 V 0.01 2 µA
A
PWRGD
Output Current I
Output Low Voltage V
Output High Voltage V
PWRGDL
PWRGDL
PWRGDH
On-Time Delay TD1
TD2
Off-Time Delay TD3
4
5
6
V
= 1.2 V, VCC = 3.0 V 0.85 1.5 mA
PWRGD
3
I
= 300 µA 0.4 V
PWRGD
3
I
= 300 µA VCC − 0.4 V
PWRGD
IL = 3 mA to 300 mA, C
IL = 3 mA to 300 mA, C
IL = 3 mA to 300 mA, C
= 1 µF to 10 µF 5 300 µs
OUT
= 1 µF to 10 µF 50 300 µs
OUT
= 1 µF to 10 µF 0.05 1 µs
OUT
THERMAL PROTECTION
Shutdown Temperature TH
1
All limits at temperature extremes are guaranteed via a correlation using standard statistical quality control (SQC) methods.
2
Ambient temperature of 100°C corresponds to a junction temperature of 125°C under typical full load test conditions.
3
V
, V
PWRGDL
4
TD1: Delay time from V
5
TD2: Delay time from SD high to PWRGD high. Guaranteed by design.
6
TD3: Delay time between SD low and PWRGD low. Guaranteed by design.
: Power good output voltages. Guaranteed by design and characterization.
PWRGDH
crossing 1 V to PWRGD high. Guaranteed by design.
OUT
PROT
IL = 100 mA 165 °C
1, 2
1.4 7 µA
Rev. D | Page 3 of 16
ADP3342
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
Input Supply Voltage −0.3 V to +13 V
Shutdown Input Voltage −0.3 V to +13 V
Power Dissipation Internally Limited
Operating Ambient Temperature Range −40°C to +100°C
Operating Junction Temperature Range −40°C to +150°C
θJA (2-Layer Board) 205°C/W
θJA (4-Layer Board) 142°C/W
θ
JC
Storage Temperature Range −65°C to +150°C
Lead Temperature Range (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
56°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Absolute maximum ratings apply individually
only, not in combination. Unless otherwise specified, all other
voltages are referenced to GND.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. D | Page 4 of 16
ADP3342
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
1
ADP3342
OUT
2
VCC
GND
TOP VIEW
3
(Not to Scale)
4
NC = NO CONNECT
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Function
1, 8 NC No Connection.
2 OUT Output of the Regulator. Bypass to ground with a 1.0 µF or larger capacitor.
3 VCC Supply Voltage.
4 GND Ground Pin.
5 PWRGD Power Good. Used to indicate that output is in regulation.
6
SD Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used,
this pin should be connected to the VCC pin.
7 IN Regulator Input.
8
7
6
5
NC
IN
SD
PWRGD
02712-003
Rev. D | Page 5 of 16
ADP3342
TYPICAL PERFORMANCE CHARACTERISTICS
1.25
1.24
1.23
1.22
1.21
1.20
OUTPUT VOLTAGE (V)
1.19
1.18
1.17
Figure 4. Line Regulation Output Voltage vs. Supply Voltage
1.23
1.22
1.21
1.20
1.19
OUTPUT VOLTAGE (V)
1.18
1.17
120
110
100
GROUND CURRENT (mA)
= 1.2V
V
OUT
= 3V
V
CC
= 0mA
I
L
= 100mA
I
L
= 200mA
I
L
IL = 300mA
1.7 2.7 3.7 4.7 5.7
INPUT VOLTAGE (V)
VIN = 1.8V
= 3.0V
V
CC
0 50 150100 250200 300
OUTPUT LOAD (mA)
Figure 5. Output Voltage vs. Load Current
V
= 1.2V
OUT
= 3V
V
CC
= 0µA
I
L
90
80
70
60
50
1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0
INPUT VOLTAGE (V)
Figure 6. Ground Current vs. Supply Voltage
02712-004
02712-005
02712-006
3.5
VIN = 1.8V
V
= 3.0V
CC
3.0
2.5
2.0
1.5
1.0
GROUND CURRENT (mA)
0.5
0
0 50 100 150 200 250 300
OUTPUT LOAD (mA)
Figure 7. Ground Current vs. Load Current
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
OUTPUT CHANNEL (%)
0
–0.1
–0.2
–0.3
–0.4
–50 –25 0 5025 10075 125 150
JUNCTION TEMPERATURE (°C)
0
200mA
300mA
Figure 8. Output Voltage Variation vs. Junction Temperature
5.50
5.00
4.50
4.00
3.50
3.00
2.50
2.00
1.50
GROUND CURRENT (mA)
1.00
0.50
0
–40 –20 0 20 40 60 80 100
IL = 300mA
I
= 200mA
L
I
= 100mA
L
I
= 0mA
L
JUNCTION TEMPERATURE (°C)
V
CC
V
IN
Figure 9. Ground Current vs. Junction Temperature
= 3.0V
= 1.8V
02712-007
02712-008
02712-009
Rev. D | Page 6 of 16
ADP3342
0.25
0.20
0.15
(V)
OUT
1.32
1.22
1.12
VCC = 3V
= 1µF
C
L
R
= 4Ω
L
0.10
INPUT–OUTPUT VOLTAGE (V)
0.05
0
0 50 100 150 200 250 300
OUTPUT LOAD (mA)
Figure 10. Dropout Voltage vs. Output Current
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
GROUND CURRENT @ 300mA LOAD (mA)
1.5
1.0
–40 –25 –10 5 20 35 50 65 80 95
MAX
TYP
MIN
TEMPERATURE (°C)
VCC = 3.0V
V
= 1.8V
IN
Figure 11. Ground Current @ 300 mA Load vs. Ambient Temperature
6
5
4
3
2
1
0
INPUT–OUTPUT VOLTAGE (V)
–1
–2
0 200 400 600 800 1000
TIME (µs)
V
OUT
SD = V
RL = 4Ω
= 1.2V
IN
Figure 12. Power-Up/Power-Down
02712-010
02712-011
02712-012
3.00
(V) V
1.80
IN
V
0 40 80 120 160 200
TIME (µs)
Figure 13. Line Transient Response
(V)
1.32
OUT
1.22
1.12
3.00
(V) V
1.80
IN
V
0 40 80 120 160 200
TIME (µs)
Figure 14. Line Transient Response
1.3
(V)
1.2
OUT
1.1
400
(mA) V
200
OUT
I
5
0 400 800 1200 1600 2000
TIME (µs)
Figure 15. Load Transient Response
VCC = 3V
C
= 10µF
L
= 4Ω
R
L
VCC = 3V
= 1.8V
V
IN
= 1µF
C
L
02712-013
02712-014
02712-015
Rev. D | Page 7 of 16
ADP3342
1.3
(V)
1.2
OUT
1.1
VCC = 3V
= 1.8V
V
IN
C
= 10µF
L
2.0
1.0
V
= 3V
CC
V
0
R
= 1.8V
IN
= 4Ω
L
400
(mA) V
200
OUT
I
5
0 400 800 1200 1600 2000
TIME (µs)
Figure 16. Load Transient Response
VIN = 1.8V
1.2
(V)
0
OUT
1.0
(A) V
0.5
OUT
I
0
0 200 400 600 800 1000
TIME (µs)
Figure 17. Short-Circuit Current
02712-016
02712-017
3.0
0
1.8
0
SD (V) PWRGD (V) OUTPUT (V)
0 100 200 300 400 500
TIME (µs)
Figure 19. Turn-On Delay
2.0
1.0
0
3.0
0
1.8
0
SD (V) PWRGD (V) OUTPUT (V)
2 6 10 14 18
TIME (µs)
Figure 20. Turn-Off Delay
V
V
R
CC
= 1.8V
IN
= 4Ω
L
02712-019
= 3V
02712-020
2.0
1.0
0
3.0
0
1.8
0
SD (V) PWRGD (V) OUTPUT (V)
–200 200 600 1000 1400 1800
TIME (µs)
Figure 18. Power-On/Power-Off Response from Shutdown
V
R
V
CC
= 4Ω
L
= 1.8V
IN
= 3V
02712-018
Rev. D | Page 8 of 16
2.0
1.0
0
(V) OUTPUT (V)
CC
3.0
V
0
200 600 1000 1400 1800
TIME (µs)
Figure 21. Power-On/Power-Off Response from V
V
= 1.8V
OUT
SD = 3.0V
= 4Ω
R
L
CC
02712-021
ADP3342
70
60
1.2
V
= 1.8V
0
3.0
0
1.8
(V) PWRGD (V) OUTPUT (V)
IN
V
0
0 200 400 600 800 1000
TIME (µs)
IN
SD = 3.0V
= 4Ω
R
L
Figure 22. Power-On/Power-Off Response from V
02712-022
IN
50
40
30
RMS NOISE (µV)
20
10
0
02010 30 40 50
CL (µF)
Figure 24. RMS Noise vs. C
300mA
0mA
(10 Hz to 100 Hz)
L
02712-024
–20
V
= 1.2V
OUT
–30
C
= 1µF
L
= 300mA
I
= 1µF
L
= 50µA
L
FREQUENCY (Hz)
–40
–50
–60
–70
RIPPLE REJECTION (dB)
–80
–90
C
I
L
10 100 1k 100k 1M10k 10M
CL = 10µF
= 300mA
I
L
= 10µF
C
L
= 50µA
I
L
Figure 23. Power Supply Ripple Rejection
02712-023
100
10
1
0.1
DENSITY (µV/√Hz)
VOLTAGE NOISE SPECTRAL
0.01
0.001
10 100 1k 10k 1M100k
CL = 10µF
FREQUENCY (Hz)
Figure 25. Output Noise Density
CL = 1µF
V
OUT
= 1mA
I
L
= 1.2V
02712-025
Rev. D | Page 9 of 16
ADP3342
1.25
1.23
1.21
1.19
OUTPUT VOLTAGE (V)
1.17
1.15
35 55 75 95 115 135 155 175
650
600
0mA
50mA
100mA
200mA
300mA
AMBIENT TEMPERATURE (°C)
Figure 26. Thermal Protection
02712-026
3.6
(V)
3.0
CC
400
(mA) V
200
CL
I
0
015253545
TIME (ms)
VIN = 1.8V
SD = 3V
02712-028
Figure 28. Current Limit vs. VCC
(mA)
CL
I
550
500
1.5 1.71.6 1.8 1.9 2.0
Figure 27. Current Limit vs. V
VIN (V)
IN
02712-027
Rev. D | Page 10 of 16
ADP3342
THEORY OF OPERATION
The anyCAP LDO ADP3342 uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
INPUT
Q1
NONINVERTING
WIDEBAND
DRIVER
ADP3342
VCC
COMPENSATION
CAPACITOR
ATTENUATION
(V
BAND GAP/VOUT
PTAT
V
OS
g
m
R4
D1
R3
PTAT
CURRENT
OUTPUT
R1
)
(a)
R2
C
R
LOAD
LOAD
The R1, R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1, R2 resistor divider
is loaded by Diode D1 and a second divider consisting of R3
and R4, the values can be chosen to produce a temperature stable
output. This unique arrangement specifically corrects for the
loading of the divider so that the error resulting from base current loading in conventional circuits is avoided.
The patented amplifier controls a unique noninverting driver
that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
GND
Figure 29. Control Loop Functional Block Diagram
A very high gain error amplifier is used to control this loop.
The amplifier is constructed in such a way that, at equilibrium,
it produces a large, temperature proportional input offset voltage that is repeatable and very well controlled. The temperature
proportional offset voltage is combined with the complementary
diode voltage to form a virtual band gap voltage, implicit in the
network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that lead to a low noise
design.
02712-029
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resistance.
Moreover, the ESR value required to keep conventional LDOs
stable, changes depending on load and temperature. These ESR
limitations make designing with LDOs more difficult because of
their unclear specifications and extreme variations over
temperature.
With the ADP3342 anyCAP LDO, this is no longer true. It can
be used with virtually any good quality capacitor, with no constraint on the minimum ESR. This innovative design allows the
circuit to be stable with just a small 1 µF capacitor on the output.
Additional advantages of the pole splitting scheme include
superior line noise rejection and very high regulator gain,
resulting in excellent line and load regulation. Additional features
of the circuit include current limit, thermal shutdown, and noise
reduction.
Rev. D | Page 11 of 16
ADP3342
APPLICATION INFORMATION
PC APPLICATION—VCCVID
The ADP3342 has been optimized for PC applications that
require a 1.2 V output for powering the voltage identification
rail, V
. The rail from which the output draws current, the
CCVID
IN pin, is separated from the rail that powers the IC, the VCC
pin. This allows a higher efficiency design when, as recommended for IMVP-3/5 applications, the VCC pin is connected
to a 3.3 V supply to power the IC adequately, and the IN pin is
connected to a 1.8 V supply. The efficiency is nearly 60% in this
case.
CAPACITOR SELECTION
As with any voltage regulator, output transient response is a
function of the output capacitance. The ADP3342 is stable with
a wide range of capacitor values, types, and ESR (anyCAP). A
capacitor as low as 1 µF is all that is needed for stability; larger
capacitors can be used if high output current surges are anticipated. The ADP3342 is stable with extremely low ESR capacitors
(ESR ≈ 0), such as multilayer ceramic capacitors (MLCC) or
OSCON. The effective capacitance of some capacitor types may
fall below the minimum at cold temperature. Ensure that the
capacitor provides more than 1 µF at minimum temperature.
INPUT BYPASS CAPACITOR
An input bypass capacitor is not strictly required but is advisable
in any application involving long input wires or high source
impedance. Connecting a 1 µF capacitor from IN to ground
reduces the circuit’s sensitivity to PC board layout. If a larger
value output capacitor is used, a larger value input capacitor is
also recommended.
POWER GOOD MONITORING FUNCTION
The PWRGD pin does not monitor the output voltage directly
but rather detects whether the internal PNP pass transistor is
being modulated by the regulation loop. This method of
detecting PWRGD, rather than using a voltage threshold
detection, provides an inherent and desirable delay in asserting
the PWRGD signal. During startup or overload, the regulation
loop is not in control, so the PWRGD pin is low.
SHUTDOWN MODE
Applying a TTL high signal to the shutdown (SD) pin, or tying
it to the VCC input pin, turns on the output. Pulling
SD
down
to 0.4 V or below, or tying it to ground, turns off the output. In
shutdown mode, quiescent current is reduced.
THERMAL OVERLOAD PROTECTION
The ADP3342 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165°C.
Under extreme conditions, that is, high ambient temperature
and power dissipation where die temperature starts to rise
above 165°C, the output current is reduced until the die temperature drops to a safe level. The output current is restored when
the die temperature is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be limited by operating conditions so that the junction temperature does not
exceed 150°C.
CALCULATING JUNCTION TEMPERATURE
Device power dissipation is calculated as follows:
= (VIN − V
P
D
where I
and V
V
IN
and I
LOAD
are input and output voltages, respectively.
OUT
Assuming that I
= 1.2 V, device power dissipation is
V
OUT
= (1.8 V − 1.2 V) × 300 mA + (1.8 V) × 4 mA = 187 mW
P
D
The ADP3342 is capable of supplying 300 mA @ V
a typical notebook PC application. If a higher input voltage,
such as 3.3 V, is used, the power dissipation of the ADP3342 is
limited by the thermal overload protection. Assuming a 4-layer
board, the junction temperature rise above ambient
temperature is approximately equal to
) × I
LOAD
+ VIN × I
GND
= 4 mA, VIN = 1.8 V, and
GND
IN
OUT
are load current and ground current, and
GND
= 300 mA, I
LOAD
= 1.8 V in
= 193 mW × 142°C/W = 27.4°C
ΔT
JA
Rev. D | Page 12 of 16
ADP3342
OUTLINE DIMENSIONS
3.00
BSC
8
5
3.00
BSC
PIN 1
1
0.65 BSC
4.90
BSC
4
0.15
0.00
0.38
0.22
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187AA
1.10 MAX
SEATING
PLANE
0.23
0.08
8°
0°
0.80
0.60
0.40
Figure 30. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Output
Model
Voltage
ADP3342JRM-REEL 1.2 V 0°C to 100°C 8-Lead Mini Small Outline Package (MSOP) RM-8 LJA
ADP3342JRM-REEL7 1.2 V 0°C to 100°C 8-Lead Mini Small Outline Package (MSOP) RM-8 LJA
ADP3342JRMZ-REEL7
1
Z = Pb-free part.
1
1.2 V 0°C to 100°C 8-Lead Mini Small Outline Package (MSOP) RM-8 LJA
Temperature
Range Package Description
Package
Option Branding
Rev. D | Page 13 of 16
ADP3342
NOTES
Rev. D | Page 14 of 16
ADP3342
NOTES
Rev. D | Page 15 of 16
ADP3342
NOTES
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02712–0–2/05(D)
Rev. D | Page 16 of 16
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