High Accuracy, Ultralow IQ, 1.5 A,
FEATURES
High accuracy over line and load: ±0.9% @ 25°C,
±1.5% over temperature
Ultralow dropout voltage: 230 mV (typ) @ 1.5 A
Requires only C
anyCAP = stable with any type of capacitor (including MLCC)
Current and thermal limiting
Low noise
2.8 V to 6 V supply range
–40°C to +85°C ambient temperature range
SOT-223 package
APPLICATIONS
Notebook, palmtop computers
SCSI terminators
Battery-powered systems
PCMCIA regulators
Bar code scanners
Camcorders, cameras
GENERAL DESCRIPTION
The ADP3339 is a member of the ADP33xx family of precision,
low dropout, anyCAP voltage regulators. The ADP3339 operates
with an input voltage range of 2.8 V to 6 V and delivers a load
current up to 1.5 A. The ADP3339 stands out from the
conventional LDOs with a novel architecture and an enhanced
process that enables it to offer performance advantages and
higher output current than its competition. Its patented design
requires only a 1.0 µF output capacitor for stability. This device
is insensitive to output capacitor equivalent series resistance
(ESR), and is stable with any good quality capacitor, including
ceramic (MLCC) types for space-restricted applications. The
ADP3339 achieves exceptional accuracy of ±0.9% at room
temperature and ±1.5% over temperature, line, and load
variations. The dropout voltage of the ADP3339 is only 230 mV
(typical) at 1.5 A. The device also includes a safety current limit
and thermal overload protection. The ADP3339 has ultralow
quiescent current: 130 µA (typical) in light load situations.
= 1.0 µF for stability
O
anyCAP
FUNCTIONAL BLOCK DIAGRAM
IN
THERMAL
PROTECTION
V
IN
1µF
®
Low Dropout Regulator
ADP3339
Q1
ADP3339
CC
OUT
g
m
BANDGAP
DRIVER
GND
Figure 1.
ADP3339
IN
GND
Figure 2. Typical Application Circuit
REF
1µF
R1
R2
V
OUT
OUT
02191-0-001
02191-0-002
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
ADP3339
TABLE OF CONTENTS
Specifications.................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ........................................................................ 9
Application Information................................................................ 10
REVISION HISTORY
6/04—Data Sheet Changed from Rev. 0 to Rev. A
Updated Format..............................................................Universal
Changes to Table 1........................................................................ 3
Changes to Thermal Overload Protection Section................ 10
Updated Outline Dimensions................................................... 12
Changes to Ordering Guide...................................................... 12
10/01–Revision 0: Initial Version
Capacitor Selection.................................................................... 10
Output Current Limit................................................................ 10
Thermal Overload Protection .................................................. 10
Calculating Power Dissipation ................................................. 10
Printed Circuit Board Layout Considerations........................ 10
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
Rev. A | Page 2 of 12
ADP3339
SPECIFICATIONS
VIN = 6.0 V, CIN = C
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
OUTPUT
Voltage Accuracy3 V
V
V
Line Regulation3 VIN = V
Load Regulation IL = 0.1 mA to 1.5 A, TJ= 25°C 0.004 mV/mA
Dropout Voltage V
I
I
I
I
Peak Load Current I
Output Noise V
GROUND CURRENT
In Regulation I
I
I
I
I
In Dropout I
1, 2
= 1 µF, TJ =–40°C to +125°C, unless otherwise noted.
OUT
OUT
DROP
LDPK
NOISE
GND
GND
VIN = V
= V
IN
= V
IN
V
= 98% of V
OUT
= 1.5 A 230 480 mV
L
= 1 A 180 380 mV
L
= 500 mA 150 300 mV
L
= 100 mA 100 mV
L
VIN = V
f = 10 Hz–100 kHz, CL = 10 µF, IL = 1.5 A 95 µV rms
IL = 1.5 A 13 40 mA
= 1 A 9 25 mA
L
= 500 mA 5 15 mA
L
= 100 mA 1 3 mA
L
= 0.1 mA 130 200 µA
L
VIN = V
+ 0.5 V to 6 V, IL = 0.1 mA to 1.5 A, TJ = 25°C –0.9 +0.9 %
OUTNOM
+ 0.5 V to 6 V, IL = 0.1 mA to 1.5 A, TJ = –40°C to +125°C –1.5 +1.5 %
OUTNOM
+ 0.5 V to 6 V, IL = 100 mA to 1.5 A, TJ = 150°C –1.9 +1.9 %
OUTNOM
+ 0.5 V to 6 V, TJ = 25°C 0.04 mV/V
OUTNOM
OUTNOM
+ 1 V 2.0 A
OUTNOM
– 100 mV, IL = 0.1 mA 100 300 µA
OUTNOM
1
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
2
Application stable with no load.
3
VIN = 2.8 V for models with V
OUTNOM
≤ 2.3 V.
Rev. A | Page 3 of 12
ADP3339
ABSOLUTE MAXIMUM RATINGS
Unless otherwise specified, all voltages are referenced to GND.
Table 2.
Parameter Rating
Input Supply Voltage –0.3 V to +8.5 V
Power Dissipation Internally Limited
Operating Ambient Temperature Range –40°C to +85°C
Operating Junction Temperature Range –40°C to +150°C
θJA Four-Layer Board 62.3°C/W
θ
JC
Storage Temperature Range –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
26.8°C/W
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
Rev. A | Page 4 of 12
ADP3339
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
3
ADP3339
OUT
TOP VIEW
(Not to Scale)
NOTE: PIN 2 AND TAB ARE INTERNALLY CONNECTED
Figure 3. 3-Lead SOT-223 Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Function
1 GND Ground Pin.
2 OUT Output of the Regulator. Bypass to Ground with a 1 µF or larger capacitor.
3 IN Regulator Input. Bypass to Ground with a 1 µF or larger capacitor.
IN
OUT
2
GND
1
02191-0-003
Rev. A | Page 5 of 12
ADP3339
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C unless otherwise noted.
3.301
3.300
V
= 3.3V
OUT
3.299
3.298
3.297
3.296
OUTPUT VOLTAGE (V)
3.295
3.294
I
I
LOAD
I
LOAD
I
LOAD
LOAD
= 0A
= 500mA
= 1A
= 1.5A
14
12
10
8
6
4
GROUND CURRENT (mA)
2
VIN=6V
V
OUT
= 3.0V
3.293
345
INPUT VOLTAGE (V)
6
Figure 4. Output Voltage vs. Input Voltage
3.301
3.300
3.299
3.298
3.297
3.296
OUTPUT VOLTAGE (V)
3.295
3.294
0 1.0 1.50.5
LOAD CURRENT (A)
= 6V
V
IN
002191-0-005
Figure 5. Output Voltage vs. Load Current
180
160
140
A)
µ
120
100
80
60
GROUND CURRENT (
40
20
0
04
INPUT VOLTAGE (V)
V
OUT
I
LOAD
= 3.3V
= 0A
62
02191-0-006
Figure 6. Ground Current vs. Supply Voltage
02191-0-004
0
0 0.5 1.0
LOAD CURRENT (A)
Figure 7. Ground Current vs. Load Current
1.0
VIN = 6V
= 3.3V
V
OUT
0.8
I
= 1A
LOAD
= 10mA
LOAD
I
LOAD
= 1.5A
140
0.6
0.4
0.2
OUTPUT VOLTAGE (%)
0
–0.2
–40 –20
0 20 40 60 80 100 120
I
I
= 500mA
LOAD
JUNCTION TEMPERATURE (°C)
Figure 8. Output Voltage Variation % vs. Junction Temperature
25
20
15
10
GROUND CURRENT (mA)
5
0
–40
I
LOAD
= 1.5A
I
LOAD
= 1mA
10 60
JUNCTION TEMPERATURE (°C)
I
LOAD
= 1A
I
LOAD
= 3.3V
V
OUT
= 0.5A
110 160
Figure 9. Ground Current vs. Junction Temperature
1.5
02191-0-007
02191-0-008
02191-0-009
Rev. A | Page 6 of 12
ADP3339
250
200
V
= 3.3V
OUT
3.31
3.30
V
OUT
C
OUT
I
LOAD
= 3.3V
= 10µF
= 1.5A
150
100
DROPOUT (mV)
50
0
0 0.2 1.0
0.4 0.6 0.8
LOAD CURRENT (mA)
Figure 10. Dropout Voltage vs. Load Current
V
= 3.3V
OUT
= 1.5A
I
LOAD
3
2
1
0
INPUT/OUTPUT VOLTAGE (V)
3.29
VOLTS
5
4
1.2 1.4
02191-0-010
80
120 140 180
TIME (µs)
22040
002191-0-013
Figure 13. Line Transient Response
VIN = 6V
= 10µF
C
OUT
3.5
3.3
VOLTSA
3.1
1.5
1.0
0.5
0
0 56789
1
3
2
4
TIME (µs)
Figure 11. Power-Up/Power-Down
V
= 3.3V
OUT
C
= 1µF
OUT
3.31
I
= 1.5A
LOAD
3.30
3.29
VOLTS
5
4
40
80
120 140 180
TIME (µs)
Figure 12. Line Transient Response
10
220
02191-0-011
02191-0-012
200
400 600 800
TIME (µs)
10000
02191-0-014
Figure 14. Load Transient Response
VIN = 6V
C
= 1µF
OUT
3.5
3.3
VOLTSA
3.1
1.5
1.0
0.5
0
200
400 600 800
TIME (µs)
10000
02191-0-015
Figure 15. Load Transient Response
Rev. A | Page 7 of 12
ADP3339
3.3
VOLTS
0
3
2
A
1
0
2000
VIN = 6V
400 600 800 1000
TIME (µs)
02191-0-016
600
500
400
V)
µ
300
RMS NOISE (
200
100
0
010
I
LOAD
I
LOAD
= 1.5A
= 0A
CL(µF)
5020 30 40
02191-0-018
Figure 16. Short-Circuit Current
0
V
= 3.3V
OUT
–10
–20
–30
–40
–50
–60
–70
RIPPLE REJECTION (dB)
–80
–90
–100
10 100 1k 10k 100k 1M
CL = 10µF
I
LOAD
CL = 1µF
I
= 1.5A
LOAD
= 0
CL = 1µF
I
= 0
LOAD
FREQUENCY (Hz)
CL = 10µF
I
= 1.5A
LOAD
Figure 17. Power Supply Ripple Rejection
02191-0-017
100
10
1
0.1
0.01
VOLTAGE NOISE SPECTRAL DENSITY (µV/ Hz)
0.001
10 100
Figure 18. RMS Noise vs. C
1k
FREQUENCY (Hz)
Figure 19. Output Noise Density
(10 Hz to 100 kHz)
L
CL = 1µF
CL = 10µF
10k
100k
1M
02191-0-019
Rev. A | Page 8 of 12
ADP3339
V
THEORY OF OPERATION
The ADP3339 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider, consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium
produces a large, temperature-proportional input offset voltage
that is repeatable and very well controlled. The temperatureproportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage that is
implicit in the network, although it never appears explicitly in
the circuit. Ultimately, this patented design makes it possible to
control the loop with only one amplifier. This technique also
improves the noise characteristics of the amplifier by providing
more flexibility on the trade-off of noise sources that leads to a
low noise design.
The R1, R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by diode D1 and a second divider consisting of
R3 and R4, the values can be chosen to produce a temperaturestable output. This unique arrangement specifically corrects for
the loading of the divider, thus avoiding the error resulting from
base current loading in conventional circuits.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value required to keep conventional
LDOs stable changes depending on load and temperature.
These ESR limitations make designing with LDOs more
difficult because of their unclear specifications and extreme
variations over temperature.
With the ADP3339 anyCAP LDO, this is no longer true. It can
be used with virtually any good quality capacitor, with no
constraint on the minimum ESR. This innovative design allows
the circuit to be stable with just a small 1 µF capacitor on the
output. Additional advantages of the pole-splitting scheme
include superior line noise rejection and very high regulator
gain, which lead to excellent line and load regulation. An
impressive ±1.5 accuracy is guaranteed over line, load, and
temperature.
Additional features of the circuit include current limit and
thermal shutdown.
IN
C1
µ
F
1
OUT
GNDIN
ADP3339
V
OUT
C2
1
µ
F
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole-splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
INPUT
Q1
NONINVERTING
WIDEBAND
DRIVER
COMPENSATION
CAPACITOR
g
ADP3339
Figure 21. Functional Block Diagram
02191-0-021
Figure 20. Typical Application Circuit
OUTPUT
ATTENUATION
(V
BANDGAP/VOUT
R4
GND
R3
PTAT
CURRENT
PTAT
V
OS
m
R1
)
D1
C
LOAD
(a)
R
LOAD
R2
02191-0-020
Rev. A | Page 9 of 12
ADP3339
−
APPLICATION INFORMATION
CAPACITOR SELECTION
Output Capacitor
The stability and transient response of the LDO is a function of
the output capacitor. The ADP3339 is stable with a wide range
of capacitor values, types, and ESR (anyCAP). A capacitor as low
as 1 µF is all that is needed for stability. A higher capacitance
may be necessary if high output current surges are anticipated,
or if the output capacitor cannot be located near the output and
ground pins. The ADP3339 is stable with extremely low ESR
capacitors (ESR ≈ 0) such as multilayer ceramic capacitors
(MLCC) or OSCON. Note that the effective capacitance of some
capacitor types falls below the minimum over temperature or
with dc voltage.
Input Capacitor
An input bypass capacitor is not strictly required but is recommended in any application involving long input wires or high
source impedance. Connecting a 1 µF capacitor from the input
to ground reduces the circuit’s sensitivity to PC board layout
and input transients. If a larger output capacitor is necessary, a
larger value input capacitor is also recommended.
OUTPUT CURRENT LIMIT
The ADP3339 is short-circuit protected by limiting the pass
transistor’s base drive current. The maximum output current is
limited to about 3 A. See Figure 16.
THERMAL OVERLOAD PROTECTION
The ADP3339 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit.
Thermal protection limits the die temperature to a maximum of
160°C. Under extreme conditions (i.e., high ambient temperature and power dissipation) where the die temperature starts to
rise above 160°C, the output current is reduced until the die
temperature has dropped to a safe level.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, the device’s power dissipation should be externally
limited so the junction temperature does not exceed 150°C.
CALCULATING POWER DISSIPATION
Device power dissipation is calculated as follows:
= (VIN – V
P
D
Where I
V
and V
IN
and I
LOAD
are the input and output voltages, respectively.
OUT
are load current and ground current, and
GND
Assuming worst-case operating conditions are I
= 14 mA, VIN = 3.3 V, and V
I
GND
OUT
) × I
+ (VIN × I
LOAD
= 2.5 V, the device power
OUT
GND
LOAD
)
= 1.5 A,
dissipation is
= (3.3 V – 2.5 V) × 1500 mA + (3.3 V × 14 mA) = 1246 mW
P
D
So, for a junction temperature of 125°C and a maximum
ambient temperature of 85°C, the required thermal resistance
from junction to ambient is
C85C125
°
°
=θ
JA
W246.1
°=
C/W1.32
PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
The SOT-223’s thermal resistance, θJA, is determined by the sum
of the junction-to-case and the case-to-ambient thermal
resistances. The junction-to-case thermal resistance, θ
determined by the package design and specified at 26.8°C/W.
However, the case-to-ambient thermal resistance is determined
by the printed circuit board design.
As shown in Figure 22, the amount of copper to which the
ADP3339 is mounted affects thermal performance. When
mounted to the minimal pads of 2 oz. copper (Figure 22a), θ
126.6°C/W. Adding a small copper pad under the ADP3339
(Figure 22b) reduces the θ
to 102.9°C/W. Increasing the
JA
copper pad to 1 square inch (Figure 22c) reduces the θ
further, to 52.8°C/W.
, is
JC
even
JA
is
JA
Rev. A | Page 10 of 12
Figure 22. PCB Layouts
cab
02191-0-022
ADP3339
Use the following general guidelines when designing printed
circuit boards:
1. Keep the output capacitor as close to the output and
ground pins as possible.
2. Keep the input capacitor as close to the input and ground
pins as possible.
3. PC board traces with larger cross sectional areas remove
more heat from the ADP3339. For optimum heat transfer,
specify thick copper and use wide traces.
4. The thermal resistance can be decreased by adding a
copper pad under the ADP3339, as shown in Figure 22b.
5. If possible, utilize the adjacent area to add more copper
around the ADP3339. Connecting the copper area to the
output of the ADP3339, as shown in Figure 22c, is best, but
thermal performance will be improved even if it is
connected to other pins.
6. Use additional copper layers or planes to reduce the
thermal resistance. Again, connecting the other layers to
the output of the ADP3339 is best, but is not necessary.
When connecting the output pad to other layers, use
multiple vias.
Rev. A | Page 11 of 12
ADP3339
OUTLINE DIMENSIONS
3.15
3.00
2.90
3.50 BSC
0.85
0.70
0.60
1.70
1.50
0.10
0.02
132
2.30
BSC
6.50 BSC
4.60 BSC
COMPLIANT TO JEDEC STANDARDS TO-261-AA
7.00 BSC
1.05
0.85
SEATING
PLANE
1.30
1.10
10° MAX
16°
10°
16°
10°
0.35
0.26
0.24
Figure 23. 3-Lead Small Outline Transistor Package [SOT-223]
(KC-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Output Voltage (V) Package Option Package Description
ADP3339AKC-1.5-RL –40°C to +85°C 1.5 KC-3 3-Lead SOT-223
ADP3339AKC-1.5-RL7 –40°C to +85°C 1.5 KC-3 3-Lead SOT-223
ADP3339AKC-1.8-RL –40°C to +85°C 1.8 KC-3 3-Lead SOT-223
ADP3339AKC-1.8-RL7 –40°C to +85°C 1.8 KC-3 3-Lead SOT-223
ADP3339AKC-2.5–RL –40°C to +85°C 2.5 KC-3 3-Lead SOT-223
ADP3339AKC-2.5-RL7 –40°C to +85°C 2.5 KC-3 3-Lead SOT-223
ADP3339AKC-2.85-RL –40°C to +85°C 2.85 KC-3 3-Lead SOT-223
ADP3339AKC-2.85-RL7 –40°C to +85°C 2.85 KC-3 3-Lead SOT-223
ADP3339AKC-3-RL –40°C to +85°C 3.0 KC-3 3-Lead SOT-223
ADP3339AKC-3-RL7 –40°C to +85°C 3.0 KC-3 3-Lead SOT-223
ADP3339AKC-3.3-RL –40°C to +85°C 3.3 KC-3 3-Lead SOT-223
ADP3339AKC-3.3-RL7 –40°C to +85°C 3.3 KC-3 3-Lead SOT-223
ADP3339AKC-5-RL –40°C to +85°C 5 KC-3 3-Lead SOT-223
ADP3339AKC-5-RL7 –40°C to +85°C 5 KC-3 3-Lead SOT-223
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02191–0–6/04(A)
Rev. A | Page 12 of 12
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