Analog Devices ADP3301AR-5, ADP3301AR-3.3, ADP3301AR-3.2, ADP3301AR-3, ADP3301AR-2.7 Datasheet
High Accuracy anyCAP™*
Q2
THERMAL
PROTECTION
Gm
Q1
CC
BANDGAP
REF
DRIVER
R1
R2
ADP3301
OUT
IN
ERR
SD
GND
a
100 mA Low Dropout Linear Regulator
FEATURES
High Accuracy (Over Line and Load Regulations
at +258C): 60.8%
Ultralow Dropout Voltage: 100 mV Typical @ 100 mA
Requires Only CO = 0.47 mF for Stability
anyCAP™* = Stable with All Types of Capacitors
Current and Thermal Limiting
Low Noise
Dropout Detector
Low Shutdown Current: 1 mA
Several Fixed Voltage Options
3.0 V to 12 V Supply Range
–208C to +858C Ambient Temperature Range
Thermally Enhanced SO-8 Package
Excellent Line and Load Regulations
APPLICATIONS
Cellular Telephones
Notebook, Palmtop Computers
Battery Powered Systems
Portable Instruments
Post Regulator for Switching Supplies
Bar Code Scanners
GENERAL DESCRIPTION
The ADP3301 is a member of the ADP330x family of precision
low dropout anyCAP™* voltage regulators. The ADP3301
stands out from the conventional LDOs with a novel architecture, an enhanced process and a new package. Its patented
design includes a noninverting wideband driver and a stage that
permits the use of an internal “pole splitting” capacitor to
stabilize the feedback loop with a single output capacitor as
small as 0.47 µF. This device is stable with any type of capacitor
regardless of its ESR (Equivalent Serial Resistance) value,
including ceramic types (MLCC) for space restricted applications. The ADP3301 achieves exceptional accuracy of ±0.8% at
room temperature and ±1.4% overall accuracy over temperature, line and load regulations. The dropout voltage of the
ADP3301 is only 100 mV (typical) at 100 mA.
In addition to the new architecture and process, ADI’s new
proprietary thermally enhanced package (Thermal Coastline)
can handle 1 W of power dissipation without external heat sink
or large copper surface on the PC board. This keeps PC board
real estate to a minimum and makes the ADP3301 very
attractive for use in portable equipment.
ADP3301
FUNCTIONAL BLOCK DIAGRAM
The ADP3301 operates with a wide input voltage range from
3 V to 12 V and delivers a load current in excess of 100 mA. It
features an error flag that signals when the device is about to
lose regulation or when the short circuit or thermal overload
protection is activated. Other features include shutdown and
optional noise reduction capabilities. The ADP330x anyCAP™*
LDO family offers a wide range of output voltages and output
current levels from 50 mA to 300 mA:
ADP3300 (50 mA, SOT-23)
ADP3302 (100 mA, Dual Output)
ADP3304 (100 mA, Dual Output with Separate Grounds)
ADP3303 (200 mA)
ADP3306 (300 mA)
3
NR
ADP3301-5.0
V
IN
0.47µF
7
IN
C1
8
5
ON
OFF
Figure 1. Typical Application Circuit
OUT
ERR
4
GND
1
2
R1
330kΩ
6
E
OUT
C2
0.47µF
V
= +5V
OUT
*anyCAP is a trademark of Analog Devices Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703 © Analog Devices, Inc., 1997
ADP3301–xx–SPECIFICA TIONS
ELECTRICAL CHARACTERISTICS
(@ TA = –208C to +858C, VIN = 7 V, CIN = 0.47 mF, C
= 0.47 mF, unless otherwise noted)
OUT
Parameter Symbol Conditions Min Typ Max Units
OUTPUT VOLTAGE V
OUT
ACCURACY I
VIN = Nom V
= 0.1 mA to 100 mA
L
T
= +25°C –0.8 +0.8 %
A
V
= Nom V
IN
+0.3 V to 12 V
OUT
+0.3 V to 12 V
OUT
IL = 0.1 mA to 100 mA –1.4 +1.4 %
LINE REGULATION ∆V
∆V
LOAD REGULATION ∆V
∆I
GROUND CURRENT I
GND
O
IN
O
L
V
= Nom V
IN
+0.3 V to 12 V
OUT
TA = +25°C 0.024 mV/V
IL = 0.1 mA to 100 mA
TA = +25°C 0.014 mV/mA
IL = 100 mA 0.85 2 mA
IL = 0.1 mA 0.18 0.3 mA
GROUND CURRENT I
GND
VIN = 2.5 V
IN DROPOUT IL = 0.1 mA 0.6 1.2 mA
DROPOUT VOLTAGE V
DROP
V
= 98% of VO Nominal
OUT
I
= 100 mA 0.1 0.2 V
L
I
= 10 mA 0.02 0.07 V
L
IL = 1 mA 0.003 0.03 V
SHUTDOWN THRESHOLD V
THSD
ON 2.0 0.9 V
OFF 0.9 0.3 V
1
SHUTDOWN PIN I
SDIN
0 < V
< 5 V 1 µA
SD
INPUT CURRENT 5 ≤ VSD ≤ 12 V @ VIN = 12 V 22 µA
GROUND CURRENT IN I
Q
SHUTDOWN MODE T
VSD = 0, VIN = 12 V
= +25°C1µA
A
V
= 0, VIN = 12 V
SD
TA = +85°C5µA
OUTPUT CURRENT IN I
OSD
TA = +25°C @ VIN = 12 V 2 µA
SHUTDOWN MODE TA = +85°C @ VIN = 12 V 4 µA
ERROR PIN OUTPUT
LEAKAGE I
EL
VEO = 5 V 13 µA
ERROR PIN OUTPUT
“LOW” VOLTAGE V
PEAK LOAD CURRENT I
THERMAL REGULATION ∆ V
OUTPUT NOISE V
EOL
LDPK
V
O
NOISE
O
@ 5 V OUTPUT C
I
= 400 µA 0.13 0.3 V
SINK
VIN = Nom V
+ 1 V 200 mA
OUT
VIN = 12 V, IL = 100 mA
T = 10 ms 0.015 %/W
f = 10 Hz–100 kHz
= 0 100 µV rms
NR
CNR = 10 nF, CL = 10 µF30µV
NOTES
1
Ambient temperature of +85°C corresponds to a typical junction temperature of +125°C under typical full load test conditions.
Specifications subject to change without notice.
rms
–2–
REV. 0
ADP3301
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Error Flag Output Voltage . . . . . . . . . . . . . . . –0.3 V to +16 V
Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . –0.3 V to +5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . –55°C to +125°C
Operating Junction Temperature Range . . . –55°C to +125°C
θ
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
JA
θ
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C/W
JC
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
*This is a stress rating only; functional operation of the device at these or any other
conditions above those indicated in the operation section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
ORDERING GUIDE
Model Voltage Output Package Option*
ADP3301AR-2.7 2.7 V SO-8
ADP3301AR-3 3.0 V SO-8
ADP3301AR-3.2 3.2 V SO-8
ADP3301AR-3.3 3.3 V SO-8
ADP3301AR-5 5.0 V SO-8
Contact the factory for the availability of other output voltage options.
*SO = Small Outline.
Other Members of anyCAP™* Family
Output Package
Model Current Option
2
1
Comments
ADP3300 50 mA SOT-23 High Accuracy
ADP3302 100 mA SO-8 Dual Output
ADP3304 100 mA SO-8 Dual Output with
Separate Grounds
ADP3303 200 mA SO-8 High Accuracy
ADP3306 300 mA SO-8,TSSOP-14 High Accuracy,
High Current
NOTES
1
See individual data sheets for detailed ordering information.
2
SO = Small Outline, SOT = Surface Mount, TSSOP = Thin Shrink Small
Outline.
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Function
1 & 2 OUT Output of the Regulator, fixed 2.7, 3.0,
3.2, 3.3 or 5 volts output voltage. Bypass to ground with a 0.47 µF or larger
capacitor. Pins 1 and 2 must be con-
nected together for proper operation.
3 NR Noise Reduction Pin. Used for further
reduction of the output noise. (See text
for details.) No connection if not used.
4 GND Ground Pin.
5
SD Active Low Shutdown Pin. Connect to
ground to disable the regulator output.
When shutdown is not used, this pin
should be connected to the input pin.
6 ERR Open Collector Output which goes low
to indicate that the output is about to
go out of regulation.
7 & 8 IN Regulator Input. Pins 7 and 8 must
be connected together for proper
operation.
PIN CONFIGURATION
1
OUT
2
OUT
ADP3301
TOP VIEW
3
NR
(Not to Scale)
GND
4
PIN FOR 5V DEVICE
8
IN
7
IN
6
ERR
SD
5
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3301 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
ADP3301
–Typical Performance Characteristics
5.0003
5.0000
4.9997
4.9994
4.9991
4.9988
4.9985
OUTPUT VOLTAGE – Volts
4.9982
4.9979
5.2 6
IL = 0mA
IL = 10mA
IL = 50mA
IL = 100mA
V
= 5V
OUT
7 8 910111213141516
INPUT VOLTAGE – Volts
Figure 2. Line Regulation: Output
Voltage vs. Input Voltage
970
870
770
670
570
470
370
GROUND CURRENT – µA
270
170
0 10 100
20 30 40 50 60 70 80 90
OUTPUT LOAD – mA
IL = 0 TO 100mA
5.00075
V
= 5V
5.00000
4.99925
4.99850
4.99775
4.99700
OUTPUT VOLTAGE – Volts
4.99625
4.99550
0 20 20040 60 80 100 120 140 160 180
OUTPUT LOAD – mA
OUT
V
= 7V
IN
Figure 3. Output Voltage vs. Load
Current Up to 200 mA
0.2
0.1
0.0
–0.1
–0.2
OUTPUT VOLTAGE – %
–0.3
–0.4
–45 –25 135–5 15 35 75 95 11555
IL = 0
TEMPERATURE – °C
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
GROUND CURRENT – mA
0.2
0.1
0
2.4 3.6 4.8 6 7.2 8.4 9.6 10.8
0 1.2 12
INPUT VOLTAGE – Volts
V
= 5V
OUT
= 0
I
L
Figure 4. Quiescent Current vs. Supply Voltage
1400
1200
1000
800
600
400
GROUND CURRENT – µA
200
0
–45 –25
–15 5 25 45 65 85 105
IL = 100mA
IL = 0
TEMPERATURE – °C
125
Figure 5. Quiescent Current vs. Load
Current
200
160
120
80
40
INPUT-OUTPUT VOLTAGE – mV
0
40 60 80 100 120 140 160 180
0 20 200
OUTPUT LOAD – mA
Figure 8. Dropout Voltage vs. Output
Current
Figure 6. Output Voltage Variation %
vs. Temperature
5
4
3
2
RL = 33Ω
1
INPUT-OUTPUT VOLTAGE – Volts
0
03 0432
211
INPUT VOLTAGE – Volts
V
= 3.3V
OUT
Figure 9. Power-Up/Power-Down
Figure 7. Quiescent Current vs.
Temperature
8.0
7.0
6.0
5.0
4.0
3.0
2.0
INPUT-OUTPUT VOLTAGE – Volts
1.0
0
0 100
40 60 80 120 140 160 180
20
V
TIME – µs
V
IN
OUT
SD = VIN OR 3V
= 33Ω ÷ 3.3kΩ
R
L
= 0.47µF
C
L
= 3.3V
V
OUT
Figure 10. Power-Up Overshoot
200
–4–
REV. 0
ADP3301
TIME – µs
mA
5.00
0 1000
200 400 600 800
0.02
5.01
1
4.99
100
Volts
CL = 0.47µF
I(V
OUT
)
V
OUT
= 5V
5.02
5.01
5.00
4.99
4.98
Volts
7.5
7.0
0 20 200
50Ω, 0.47µF LOAD
V
IN
40 60 80 100 120 140 160 180
TIME – µs
V
= 5V
OUT
Figure 11. Line Transient Response
CL = 10µF
V
3.304
3.302
Volts
3.300
3.298
mA
100
I(V
OUT
10
= 3.3V
OUT
)
5.02
5.01
5.00
4.99
4.98
Volts
7.5
7.0
0 40 400
5kΩ, 0.47µF LOAD
V
IN
80 120 160 200 240 280 320 360
TIME – µs
V
= 5V
OUT
Figure 12. Line Transient Response
0
0
3.3V
V
OUT
I
OUT
3.5
Volts
400
300
200
mA
100
Figure 13. Load Transient for 1 mA
to 100 mA Pulse
V
= 5V
8
6
4
2
Volts
0
5
0
CL = 0.47µF, RL = 5kΩ
CL = 10µF, RL = 5kΩ
OUT
5.0V
0 500
100 200 300 400
TIME – µs
Figure 14. Load Transient for 10 mA
to 100 mA Pulse
4
3
2
1
Volts
0
5
0
05 50
C = 0.47µF
R = 33Ω ON 3.3V OUTPUT
V
= 3.3V
OUT
V
OUT
V
SD
10 15 20 25 30 35 40 45
TIME – µs
Figure 17. Turn-Off
12 34
05
TIME – sec
Figure 15. Short Circuit Current
0
a. 0.47µF, RL = 33kΩ
–10
b. 0.47µF, R
–20
c. 10µF, R
d. 10µF, R
–30
–40
–50
–60
–70
b
d
RIPPLE REJECTION – dB
–80
–90
a c
–100
10 100 10M
= 33Ω
L
= 33kΩ
L
= 33Ω
L
1k 10k 100k
FREQUENCY – Hz
V
= 3.3V
OUT
b
d
a
c
1M
Figure 18. Power Supply Ripple
0 200
Figure 16. Turn-On
10
1
V
OUT
= 1mA, C
I
L
0.1
0.01
VOLTAGE NOISE SPECTRAL DENSITY – µV/ Hz
100 1k 100k
Figure 19. Output Noise Density
Rejection
40 80 120 160
TIME – µs
0.47µF BYPASS
PIN 7, 8 TO PIN 3
V
= 5V, CL = 0.47µF,
OUT
= 1mA, C
I
L
= 3.3V, CL = 0.47µF,
V
OUT
I
= 1mA, C
L
= 0
NR
= 0
NR
= 2.7-5.0V, CL = 10µF,
= 10nF
NR
FREQUENCY – Hz
10k
REV. 0
–5–
ADP3301
APPLICATION INFORMATION
anyCAP™*
The ADP3301 is very easy to use. The only external component
required for stability is a small 0.47 µF bypass capacitor on the
output. Unlike the conventional LDO designs, the ADP3301 is
stable with virtually any type of capacitors (anyCAP™*) independent of the capacitor’s ESR (Effective Series Resistance) value.
In a typical application, if the shutdown feature is not used, the
shutdown pin (Pin 5) should be tied to the input pin. Pins 7
and 8 must be tied together, as well as Pins 1 and 2, for proper
operation.
Capacitor Selection
Output Capacitors: as with any micropower device, output
transient response is a function of the output capacitance. The
ADP3301 is stable with a wide range of capacitor values, types
and ESR (anyCAP™*). A capacitor as low as 0.47 µF is all that
is needed for stability. However, larger capacitors can be used if
high output current surges are anticipated. The ADP3301 is
stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
Input Bypass Capacitor: an input bypass capacitor is not
required; however, for applications where the input source is
high impedance or far from the input pins, a bypass capacitor is
recommended. Connecting a 0.47 µF capacitor from the input
pins (Pins 7 and 8) to ground reduces the circuit’s sensitivity to
PC board layout. If a bigger output capacitor is used, the input
capacitor should be 1 µF minimum.
Low ESR capacitors offer better performance on a noisy supply;
however, for less demanding requirements a standard tantalum
or aluminum electrolythic capacitor is adequate.
Noise Reduction
A noise reduction capacitor (CNR) can be used to further reduce
the noise by 6 dB–10 dB (Figure 20). Low leakage capacitors in
the 10 nF–100 nF range provide the best performance. Since
the noise reduction pin (NR) is internally connected to a high
impedance node, any connection to this node should be carefully
done to avoid noise pickup from external sources. The pad
connected to this pin should be as small as possible. Long PC
board traces are not recommended.
3
NR
ADP3301-5.0
7
V
IN
+
C1
1µF
IN
8
5
SD
OFF
ON
OUT
ERR
4
GND
C
NR
10nF
1
2
R1
330kΩ
6
E
OUT
V
= 5V
OUT
+
C2
10µF
Figure 20. Noise Reduction Circuit
Thermal Overload Protection
The ADP3301 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit,
which limits the die temperature to a maximum of 165°C.
Under extreme conditions (i.e., high ambient temperature and
high power dissipation) where die temperature starts to rise
above 165°C, the output current is reduced until die temperature has dropped to a safe level. Output current is restored when
the die temperature is reduced.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, device power dissipation should be externally limited
so that junction temperatures will not exceed 125°C.
Calculating Junction Temperature
Device power dissipation is calculated as follows :
PD = (V
Where I
and V
Assuming I
V
= 5.0 V, device power dissipation is:
OUT
and I
LOAD
are input and output voltages respectively.
OUT
LOAD
– V
IN
are load current and ground current, V
GND
= 100 mA, I
) I
OUT
GND
+ (VIN) I
LOAD
= 2 mA, VIN = 9 V and
GND
IN
PD = (9 V – 5 V) 100 mA + (9 V) 2 mA = 418 mW
The proprietary package used in ADP3301 has a thermal
resistance of 96°C/W, significantly lower than a standard
8-pin SOIC package at 170°C/W.
Junction temperature above ambient temperature will be
approximately equal to :
0.418 W × 96°C/W = 40.1°C
To limit the maximum junction temperature to 125°C, maximum ambient temperature must be lower than:
T
= 125°C – 40.1°C = 84.9°C
A(MAX)
Printed Circuit Board Layout Consideration
All surface mount packages rely on the traces of the PC board to
conduct heat away from the package.
In standard packages the dominant component of the heat
resistance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages, one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. However, to make the improvement
meaningful, a significant copper area on the PCB has to be
attached to these fused pins.
The ADP3301’s patented thermal coastline lead frame design
uniformly minimizes the value of the dominant portion of the
thermal resistance. It ensures that heat is conducted away by all
pins of the package. This yields a very low 96°C/W thermal
resistance for an SO-8 package, without any special board
layout requirements, relying on the normal traces connected to
the leads. The thermal resistance can be decreased by approximately an additional 10% by attaching a few square cm of
copper area to the V
pin of the ADP3301 package.
IN
–6–
REV. 0
It is not recommended to use solder mask or silkscreen on the
V
OUT
= 5V/3.3V
VIN = 5.5V TO 12V
OUTPUT SELECT
5V
0V
C2
0.47µF
IN
OUT
GND
SD
ADP3301-5.0
+
+
IN
OUT
GND
SD
ADP3301-3.3
C1
1.0µF
VIN = 6V TO 8V
V
OUT
= 5V @ 1A
MJE253*
C2
10µF
C1
47µF
R1
50Ω
*AAVID531002 HEAT SINK IS USED
IN
OUT
ERR
GND
SD
ADP3301-5
PCB traces adjacent to the ADP3301’s pins since it will increase
the junction to ambient thermal resistance of the package.
Shutdown Mode
Applying a TTL high signal to the shutdown pin, or tying it to
the input pin, will turn the output ON. Pulling the shutdown
pin low, or tying it to ground, will turn the output OFF. In
shutdown mode, quiescent current is reduced to less than 1 µA.
Error Flag Dropout Detector
The ADP3301 will maintain its output voltage over a wide
range of load, input voltage and temperature conditions. If, for
example, regulation is lost by reducing the supply voltage below
the combined regulated output and dropout voltages, the ERRor
flag will be activated. The ERR output is an open collector,
which will be driven low.
Once set, the ERRor flag’s hysteresis will keep the output low
until a small margin of operating range is restored either by
raising the supply voltage or reducing the load.
APPLICATION CIRCUITS
Crossover Switch
The circuit in Figure 21 shows that two ADP3301s can be used
to form a mixed supply voltage system. The output switches
between two different levels selected by an external digital input.
Output voltages can be any combination of voltages from the
Ordering Guide.
Higher Output Current
The ADP3301 can source up to 100 mA without any heatsink
or pass transistor. If higher current is needed, an appropriate
pass transistor can be used, as in Figure 22, to increase the
output current to 1 A.
Step-Up/Step-Down Post Regulator
The circuit in Figure 23 provides a high precision, low dropout
regulated output voltage. It significantly reduces the ripple from
a switching regulator. The ADP3000 used in this circuit is a
switching regulator in the step-up configuration.
ADP3301
Figure 21. Crossover Switch
Figure 22. High Output Current Linear Regulator
REV. 0
VIN = 2.5V TO 3.5V
100µF
C1
10V
L1
6.8µH
R1
120Ω
I
V
LIM
IN
SW1
D1
1N5817
C2
100µF
10V
R2
19.6kΩ
1%
ADP3000-ADJ
SW2
FB
R3
10kΩ
1%
GND
Figure 23. Step-Up/Step-Down Post Regulator
–7–
ADP3301-3.3
IN OUT
GND
3.3V @ 100mA
C3
2.2µF
ADP3301
0.1574 (4.00)
0.1497 (3.80)
PIN 1
0.0098 (0.25)
0.0040 (0.10)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin Small Outline Package
(SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
5
0.2440 (6.20)
41
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
0.0196 (0.50)
0.0099 (0.25)
C2985-12-2/97
x 45°
SEATING
PLANE
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
8°
0°
0.0500 (1.27)
0.0160 (0.41)
–8–
PRINTED IN U.S.A.
REV. 0
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