Analog Devices ADP3158 78 a Datasheet

4-Bit Programmable

a

FEATURES
Optimally Compensated Active Voltage Positioning

with Gain and Offset Adjustment (ADOPT™) for
Superior Load Transient Response

Complies with VRM Specifications with Lowest

System Cost
4-Bit Digitally Programmable 1.3 V to 2.05 V Output
N-Channel Synchronous Buck Driver
Total Accuracy 0.8% Over Temperature
Two On-Board Linear Regulator Controllers Designed

to Meet System Power Sequencing Requirements
High Efficiency Current-Mode Operation
Short Circuit Protection for Switching Regulator
Overvoltage Protection Crowbar Protects Micro-

processors with No Additional External Components

APPLICATIONS
Core Supply Voltage Generation for:

Intel Pentium

Intel Celeron™

®

III

Synchronous Buck Controllers

ADP3158/ADP3178

FUNCTIONAL BLOCK DIAGRAM

VCC CT

ADP3158/ADP3178

CMP

VID DAC

+–

PWM

DRIVE

DAC+20%

g

m

LRFB1

LRDRV1

LRFB2

LRDRV2

COMP

UVLO

& BIAS

REFERENCE

V

LR1

V

LR2

REF

OSCILLATOR

REF

DRVH

DRVL
GND

CS–

CS+

GENERAL DESCRIPTION

The ADP3158 and ADP3178 are highly efficient synchronous
buck switching regulator controllers optimized for converting a
5 V main supply into the core supply voltage required by high­performance processors. These devices use an internal 4-bit DAC
to read a voltage identification (VID) code directly from the
processor, which is used to set the output voltage between 1.3 V
and 2.05 V. They use a current mode, constant off-time archi­tecture to drive two N-channel MOSFETs at a programmable
switching frequency that can be optimized for regulator size and
efficiency.

The ADP3158 and ADP3178 also use a unique supplemental
regulation technique called Analog Devices Optimal Positioning
Technology (ADOPT) to enhance load transient performance.
Active voltage positioning results in a dc/dc converter that
meets the stringent output voltage specifications for high­performance processors, with the minimum number of output
capacitors and smallest footprint. Unlike voltage-mode and

ADOPT is a trademark of Analog Devices, Inc.
Pentium is a registered trademark of Intel Corporation.
Celeron is a trademark of Intel Corporation.

VID3 VID2 VID1 VID0

standard current-mode architectures, active voltage positioning
adjusts the output voltage as a function of the load current so it
is always optimally positioned for a system transient. They also
provide accurate and reliable short circuit protection and
adjustable current limiting. The devices include an integrated
overvoltage crowbar function to protect the microprocessor
from destruction in case the core supply exceeds the nominal
programmed voltage by more than 20%.

The ADP3158 and ADP3178 contain two linear regulator
controllers that are designed to drive external N-channel
MOSFETs. The outputs are internally fixed at 2.5 V and 1.8 V
in the ADP3158, while the ADP3178 provides adjustable out­puts that are set using an external resistor divider. These
linear regulators are used to generate the auxiliary voltages
(AGP, GTL, etc.) required in most motherboard designs,
and have been designed to provide a high bandwidth load­transient response.

The ADP3158 and ADP3178 are specified over the commercial
temperature range of 0°C to 70°C and are available in a 16-lead
SOIC package.

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

ADP3158/ADP3178–SPECIFICA TIONS

(VCC = 12 V, TA = 0C to 70C, unless otherwise noted.)

Parameter Symbol Conditions Min Typ Max Unit

SWITCHING REGULATOR

Output Accuracy V

CS–

1.3 V Output Figure 1 1.289 1.3 1.311 V

1.65 V Output Figure 1 1.637 1.65 1.663 V

2.05 V Output Figure 1 2.034 2.05 2.066 V
Line Regulation ∆V
Crowbar Trip Point V

OUT

CROWBAR

VCC = 10 V to 14 V 0.06 %

% of Nominal DAC Voltage 115 120 125 %
Crowbar Reset Point % of Nominal DAC Voltage 40 50 60 %
Crowbar Response Time t

CROWBAR

Overvoltage to DRVL Going High 400 ns

VID INPUTS

Input Low Voltage V
Input High Voltage V
Input Current I
Pull-Up Resistance R

IL(VID)
IH(VID)

VID

VID

2.0 V

VID(X) = 0 V 185 250 µA

20 30 kΩ

0.6 V

Internal Pull-Up Voltage 5.0 5.4 5.7 V

OSCILLATOR

Off Time T
CT Charge Current I

CT

= 25°C, CT = 200 pF 3.5 4.0 4.5 µs

A

TA = 25°C, V

TA = 25°C, V

in Regulation 130 150 170 µA

OUT

= 0 V 253545 µA

OUT

ERROR AMPLIFIER

Output Resistance R
Transconductance g
Output Current I
Maximum Output Voltage V
Output Disable Threshold V

O(ERR)

m(ERR)

O(ERR)

COMP(MAX)
COMP(OFF)

–3 dB Bandwidth BW

ERR

2.05 2.2 2.35 mmho
CS– Forced to V
CS– Forced to V

– 3% 625 µA

OUT

– 3% 3.0 V

OUT

600 750 900 mV

COMP = Open 500 kHz

1MΩ

CURRENT SENSE

Threshold Voltage V

CS(TH)

CS– Forced to V

– 3% 69 78 87 mV

OUT

CS– ≤ 0.45 V 35 45 54 mV

0.8 V ≤ COMP ≤ 1 V 1 5 mV

Input Bias Current I
Response Time t

CS+
CS

, I

CS–

CS+ = CS– = V

OUT

0.5 5 µA
CS+ – (CS–) > 87 mV to DRVH 50 ns
Going Low

OUTPUT DRIVERS

Output Resistance R

O(DRV(X))

Output Transition Time tR, t

F

IL = 50 mA 6 Ω
CL = 3000 pF 80 ns

LINEAR REGULATORS

Feedback Current I
LR1 Feedback Voltage V

FB(X)

LRFB(1)

ADP3158, Figure 2, 2.44 2.5 2.56 V

0.3 1 µA
VCC = 4.5 V to 12.6 V

ADP3178, Figure 2, 0.97 1.0 1.03 V
VCC = 4.5 V to 12.6 V

LR2 Feedback Voltage V

LRFB(2)

ADP3158, Figure 2, 1.75 1.8 1.85 V
VCC = 4.5 V to 12.6 V
ADP3178, Figure 2, 0.97 1.0 1.03 V
VCC = 4.5 V to 12.6 V

Driver Output Voltage V

SUPPLY

DC Supply Current

2

UVLO Threshold Voltage V

LRDRV(X)

I

CC

UVLO

VCC = 4.5 V, V

= 0 V 4.2 V

LRFB(X)

79 mA

6.75 7 7.25 V

UVLO Hysteresis 0.8 1 1.2 V

NOTES

1

All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).

2

Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETs.

Specifications subject to change without notice.

–2–

REV. A

ADP3158/ADP3178

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS*

VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V

DRVH, DRVL, LRDRV1, LRDRV2 . . . . . –0.3 V to VCC + 0.3 V

All Other Inputs and Outputs . . . . . . . . . . . . –0.3 V to +10 V

Operating Ambient Temperature Range . . . . . . . 0°C to 70°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . 125°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

θ

JA

Two-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W

Four-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W

Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C

*This is a stress rating only; operation beyond these limits can cause the device to

be permanently damaged. Unless otherwise specified, all voltages are referenced
to GND.

PIN CONFIGURATION

VID0
VID1
VID2
VID3

LRFB1

LRDRV1

CS–
CS+

1

2

3

ADP3158/

ADP3178

4

TOP VIEW

5

(Not to Scale)

6

7

8

16

15

14

13

12

11

10

9

GND
DRVH
DRVL
VCC
LRFB2
LRDRV2
COMP
CT

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Function

1–4 VID0–VID3 Voltage Identification DAC Inputs.

These pins are pulled up to an internal
reference, providing a Logic 1 if left
open. The DAC output programs the CS–
regulation voltage from 1.3 V to 2.05 V.

5, 12 LRFB1, Feedback connections for the linear

LRFB2 regulator controllers.

6, 11 LRDRV1, Gate drives for the respective linear

LRDRV2 regulator N-channel MOSFETs.

7 CS– Current Sense Negative Node. Negative

input for the current comparator. This pin
also connects to the internal error ampli­fier that senses the output voltage.

8 CS+ Current Sense Positive Node. Positive

input for the current comparator. The
output current is sensed as a voltage at this
pin with respect to CS–.

9 CT External capacitor connected from CT to

ground sets the Off-time of the device.

10 COMP Error Amplifier Output and Compensation

Point. The voltage at this output programs
the output current control level between

CS+ and CS–.
13 VCC Supply Voltage for the device.
14 DRVL Low-Side MOSFET Drive. Gate drive for

the synchronous rectifier N-channel

MOSFET. The voltage at DRVL swings

from GND to VCC.
15 DRVH High-Side MOSFET Drive. Gate drive

for the buck switch N-channel MOSFET.

The voltage at DRVH swings from GND

to VCC.
16 GND Ground Reference. GND should have a

low impedance path to the source of the

synchronous MOSFET.

ORDERING GUIDE

Temperature LDO Package Package

Model Range Voltage Description Option

ADP3158JR 0°C to 70°C 2.5 V, 1.8 V SO = Small Outline Package R-16A (SO-16)
ADP3178JR 0°C to 70°C Adjustable SO = Small Outline Package R-16A (SO-16)

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3158/ADP3178 feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.

REV. A

–3–

ADP3158/ADP3178

–Typical Performance Characteristics

60

50

40

30

20

SUPPLY CURRENT – mA

10

0

0 100 200 300 400 500 600 700 800

OSCILLATOR FREQUENCY – kHz

TPC 1. Supply Current vs. Operating Frequency Using
MOSFETs of Figure 3

TEK RUN TRIG'D

DRVH

TEK RUN TRIG'D

VCC

1

V

CORE

2

CH1

5.00V CH2 500mV BW M 10.0ms A CH1

W

0.00000 s

TPC 4. Power-On Start-Up Waveform

25

20

TA = 25C
V

= 1.65V

OUT

5.90VB

1

DRVL

CH1

5.00V CH2 5.00V BW M 1.00s A CH1

W

–2.6500s

5.90VB

TPC 2. Gate Switching Waveforms Using MOSFETs of
Figure 3

TEK RUN TRIG'D

DRVH

DRVL

15

10

NUMBER OF PARTS – %

5

0

–0.5

OUTPUT ACCURACY – % of Nominal

0 0.5

TPC 5. Output Accuracy Distribution

CH1

2.00V CH2 2.00V BW M 1.00ns A

W

150.000s

CH1

5.88VB

TPC 3. Driver Transition Waveforms Using MOSFETs of
Figure 3

–4–

REV. A

ADP3158/ADP3178

ADP3158/

ADP3178

4-BIT CODE

V

CS–

1

VID0

2

VID1

3

VID2

4

VID3

5

LRFB1

6

LRDRV1

7

CS–

8

CS+

GND

DRVH

DRVL

VCC

LRFB2

LRDRV2

COMP

16

15

14

13

+

1F

12

11

10

9

CT

1.2V

+

AD820

12V

100nF

100

100nF

Figure 1. Closed Loop Output Voltage Accuracy
Test Circuit

ADP3158/

ADP3178

1

VID0

2

VID1

3

VID2

4

VID3

V

LR1

10nF

5

LRFB1

6

LRDRV1

7

CS–

8

CS+

GND
DRVH
DRVL

VCC

LRFB2

LRDRV2

COMP

CT

16

15

14

13

12

11

10

9

+

10nF

1F

V

LR2

VCC

100nF

Figure 2. Linear Regulator Output Voltage Accuracy
Test Circuit

THEORY OF OPERATION

The ADP3158 and ADP3178 use a current-mode, constant off­time control technique to switch a pair of external N-channel
MOSFETs in a synchronous buck topology. Constant off-time
operation offers several performance advantages, including that
no slope compensation is required for stable operation. A unique
feature of the constant off-time control technique is that since
the off-time is fixed, the converter’s switching frequency is a
function of the ratio of input voltage to output voltage. The
fixed off-time is programmed by the value of an external capaci­tor connected to the CT pin. The on-time varies in such a way
that a regulated output voltage is maintained as described below
in the cycle-by-cycle operation. The on-time does not vary under
fixed input supply conditions, and it varies only slightly as a
function of load. This means that the switching frequency remains
fairly constant in a standard computer application.

Active Voltage Positioning

The output voltage is sensed at the CS– pin. A voltage error
amplifier, (g

), amplifies the difference between the output

m

voltage and a programmable reference voltage. The reference
voltage is programmed to between 1.3 V and 2.05 V by an inter­nal 4-bit DAC that reads the code at the voltage identification
(VID) pins. (Refer to Table I for output voltage vs. VID pin code
information.) A unique supplemental regulation technique called
Analog Devices Optimal Positioning Technology (ADOPT)
adjusts the output voltage as a function of the load current so it
is always optimally positioned for a load transient. Standard
(passive) voltage positioning, sometimes recommended for use
with other architectures, has poor dynamic performance which
renders it ineffective under the stringent repetitive transient
conditions specified in Intel VRM documents. Consequently,

such techniques do not allow the minimum possible number of
output capacitors to be used. ADOPT, as used in the ADP3158
and ADP3178, provides a bandwidth for transient response that
is limited only by parasitic output inductance. This yields opti­mal load transient response with the minimum number of output
capacitors.

Cycle-by-Cycle Operation

During normal operation (when the output voltage is regulated),
the voltage error amplifier and the current comparator are the
main control elements. During the on-time of the high-side
MOSFET, the current comparator monitors the voltage between
the CS+ and CS– pins. When the voltage level between the two
pins reaches the threshold level, the DRVH output is switched
to ground, which turns off the high-side MOSFET. The timing
capacitor CT is then charged at a rate determined by the off­time controller. While the timing capacitor is charging, the DRVL
output goes high, turning on the low-side MOSFET. When the
voltage level on the timing capacitor has charged to the upper
threshold voltage level, a comparator resets a latch. The output
of the latch forces the low-side drive output to go low and the
high-side drive output to go high. As a result, the low-side switch
is turned off and the high-side switch is turned on. The sequence
is then repeated. As the load current increases, the output voltage
starts to decrease. This causes an increase in the output of the
voltage-error amplifier, which, in turn, leads to an increase in
the current comparator threshold, thus tracking the load cur­rent. To prevent cross conduction of the external MOSFETs,
feedback is incorporated to sense the state of the driver output
pins. Before the low-side drive output can go high, the high-side
drive output must be low. Likewise, the high-side drive output is
unable to go high while the low-side drive output is high.

Output Crowbar

An added feature of using an N-channel MOSFET as the syn­chronous switch is the ability to crowbar the output with the
same MOSFET. If the output voltage is 20% greater than the
targeted value, the controller IC will turn on the lower MOSFET,
which will current-limit the source power supply or blow its fuse,
pull down the output voltage, and thus save the microprocessor
from destruction. The crowbar function releases at approxi­mately 50% of the nominal output voltage. For example, if the
output is programmed to 1.5 V, but is pulled up to 1.85 V or
above, the crowbar will turn on the lower MOSFET. If in this
case the output is pulled down to less than 0.75 V, the crowbar
will release, allowing the output voltage to recover to 1.5 V if
the fault condition has been removed.

On-board Linear Regulator Controllers

The ADP3158 and ADP3178 include two linear regulator con­trollers to provide a low cost solution for generating additional
supply rails. In the ADP3158, these regulators are internally set
to 2.5 V (LR1) and 1.8 V (LR2) with ±2.5% accuracy. The
ADP3178 is designed to allow the outputs to be set externally
using a resistor divider. The output voltage is sensed by the high
input impedance LRFB(x) pin and compared to an internal
fixed reference.

The LRDRV(x) pin controls the gate of an external N-channel
MOSFET resulting in a negative feedback loop. The only addi­tional components required are a capacitor and resistor for
stability. The maximum output load current is determined by
the size and thermal impedance of the external power MOSFET
that is placed in series with the supply.

REV. A

–5–