Analog Devices ADP3156 Datasheet
Dual Power Supply Controller
V
CC
+12V
1mF
22mF
V
IN
+5V
+
C
IN
L
+
C
O
V
O
R
SENSE
1nF
C
COMP
35kV
20kV
V
O2
1000mF
R1
200pF
V
CC
SD
DRIVE1
SENSE+
SENSE–
DRIVE2
PGNDAGND
C
T
CMP
ADP3156
FB
V
LDO
R2
a
FEATURES
Active Voltage Positioning with Gain and Offset
Adjustment
Optimal Compensation for Superior Load Transient
Response
Fixed 1.5 V, 1.8 V and 2.5 V Output Versions
Dual N-Channel Synchronous Driver
On-Board Linear Regulator Controller
Total Output Accuracy ⴞ1% Over Temperature
High Efficiency, Current-Mode Operation
Short Circuit Protection
Overvoltage Protection Crowbar Protects Loads with
No Additional External Components
Power Good Output
SO-16 Package
APPLICATIONS
Desktop Computer Supplies
ACPI-Compliant Power Systems
General Purpose DC-DC Converters
SD
for Desktop Systems
ADP3156
FUNCTIONAL BLOCK DIAGRAM
V
REF
CMPI
V
IN
SENSE–
AGND
+15%
DELAY
V
REF
V
T1
PWRGD
+5% V
g
m
DRIVE1 DRIVE2 PGND
V
CC
NONOVERLAP
DRIVE
CROWBAR
IN
OFF
S
Q
R
V
T2
C
T
CMPT
OFF-TIME
CONTROL
SENSE+
–5%
REF
V
REF
REFERENCE
1.20V
ADP3156
SENSE–
2R
R
V
LDO
FB
GENERAL DESCRIPTION
The ADP3156 is a highly efficient synchronous buck switching
regulator controller optimized for converting the 3.3 V or 5 V
main supply into lower supply voltages required on the motherboards of Pentium
®
III and other high performance processor
systems. The ADP3156 uses a current mode, constant off-time
architecture to drive two external N-channel MOSFETs at a
programmable switching frequency that can be optimized for
size and efficiency. It also uses a unique supplemental regulation
technique called active voltage positioning to enhance load
transient performance. Active voltage positioning results in a
DC/DC converter that provides the best possible transient response using the minimum number of output capacitors and
smallest footprint. Unlike voltage-mode and standard currentmode architectures, active voltage positioning adjusts the output
voltage as a function of the load current so that it is always
optimally positioned for a system transient.
The ADP3156 provides accurate and reliable short circuit
protection and adjustable current limiting. It also includes an
integrated overvoltage crowbar function to protect the microprocessor from destruction in case the core supply exceeds the
nominal programmed voltage by more than 15%.
Pentium is a registered trademark of Intel Corporation.
All other trademarks are the property of their respective holders.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
CMP
The ADP3156 contains a linear regulator controller that is
designed to drive an external N-channel MOSFET. This linear
regulator is used to generate the auxiliary voltages (AGP, GTL,
etc.) required in most motherboard designs, and has been designed to provide a high bandwidth load-transient response. A
pair of external feedback resistors sets the linear regulator output voltage.
Figure 1. Typical Application
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1999
ADP3156–SPECIFICATIONS
(0ⴗC ⱕ TA ⱕ +70ⴗC, VCC = 12 V, VIN = 5 V, unless otherwise noted)
1
Parameter Symbol Conditions Min Typ Max Units
OUTPUT ACCURACY
ADP3156-1.5 V V
O
1.480 1.500 1.520 V
ADP3156-1.8 V 1.777 1.800 1.823 V
ADP3156-2.5 V 2.475 2.500 2.525 V
I
OUTPUT VOLTAGE LINE ∆V
O
= 10 A (Figure 2)
LOAD
REGULATION VIN = 4.75 V to 5.25 V 0.05 %
INPUT DC SUPPLY CURRENT
Normal Mode I
Shutdown T
2
Q
VSD = 0.6 V 4.1 5.5 mA
= +25°C, VSD = 2.0 V 140 250 µA
A
CURRENT SENSE THRESHOLD
VOLTAGE V
C
PIN DISCHARGE CURRENT I
T
OFF-TIME t
DRIVER OUTPUT TRANSITION t
SENSE(TH)VSENSE–
T
OFF
, t
R
F
TIME T
POSITIVE POWER GOOD TRIP POINT3V
NEGATIVE POWER GOOD TRIP POINT3V
POWER GOOD RESPONSE TIME t
CROWBAR TRIP POINT V
PWRGD
PWRGD
PWRGD
CROWBAR
Forced to V
T
= +25°C
A
in Regulation 65 µA
V
OUT
V
= 0 V 2 10 µA
OUT
C
= 150 pF 1.8 2.45 3.2 µs
T
– 3% 125 145 165 mV
OUT
CL = 7000 pF (DRIVE1, 2)
= +25°C 120 200 ns
A
% Above Output Voltage 5 8 %
% Below Output Voltage –8 –5 %
500 µs
% Above Output Voltage 9 15 24 %
ERROR AMPLIFIER
OUTPUT IMPEDANCE RO
ERR
275 kΩ
ERROR AMPLIFIER
TRANSCONDUCTANCE g
m(ERR)
2.2 mmho
ERROR AMPLIFIER MINIMUM
OUTPUT VOLTAGE V
CMPMIN
V
SENSE–
Forced to V
+ 3% 0.8 V
OUT
ERROR AMPLIFIER MAXIMUM
OUTPUT VOLTAGE V
CMPMAX
ERROR AMPLIFIER BANDWIDTH –3 dB BW
ERR
V
SENSE–
Forced to V
– 3% 2.4 V
OUT
CMP = Open 500 kHz
LINEAR REGULATOR FEEDBACK
CURRENT I
FB
LINEAR REGULATOR Figure 2, V
OUTPUT VOLTAGE V
O2
R
= 5 kΩ, R2 = 20 kΩ, 1.47 1.5 1.53 V
PROG
I
= 1 A
O2
LDOIN
= 1.8 V
0.35 1 µA
SHUTDOWN (SD) PIN
Low Threshold SD
High Threshold SD
Input Current SD
NOTES
1
All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. Specifications subject to change without
notice.
2
Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETs.
3
The trip point is for the output voltage coming into regulation.
Specifications subject to change without notice.
L
H
IC
Part Active 0.6 V
Part in Shutdown 2.0 V
10 µA
–2–
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ADP3156
TOP VIEW
(Not to Scale)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
NC = NO CONNECT
NC
NC
AGND
SD
FB
V
LDO
SENSE–
SENSE+
PGND
NC
DRIVE1
DRIVE2
V
CC
PWRGD
CMP
C
T
ADP3156
WARNING!
ESD SENSITIVE DEVICE
PIN FUNCTION DESCRIPTIONS
Pin Mnemonic Function
1, 2, 15 NC No Connect.
3 AGND Analog Ground. All internal signals of the ADP3156 are referenced to this ground.
4 SD Shutdown. A logic high will place the ADP3156 in shutdown and disable both outputs. This pin
is internally pulled down.
5 FB Feedback connection for the linear controller. Connect this pin to the resistor divider network to
set the output voltage of the linear regulator.
6V
LDO
7 SENSE– Connects to the internal resistor divider that senses the output voltage. This pin is also the refer-
8 SENSE+ (+) input for the current comparator. The output current is sensed as a voltage at this pin with
9C
T
10 CMP Error Amplifier output and compensation point. The voltage at this output programs the
11 PWRGD Power Good. An open drain signal indicates the output voltage is within a ±5% regulation band.
12 V
CC
13 DRIVE2 Gate Drive for the (bottom) Synchronous Rectifier N-channel MOSFET. The voltage at DRIVE2
14 DRIVE1 Gate Drive for the buck switch N-channel MOSFET. The voltage at DRIVE1 swings from
16 PGND Power Ground. The drivers turn off the buck and synchronous MOSFETs by discharging their
Gate Drive for the linear regulator N-channel MOSFET.
ence input for the current comparator.
respect to SENSE–.
External Capacitor CT connection to ground sets the off-time of the device.
output current control level between the SENSE pins.
Supply Voltage to ADP3156.
swings from ground to V
ground to V
CC
.
CC
.
gate capacitances to this pin. PGND should have a low impedance path to the source of the synchronous MOSFET.
ABSOLUTE MAXIMUM RATINGS*
PIN CONFIGURATION
Input Supply Voltage (VCC) . . . . . . . . . . . . . . .–0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Operating Ambient Temperature Range . . . . . . 0°C to +70°C
Junction Temperature Range . . . . . . . . . . . . . . 0°C to +150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W
θ
JA
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +300°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDE
Buck Converter Package
Model Output Voltage Option
ADP3156JR-1.5 1.5 V R-16A/SO-16
ADP3156JR-1.8 1.8 V R-16A/SO-16
ADP3156JR-2.5 2.5 V R-16A/SO-16
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
–3–
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3156 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
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16-Lead SOIC
ADP3156
SYSTEM
V
O2
+1.5V
4A
1000mF
RTN
mP
100kV
IRL3103
22V
ESR = 34mV
2700mF 3 2
22mF
1mF
(10V)
ADP3156-1.8
PGND
NC
DRIVE1
DRIVE2
V
PWRGD
CMP
16
15
14
13
12
CC
11
10
9
C
T
C
T
200pF
R1
110kV
R2
16kV
C
2nF
IRL3103
IRL3103
COMP
L1
3mH
10BQ015
R
SENSE
12.9mV
220V
1nF
220V
R4
5kV
R3
20kV
2kV
47pF
1
2
3
4
5
6
7
8
NC
NC
AGND
SD
FB
V
LDO
SENSE–
SENSE+
Figure 2. ADP3156 Typical VRM8.4 AGP and GTL Chipset DC/DC Converter Circuit
1mF
L2
1.7mH
ESR = 60mV
470mF 3 4
12V
5V
5V RTN
12V RTN
V
O
1.8V
7A
RTN
SD
DRIVE1 DRIVE2 PGND
V
CC
AGND
PWRGD
SENSE+
SENSE–
DELAY
NONOVERLAP
DRIVE
CROWBAR
IN
OFF
S
Q
R
V
T2
C
T
CMPT
OFF-TIME
CONTROL
V
REF
CMPI
V
IN
SENSE–
+15%
2R
V
REF
V
+5% V
T1
g
m
–5%
REF
V
REF
REFERENCE
R
V
LDO
FB
ADP3156
CMP
Figure 3. Functional Block Diagram
–4–
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