Analog Devices ADP3153 Datasheet

a

5-Bit Programmable Dual

Power Supply Controller

®

for Pentium

II Processor

ADP3153

FEATURES
5-Bit Digitally Programmable 1.8 V to 3.5 V Output

Voltage
Dual N-Channel Synchronous Driver
Total Output Accuracy ⴞ1% (0ⴗC to +70ⴗC)
High Efficiency
Current-Mode Operation
Short Circuit Protection
Power Good Output
Overvoltage Protection Crowbar
On-Board Linear Regulator Controller
VRM 8.2 Compatible
Narrow Body TSSOP 20-Lead Package

APPLICATIONS
Desktop PC Power Supply for:

Pentium II Processor

Deschutes Processor

Pentium Pro Processor

Pentium Processor

AMD–K6 Processor
VRM Modules

GENERAL DESCRIPTION

The ADP3153 is a highly efficient synchronous switching regu­lator controller and a linear regulator controller. The switching
regulator controller is optimized for Pentium II and Deschutes
Processor applications where 5 V is stepped down to a digitally
controlled output voltage between 1.8 V and 3.5 V. Using a 5-bit
DAC to read a voltage identification (VID) code directly from
the processor, the ADP3153 uses a current mode constant off­time architecture to generate its precise output voltage.

The ADP3153 drives two N-channel MOSFETS in a synchro­nous rectified buck converter, at a maximum switching fre­quency of 250 kHz. Using the recommended loop compensation
and guidelines, the ADP3153 provides a dc/dc converter that
meets Intel’s stringent transient specifications with a minimum
number of output capacitors and smallest footprint. Addition­ally, the current mode architecture also provides guaranteed
short circuit protection and adjustable current limiting.

The ADP3153’s linear regulator controller drives an external
N-channel device. The output voltage is set by the ratio of the
external feedback resistors. The controller has been designed for
excellent load transient response.

V

CC

+12V

V

+5V

IN

22mF

C

COMP

150pF

1mF

SD

CMP

ADP3153

VLDO

FB
C

T

AGND

VID0–VID4

5-BIT CODE

V

+3.3V

R1

V

IN

+5V

O2

1A

IRL2703

1000mF

R2

35kV

20kV

Figure 1. Typical Application

Pentium is a registered trademark of Intel Corporation.
All other trademarks are the property of their respective holders.

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

+

C

V

CC

DRIVE1

IRL3103

SENSE+

SENSE–

DRIVE2

PGND

1nF

IRL3103

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 1998

IN

L

2.5mH

10BQ015

R

SENSE

7mV

V

O

1.8V–3.5V

+

14A

C

O

ADP3153–SPECIFICATIONS

(0ⴗC ≤ TA ≤ +70ⴗC, V

= 12 V, VIN = 5 V, unless otherwise noted)

CC

Parameter Symbol Conditions Min Typ Max Units

OUTPUT ACCURACY

1.8 V Output Voltage V

O

With Respect to Nominal –1.0 1.0 %

2.8 V Output Voltage Output Voltage (Figure 1) –1.0 1.0 %

3.5 V Output Voltage –1.0 1.0 %

I

OUTPUT VOLTAGE LINE ∆V

O

= 10 A (Figure 2)

LOAD

REGULATION VIN = 4.75 V to 5.25 V 0.05 %

OUTPUT VOLTAGE LOAD ∆V

O

REGULATION 200 mA < I

INPUT DC SUPPLY CURRENT

Normal Mode I

1

Q

Shutdown T

(Figure 2)

< 14 A 0.1 %

LOAD

VSD = 0.8 V 4.1 5.5 mA

= +25°C, VSD = 2.0 V 140 250 µA

A

CURRENT SENSE THRESHOLD

VOLTAGE V11–V

VID PINS THRESHOLD V

, V1–V

20

V

4

Forced to V

10

10

– 3% 125 145 165 mV

OUT

Low 0.6 V
High 2.0 V

VID PINS INPUT CURRENT I20, I1–I

VID0–VID4 PULL-UP RESISTANCE R

PIN DISCHARGE CURRENT I

C

T

OFFTIME t

DRIVER OUTPUT TRANSITION t

VID

12

OFF

, t

R

F

TIMES T

POSITIVE POWER GOOD TRIP POINT V

NEGATIVE POWER GOOD TRIP POINT V

POWER GOOD RESPONSE TIME t

CROWBAR TRIP POINT V

PWRGD

PWRGD

PWRGD

CROWBAR

VID

4

= 0 V 110 220 µA

20 30 kΩ

T

= +25°C

A

V

in Regulation 65 µA

OUT

V

= 0 V 2 10 µA

OUT

C

= 150 pF 1.8 2.45 3.2 µs

T

CL = 7000 pF (Pins 16, 17)

= +25°C 120 200 ns

A

% Above Output Voltage 5 8 %

% Below Output Voltage –8 –5 %

500 µs

% Above Output Voltage 9 15 24 %

ERROR AMPLIFIER OUTPUT

IMPEDANCE RO

ERR

145 kΩ

ERROR AMPLIFIER

TRANSCONDUCTANCE GM

ERR

2.2 mmho

ERROR AMPLIFIER MINIMUM

OUTPUT VOLTAGE V

CMPMIN

V10 Forced to V

+ 3% 0.8 V

OUT

ERROR AMPLIFIER MAXIMUM

OUTPUT VOLTAGE V

CMPMAX

ERROR AMPLIFIER BANDWIDTH –3 dB BW

ERR

V10 Forced to V

– 3% 2.4 V

OUT

CMP = Open 500 kHz

LINEAR REGULATOR FEEDBACK

CURRENT I

LINEAR REGULATOR OUTPUT Figure 2

VOLTAGE

2

FB

V

O2

R

= 35K, R3 = 20K, IO2 = 1 A 3.24 3.30 3.38 V

PROG

0.35 1 µA

SHUTDOWN (SD) PIN

Low Threshold SD
High Threshold SD
Input Current SD

NOTES

1

Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETS.

2

The LDO is tested in a V
be set.

All limits at temperature extremes are guaranteed via correlation using standard quality control methods.
Specifications are subject to change without notice.

= 3.3 V configuration with the circuit shown in Figure 2. By selecting a different R

OUT

L

H

IB

Part Active 0.6 V
Part in Shutdown 2.0 V

10 µA

value, any output voltage above 1.20 V can

PROG

–2– REV. 0

ADP3153

PIN FUNCTION DESCRIPTIONS

Pin Mnemonic Function

1–4, 20 VID1–VID4, Voltage Identification DAC Input Pins. These pins are internally pulled up to V

VID0 logic high if left open. The DAC output range is 600 mV to 1.167 V. Leaving all five DAC

inputs open results in placing the ADP3153 into shutdown.
5 AGND Analog Ground Pin. This pin must be routed separately to the (–) terminal of C
6 SD Shutdown Pin. A logic high will place the ADP3153 in shutdown and disable both outputs. This

pin is internally pulled down.
7 FB This pin is the feedback connection for the linear controller. Connect this pin to the resistor

divider network to set the output voltage of the linear regulator.
8, 18 NC No Connect.
9 VLDO Gate Drive for the Linear Regulator N-channel MOSFET.
10 SENSE– Connects to the internal resistor divider which along with the VID code, sets the output voltage.

Pin 10 is also the (–) input for the current comparator.
11 SENSE+ The (+) input for the current comparator. A threshold between Pins 10 and 11 set by the error

12 C

amplifier in conjunction with R

T

External Capacitor CT from Pin 12 to ground sets the off time of the device.

, sets the current trip point.

SENSE

13 CMP Error Amplifier Compensation Point. The current comparator threshold increases with the Pin

13 voltage.

14 PWRGD Power Good Pin. An open drain signal to indicate that the output voltage is within a ±5% regu-

lation band.
15 V

CC

Input Voltage Pin.
16 DRIVE2 Gate Drive for the Synchronous Rectifier N-channel MOSFET. The voltage at Pin 16 swings

from ground to V

CC

.

17 DRIVE1 Gate Drive for the buck switch N-channel MOSFET. The voltage at Pin 17 swings from ground

to V

.

CC

19 PGND Driver Power Ground. Connects to the source of the bottom N-channel MOSFET onto the (–)

terminal of CIN.

providing a

REG

.

OUT

ABSOLUTE MAXIMUM RATINGS*

Input Supply Voltage (Pin 15) . . . . . . . . . . . . –0.3 V to +16 V

Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V

20-Lead Thin Shrink Small Outline (TSSOP)

PIN CONFIGURATION

(RU-20)

Power Dissipation . . . . . . . . . . . . . . . . . . . .Internally Limited

Operating Temperature Range . . . . . . . . . . . . . 0°C to +70°C

Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

␣ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W

θ

JA

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering 10 sec) . . . . . . . .+300°C

*This is a stress rating only; operation beyond these limits can cause the device to

be permanently damaged.

ORDERING GUIDE

Temperature Package Package

Model Range Description Option

VID1
VID2
VID3
VID4

AGND

SD
FB
NC

VLDO

SENSE–

1

2

3

4

5

ADP3153

TOP VIEW

6

(Not to Scale)

7

8

9

10

NC = NO CONNECT

ADP3153ARU 0°C to +70°C Thin Shrink Small RU-20

Outline (TSSOP)

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3153 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.

VID0

20

19

PGND

18

NC

17

DRIVE 1

16

DRIVE 2

15

V

CC

14

PWRGD

13

CMP

12

C

T

11

SENSE+

WARNING!

ESD SENSITIVE DEVICE

–3–REV. 0

ADP3153

SYSTEM

V

+3.3V

1A

RTN

100kV

mP

1000mF

IRL2703

R

PROG

35kV
R3

20kV

1

O2

2

ADP3153

1

VID1

2

VID2

3

VID3

4

VID4

5

AGND

6

SD

7

FB

8

NC

9

VLDO

10

SENSE–

NC = NO CONNECT

VID0

PGND

NC
DRIVE1
DRIVE2

V

PWRGD

CMP

SENSE+

20

19

18

17

16

15

CC

14

13

C

12

T

11

150pF

1nF

22mF

R1
150kV

R2
39kV

C

T

220V

220V

2nF
C

1mF

COMP

22V

IRL3103

IRL3103

2700mF 33

(10V)

L1

2.5mH

10BQ015

R

SENSE

6.7mV

1mF

2700mF 3 6

L2

1.7mH

(10V)

VIN +12V

VCC +5V
+5V RTN

+12V RTN

V

O

1.8V–3.5V
0-14A

RTN

Figure 2. Typical VRM8.2 Compliant Core DC/DC Converter Circuit

SD

V

DRIVE1 DRIVE2 PGND

CC

NONOVERLAP

IN

DRIVE

CROWBAR

OFF

6

AGND PWRGD

5

V

+15%

REF

V

REF

+5%

CMPI

S

Q

R

V

T2

CMPT

OFF-TIME

CONTROL

12

C

T

V

IN

SENSE–

1415

V

V

13

CMP

DELAY

REF

T1

SENSE+

–5%

g

m

SENSE–

10

11

ADP3153

REFERENCE

9

1

2

3

4

VLDO

FB

VID0

VID1

VID2

VID3

VID4

2R

1.20V

V

REF

R

DAC

Figure 3. Functional Block Diagram

–4– REV. 0