ANALOG DEVICES ADP3110 Service Manual

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Dual Bootstrapped, 12 V MOSFET

FEATURES

All-in-one synchronous buck driver
Bootstrapped high-side drive
One PWM signal generates both drives
Anticross-conduction protection circuitry
Output disable control turns off both MOSFETs to float

output per Intel® VRM 10 specification

APPLICATIONS

Multiphase desktop CPU supplies
Single-supply synchronous buck converters

Driver with Output Disable

ADP3110

GENERAL DESCRIPTION

The ADP3110 is a dual, high voltage MOSFET driver optimized
for driving two N-channel MOSFETs, which are the two
switches in a nonisolated synchronous buck power converter.
Each of the drivers is capable of driving a 3000 pF load with a
25 ns propagation delay and a 30 ns transition time. One of the
drivers can be bootstrapped and is designed to handle the high
voltage slew rate associated with floating high-side gate drivers.
The ADP3110 includes overlapping drive protection to prevent
shoot-through current in the external MOSFETs.

OD

The
MOSFETs to prevent rapid output capacitor discharge during
system shutdown.

The ADP3110 is specified over the commercial temperature
range of 0°C to 85°C and is available in an 8-lead SOIC_N
package.

pin shuts off both the high-side and the low-side

OD

IN

2

3

ADP3110

SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM

12V

C

BST1

D1

C

BST2

R

G

R

BST

Q1

TO

INDUCTOR

Q2

05514-001

VCC

4

BST

1

DRVH

8

DELAY

SW

7

CMP

VCC

6

CMP

1V

DELAY

CONTROL

LOGIC

Figure 1.

5

6

DRVL

PGND

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2005 Analog Devices, Inc. All rights reserved.

ADP3110

TABLE OF CONTENTS

Specifications..................................................................................... 3

Overlap Protection Circuit...........................................................7

Absolute Maximum Ratings............................................................ 4

ESD Caution.................................................................................. 4

Pin Configuration and Function Descriptions............................. 5

Timing Characteristics..................................................................... 6

Theory of Operation ........................................................................ 7

Low-Side Driver............................................................................ 7

High-Side Driver .......................................................................... 7

REVISION HISTORY

6/05—Revision 0: Initial Version

Application Information...................................................................8

Supply Capacitor Selection ..........................................................8

Bootstrap Circuit...........................................................................8

MOSFET Selection........................................................................8

PC Board Layout Considerations................................................9

Outline Dimensions ....................................................................... 11

Ordering Guide .......................................................................... 11

Rev. 0 | Page 2 of 12

ADP3110

SPECIFICATIONS

VCC = 12 V, BST = 4 V to 26 V, TA = 25°C, unless otherwise noted.

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

PWM INPUT

OD INPUT

HIGH-SIDE DRIVER

LOW-SIDE DRIVER

SUPPLY

1

2

3

1

Input Voltage High
Input Voltage Low
Input Current
Hysteresis

2

2

2

2

2.0 V

0.8 V

−1 +1 μA
90 250 mV

Input Voltage High
Input Voltage Low
Input Current
Hysteresis

2

Propagation Delay Times

2

2

2

2.0 V

0.8 V

−1 +1 μA
90 250 mV

3

See Figure 3 20 35 ns

tpdl

OD

See

tpdh

OD

Figure 3 40 55 ns

Output Resistance, Sourcing Current BST to SW = 12 V 3.8 4.4 Ω
Output Resistance, Sinking Current R

DRV + SW

BST to SW = 12 V 1.4 1.8 Ω
Output Resistance, Unbiased BST to SW = 0 V 10 kΩ
Transition Times
tf
Propagation Delay Times
tpdl
SW Pull Down Resistance R

3

tr

DRVH

DRVH

tpdh

SW − PGND

DRVH

DRVH

BST to SW = 12 V, C

BST to SW = 12 V, C

BST to SW = 12 V, C

BST to SW = 12 V, C

= 3 nF, see Figure 4 40 55 ns

LOAD

= 3 nF, see Figure 4 30 45 ns

LOAD

= 3 nF,see Figure 4 45 65 ns

LOAD

= 3 nF, see Figure 4 25 35 ns

LOAD

SW to PGND 10 kΩ

Output Resistance, Sourcing Current 3.4 4.0 Ω
Output Resistance, Sinking Current R

DRVL − PGND

1.4 1.8 Ω
Output Resistance, Unbiased VCC = PGND 10 kΩ
Transition Times tr
tf
Propagation Delay Times

3

DRVL

DRVL

tpdh

tpdl

DRVL

DRVL

C

= 3 nF, see Figure 4 40 50 ns

LOAD

C

= 3 nF, see Figure 4 20 30 ns

LOAD

C

= 3 nF, see Figure 4 15 35 ns

LOAD

C

= 3 nF, see Figure 4 30 40 ns

LOAD

Time-out Delay SW = 5 V 110 190 ns
SW = PGND 95 150 ns

Supply Voltage Range
Supply Current
UVLO Voltage
Hysteresis

All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
Specifications apply over the full operating temperature range TA = 0°C to 85°C.
For propagation delays, tpdh refers to the specified signal going high, and tpdl refers to it going low.

2

2

2

2

V

CC

I

SYS

4.15 13.2 V

BST = 12 V, IN = 0 V 2 5 mA
VCC rising 1.5 3.0 V
350 mV

Rev. 0 | Page 3 of 12

ADP3110

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

VCC –0.3 V to +15 V
BST –0.3 V to VCC + 15 V
BST to SW –0.3 V to +15 V
SW

DC –5 V to +15 V
<200 ns –10 V to +25 V

DRVH

DC SW – 0.3 V to BST + 0.3 V
<200 ns SW – 2 V to BST + 0.3 V

DRVL

DC –0.3 V to VCC + 0.3 V
<200 ns –2 V to VCC + 0.3 V

OD

IN,
θJA, SOIC_N

2-Layer Board 123°C/W
4-Layer Board 90°C/W

Operating Ambient Temperature

Range
Junction Temperature Range 0°C to 150°C
Storage Temperature Range –65°C to +150°C
Lead Temperature Range

Soldering (10 sec) 300°C

Vapor Phase (60 sec) 215°C

Infrared (15 sec) 260°C

–0.3 V to 6.5 V

0°C to 85°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Unless otherwise specified all other voltages
are referenced to PGND.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. 0 | Page 4 of 12