Analog Devices ADP3020 Datasheet

High-Efficiency Notebook Computer

a

FEATURES
Wide Input Voltage Range: 4.5 V to 25 V
High Conversion Efficiency > 96%
Integrated Current Sense—No External Resistor Required
Low Shutdown Current: 7 ␮A (Typical)
Dual Synchronous Buck Controllers with Selectable

PWM/Power-Saving Mode Operation

Built-In Gate Drive Boost Circuit for Driving External

N-Channel MOSFETs

Two Independently Programmable Output Voltages

Fixed 3.3 V or Adjustable (1.25 V to VIN–0.5 V)

Fixed 5 V or Adjustable (1.25 V to VIN–0.5 V)
Programmable PWM Frequency
Integrated Linear Regulator Controller
Extensive Circuit Protection Functions
38-Lead TSSOP Package

APPLICATIONS
Notebook Computers and PDAs
Portable Instruments
General Purpose DC-DC Converters

Power Supply Controller

ADP3020

GENERAL DESCRIPTION

The ADP3020 is a highly efficient dual synchronous buck switch­ing regulator controller optimized for converting the battery or
adapter input into the system supply voltages required in note­book computers. The ADP3020 uses a dual-mode PWM/Power
Saving Mode architecture to maintain efficiency over a wide
load range. The oscillator frequency can be programmed for
200 kHz, 300 kHz, or 400 kHz operation, or it can be synchro­nized to an external clock signal of up to 600 kHz.

The ADP3020 provides accurate and reliable short circuit pro­tection using an internal current sense circuit, which reduces
cost and increases overall efficiency. Other protection features
include programmable soft-start, UVLO, and integrated output
undervoltage/overvoltage protection. The ADP3020 contains a
linear regulator controller that is designed to drive an external
P-channel MOSFET or PNP transistor. The linear regulator
output is adjustable, and can be used to generate the auxiliary
voltages required in many laptop designs.

V

5.5V TO 25V

FUNCTIONAL BLOCK DIAGRAM

IN

ADP3020

5V LINEAR

REF

Q3

5V

Q4

SS5

PWRGD

5V

SMPS

POWER-ON

RESET

1.20V

3.3V

3.3V

SMPS

SMPS

LINEAR

CONTROLLER

PFO

SS3

Q1

Q2

L1L2

3.3V

Q5

2.5V

REV. 0

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 2000

ADP3020–SPECIFICATIONS

(@ TA = –40ⴗC to +85ⴗC, VIN = 12 V, SS5 = SS3 = INTVCC, INTVCC Load = 0 mA,

REF Load = 0 mA, MODE = 0 V, SYNC = 0 V, SD = 5 V, unless otherwise noted.)

Parameter Symbol Conditions Min Typ Max Unit

INTERNAL 5 V REGULATOR INTVCC

Input Voltage Range 5.5 25 V
5 V Voltage T

= 25°C 4.95 5.025 5.15 V

A

Line Regulation 5.5 V ≤ VIN ≤ 25 V 0.3 mV/V
Total Variation Line, Temp 4.8 5.2 V
Switchover Voltage AUXVCC from Low to High 4.65 4.75 4.85 V
Switchover Hysteresis AUXVCC from High to Low 100 mV
Undervoltage Lockout INTVCC Falling 3.6 3.8 4.2 V
Threshold Voltage
Undervoltage Lockout 120 mV
Hysteresis

REFERENCE

Output Voltage

SUPPLY CURRENT I

2

REF 5.5 V ≤ VIN ≤ 25 V 1.185 1.197 1.209 V

Q

Shutdown Current SD = 0 V 7 15 µA
Standby Current SS3 = SS5 = SD2 = 0 V 250 400 µA

SD = 5 V

Quiescent Current No Loads, MODE = 5 V 0.95 1.8 mA
(PWM Mode) SS3 = SS5 = SD2 =5 V

FB5 = FB3 = FB2 = 1.25 V,
ADJ/FX5 = ADJ/FX3 = 5 V

Quiescent Current No Loads, MODE = 0 V 650 µA
(Power-Saving Mode) SS3 = SS5 = SD2 = 5 V

FB5 = FB3 = FB2 = 1.25 V,
ADJ/FX5 = ADJ/FX3 = 5 V

OSCILLATOR

Frequency f

OSC

SYNC = AGND 176 200 224 kHz
SYNC = REF 264 300 336 kHz
SYNC = INTVCC 352 400 448 kHz

SYNC Input

Frequency Range 230 600 kHz
Input Low Voltage
Input High Voltage

3

3

tF ≤ 200 ns 0.4 V
tR ≤ 200 ns 4.6 V

Input Current SYNC = REF 1.2 µA

POWER GOOD PWRGD

Output Voltage In Regulation 10 kΩ Pull-Up to 5 V 4.8 V
Output Voltage Out of Regulation 10 kΩ Pull-Up to 5 V 0.4 V

FB5

< 90% of Nominal

Output Value
PWRGD Trip Threshold FB5 Rising –8 –4 –2 %
PWRGD Hysteresis FB5 Falling 4 %
CPOR Pull-Up Current CPOR = 1.2 V 2.5 µA

ERROR AMPLIFIER

DC Gain 67 dB
Gain-Bandwidth Product GBW 10 MHz
Input Leakage Current I

EAN

ADJ/FX5 = ADJ/FX3 = 5 V 200 nA

MAIN SMPS CONTROLLERS

Fixed 5 V Output Voltage FB5

PWM Mode 5.5 V ≤ VIN ≤ 25 V, ADJ/FX5 = 0 V 4.90 5.0 5.10 V
Power-Saving Mode 5.5 V ≤ VIN ≤ 25 V, ADJ/FX5 = 0 V 4.925 5.025 5.125 V

Fixed 3.3 V Output Voltage FB3

PWM Mode 5.5 V ≤ VIN ≤ 25 V, ADJ/FX3 = 0 V 3.234 3.3 3.366 V
Power-Saving Mode 5.5 V ≤ VIN ≤ 25 V, ADJ/FX3 = 0 V 3.250 3.316 3.382 V

–2–

REV. 0

ADP3020

Parameter Symbol Conditions Min Typ Max Unit

Adjustable Output Voltage

PWM Mode EAN5, 5.5 V ≤ VIN ≤ 25 V, 1.173 1.197 1.221 V

EAN3 ADJ/FX5 = ADJ/FX3 = 5 V

Power-Saving Mode FB5, FB3 5.5 V ≤ VIN ≤ 25 V, 1.179 1.203 1.227 V

Output Voltage Adjustment Range

3

FB5, FB3 ADJ/FX5 = ADJ/FX3 = 5 V 1.25 VIN–0.5 V

Current Limit Threshold (PWM Mode)

CLSET5 = CLSET3 = Floating 5.5 V ≤ VIN ≤ 25 V, T
CLSET5 = CLSET3 = 0 V 5.5 V ≤ VIN ≤ 25 V, T

Current Limit Threshold

(Power-Saving Mode)

CLSET5 = CLSET3 = Floating 5.5 V ≤ VIN ≤ 25 V, T
CLSET5 = CLSET3 = 0 V 5.5 V ≤ VIN ≤ 25 V, T

Power-Saving Mode Trip Threshold CLSET5 = CLSET3 = 0 V, T
Soft-Start Current SS3 = SS5 = 3 V 4 µA
Soft-Start Turn-On Threshold SS5, SS3 0.7 1.2 1.8 V
Feedback Input Leakage Current I

Maximum Duty Cycle

3

D

FB

MAX

Transition Time (DRVH/DRVL)

Rise t
Fall t

R

F

Logic Input Low Voltage MODE, SD, ADJ/FX3, ADJ/FX5 0.6 V
Logic Input High Voltage MODE, SD, ADJ/FX3, ADJ/FX5 2.4 V

LINEAR REGULATOR CONTROLLER

Feedback Threshold FB2 1.176 1.20 1.224 V

SD2 Pull-Up Current SD2 SD2 = 1.2 V 4 µA
SD2 Threshold 0.7 1.2 1.8 V

Current Sinking Capability DRV2 DRV2 = 2 V, FB2 = 1 V, SD2 = 5 V 20 45 mA
FB2 Input Leakage Current I

FB

POWER-FAIL COMPARATOR

PFI Input Threshold PFO from High to Low 1.176 1.20 1.224 V
PFI Input Hysteresis 24 mV
PFI Input Current 200 nA

PFO High Voltage 10 kΩ Pull-Up to 5 V 4.8 V
PFO Low Voltage 10 kΩ Pull-Up to 5 V 0.4 V

FAULT PROTECTION

Output Overvoltage Trip Threshold With Respect to Nominal Output 115 120 125 %
Output Undervoltage Lockout Threshold With Respect to Nominal Output 75 80 85 %

NOTES

1

All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.

2

The reference’s line-regulation error is insignificant. The reference cannot be used for external load.

3

Guaranteed by design, not tested in production.

Specifications subject to change without notice.

ADJ/FX5 = ADJ/FX3 = 5 V

= 25°C547290mV

A

= 25°C 115 144 173 mV

A

= 25°C16mV

A

= 25°C35mV

A

= 25°C28 mV

A

ADJ/FX5 = ADJ/FX3 = 5 V, 200 nA
FB = 1.2 V
VIN = 5.5 V, SYNC = AGND 94 99 %

C

= 3000 pF, 10%–90% 40 70 ns

LOAD

C

= 3000 pF, 90%–10% 40 70 ns

LOAD

FB2 = 1.2 V 50 nA

REV. 0

–3–

ADP3020

PIN FUNCTION DESCRIPTIONS

Pin No. Mnemonic Function

1 CS5 Current Sense Input for top N-Channel MOSFET of the 5 V Buck Converter. Connect to the drain of

the top N-channel MOSFET.

2 FB5 Feedback Input for the 5 V Buck Converter. Connect to the output sense point in fixed output mode.

Connect to an external resistor divider in adjustable output mode.

3 EAN5 Inverting Input of the Error Amplifier of the 5 V Buck Converter. Use for external loop compensation

only in fixed output mode. In adjustable output mode, connect to an external resistor divider.

4 EAO5 Error Amplifier Output for the 5 V Buck Converter.
5 ADJ/FX5 TTL Logic Input. When ADJ/FX5 = 0 V, fixed output mode, connect FB5 to the output sense point.

When ADJ/FX5 = 5 V, adjustable output mode, connect FB5 to the external resistor divider.

6 SS5 Soft Start for the 5 V Buck Converter. Also used as an ON/OFF Pin.
7 CLSET5 Current Limit Setting. A resistor can be connected from AGND to CLSET5. A minimum current

limit is obtained by leaving it unconnected. A max current limit is obtained by connecting it to AGND.

8 REF 1.2 V Bandgap Reference. Bypass it with a capacitor (1 nF typical) to AGND. REF cannot be used

directly with an external load.
9 AGND Analog Signal Ground.
10 CLSET3 Current Limit Setting. A resistor can be connected from AGND to CLSET3. A minimum current

limit is obtained by leaving it unconnected. A max current limit is obtained by connecting it to AGND.
11 MODE TTL Logic Input. MODE = 5 V, always in constant frequency PWM mode; MODE = 0 V, PWM

mode at moderate and heavy loads, and Power Saving (PSV) Mode at light load.
12 SYNC Oscillator Synchronization and Frequency Select. f

SYNC is tied to the REF Pin; f

= 400 kHz, when SYNC = 5 V. Oscillator can be synchronized with an

OSC

external source through the SYNC Pin.
13 SS3 Soft Start for the 3.3 V Buck Converter. Also used as an ON/OFF Pin
14 ADJ/FX3 TTL Logic Input. When ADJ/FX3 = 0 V, fixed output mode, connect FB3 to the output sense point.

When ADJ/FX3 = 5 V, adjustable output mode, connect FB3 to external resistor divider.
15 EAO3 Error Amplifier Output for the 3.3 V Buck Converter.
16 EAN3 Error Amplifier Inverting Input of the 3.3 V Buck Converter. Use for external loop compensation only in

fixed output mode. In adjustable output mode, connect to an external resistor divider.
17 FB3 Feedback Input for the 3.3 V Buck Converter. Connect to output sense point in fixed output mode.

Connect to an external resistor divider in adjustable output mode.
18 CS3 Current Sense Input for Top N-Channel MOSFET of the 3.3 V Buck Converter. It should be con-

nected to the drain of the N-channel MOSFET.
19 PFI The (–) Input of a comparator that can be used as a power fail detector. The positive input is connected

to the 1.20 V reference. There is a 24 mV hysteresis for this comparator.
20 PFO Open Drain Output. This pin will sink current when the PFI pin is lower than 1.20 V. Otherwise, PFO

is floating.
21 PWRGD Power Good Output. PWRGD goes low with no delay, whenever the 5 V output drops 8% below its

nominal value. When the 5 V output is within –4% of its nominal value, PWRGD will be released after a

time delay determined by the timing capacitor on the CPOR pin.
22 CPOR Connect a capacitor between CPOR and AGND to set the delay time for the PWRGD pin. A 2.5 µA

pull-up current is used to charge the capacitor. A manual reset (MR) function can also be implemented

by grounding this pin.
23 SD2 Shutdown input for the Linear Regulator Controller.
24 FB2 Feedback for the Linear Regulator Controller.
25 DRV2 Open Collector Output for the Linear Regulator Controller.
26 BST3 Boost Capacitor Connection for High Side Gate Driver of the 3.3 V Buck Converter.
27 DRVH3 High Side Gate Driver for 3.3 V Buck Converter.
28 SW3 Switching Node (Inductor) Connection of the 3.3 V Buck Converter.
29 DRVL3 Low Side Gate Driver of 3.3 V Buck Converter.
30 VIN Main Supply Input (4.5 V to 25 V).

= 200 kHz, when SYNC = 0 V; f

OSC

= 300 kHz, if

OSC

–4–

REV. 0

ADP3020

WARNING!

ESD SENSITIVE DEVICE

PIN FUNCTION DESCRIPTIONS (Continued)

Pin No. Mnemonic Function

31 INTVCC Linear Regulator Bypass for the internal 5 V LDO. Bypass this pin with a 4.7 µF capacitor to AGND.
32 AUXVCC Supply Switch Over. When AUXVCC > 4.75 V, and both of the switchers are in Power Saving mode,

the internal 5 V LDO is turned off. The chip is powered by AUXVCC pin. There is a 2% hysteresis for
this pin.

33 SD Shutdown Control Input, Active Low. If SD = 0 V, the chip is in shutdown with very low quiescent cur-

rent. For automatic start-up, connect SD to V

34 PGND Power Ground.
35 DRVL5 Low Side Driver for 5 V Buck Converter.
36 SW5 Switching Node (Inductor) Connection for 5 V Buck Converter.
37 DRVH5 High Side Gate Driver for 5 V Buck Converter.
38 BST5 Boost Capacitor Connection for High Side Gate Driver of the 5 V Buck Converter.

directly.

IN

ABSOLUTE MAXIMUM RATINGS*

VIN to AGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +27 V

AGND to PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 0.3 V

INTVCC . . . . . . . . . . . . . . . . . . . . . . AGND – 0.3 V to +6 V

BST5, BST3 to PGND . . . . . . . . . . . . . . . . . –0.3 V to +32 V

BST5 to SW5 . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

BST3 to SW3 . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

CS5, CS3 . . . . . . . . . . . . . . . . . . . . . . AGND – 0.3 V to VIN

SW3, SW5 to PGND . . . . . . . . . . . . . . –0.3 V to VIN + 0.3 V

SD . . . . . . . . . . . . . . . . . . . . . . . . . AGND – 0.3 V to +27 V

DRVL5/3 to PGND . . . . . . . . . –0.3 V to (INTVCC + 0.3 V)

DRVH5/3 to SW5/3 . . . . . . . . . –0.3 V to (INTVCC + 0.3 V)

All Other Inputs and Outputs

. . . . . . . . . . . . . . . . . . AGND – 0.3 V to INTVCC + 0.3 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98°C/W

θ

JA

Operating Ambient Temperature Range . . . . –40°C to +85°C

Junction Temperature Range . . . . . . . . . . . . –40°C to +150°C

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C

*This is a stress rating only; operation beyond these limits can cause the device to

be permanently damaged.

ORDERING GUIDE

Model Temperature Range Package Description Package Option

ADP3020ARU –40°C to +85°C Thin Shrink Small Outline RU-38

PIN CONFIGURATION

CS5

FB5

EAN5

EAO5

ADJ/FX5

SS5

CLSET5

REF

AGND

CLSET3

MODE

SYNC

SS3

ADJ/FX3

EAO3

EAN3

FB3

CS3

PFI

1

2

3

4

5

6

7

ADP3020

8

TOP VIEW

9

(Not to Scale)

10

11

12

13

14

15

16

17

18

19

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

BST5

DRVH5

SW5

DRVL5

PGND

SD

AUXVCC

INTVCC

VIN

DRVL3

SW3

DRVH3

BST3

DRV2

FB2

SD2

CPOR

PWRGD

PFO

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3020 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

REV. 0

–5–

ADP3020

INPUT

5V

2.5V

3.3V

1.2V

AUXVCC

INTVCC

REF

AGND

PFO

PFI

MODE

SYNC

PWRGD

CPOR

DRV2

FB2

SD2

SD

ON5

4.7V

VIN

30

ADP3020

CONTROL

LOGIC

+2%

0%

–2%

EA

+20%

–20%

OC

+

–

+

–

+

–

–

+

+

–

+

–

–

+

+

–

1.22V

1.2V

1.18V

1.2V

1.44V

0.96V

2.5V

INTVCC

1.2V

72mV

+

–

+

–

14mV

+

–

+

–

+

–

–3mV

0.7␮A

4␮A

1

CLSET5

7

38

37

36

35

34

2

3

4

5

6

CS5

BST5

DRVH5

SW5

DRVL5

PGND

FB5

EAN5

EAO5

ADJ/FX5

SS5

V

5V

OUT5

32

–

+

33

4␮A

1.2V
REF

1.2V

+

–

+5V

LINEAR REG

–

+

200kHz/
300kHz/

400kHz

OSC

POWER–

ON

RESET

+

–

SHUTDOWN

Q

ULVO

FB5

S

R

31

8

9

20

19

1.20V

11

12

21

22

25

24

23

1.2V

DUPLICATE FOR SECOND CONTROLLER

Figure 1. Block Diagram (All Switches and Components Are Shown for Fixed Output Operation)

–6–

REV. 0

Typical Performance Characteristics–

OUTPUT CURRENT – A

100

EFFICIENCY – %

90

80

70

60

50

0.01 0.1 1 10

VIN = 6V

VIN = 15V

INPUT VOLTAGE – V

5

CURRENT – ␮A

10 15 20

800

1000

1200

600

25

+85ⴗC

+25ⴗC

–40ⴗC

INPUT VOLTAGE – V

5

CURRENT – ␮A

10 15 20

900

400

25

800

700

600

500

+85ⴗC

+25ⴗC

–40ⴗC

ADP3020

100

90

80

70

EFFICIENCY – %

60

50

0.01 0.1 1 10

VIN = 6V

VIN = 15V

OUTPUT CURRENT – A

Figure 2. Efficiency vs. 5 V Output Current

100

VIN = 6V

90

VIN = 15V

80

Figure 5. Efficiency, 1.5 V Output Current

70

EFFICIENCY – %

60

50

0.01 0.1 1 10

Figure 3. Efficiency vs. 3.3 V Output Current

100

90

80

70

EFFICIENCY – %

OUTPUT CURRENT – A

Figure 6. PWM Mode Input Current vs. Input Voltage

VIN = 6V

VIN = 15V

60

50

0.01 0.1 1 10

Figure 4. Efficiency vs. 2.5 V Output Current

OUTPUT CURRENT – A

Figure 7. PSV Mode Input Current vs. Input Voltage

REV. 0

–7–