ANALOG DEVICES ADP2140 Service Manual

3 MHz, 600 mA, Low Quiescent Current

V

FEATURES

Input voltage range: 2.3 V to 5.5 V LDO input (VIN2) 1.65 V to 5.5 V Buck output voltage range: 1.0 V to 3.3 V LDO output voltage range: 0.8 V to 3.3 V Buck output current: 600 mA LDO output current: 300 mA LDO quiescent current: 22 μA with zero load Buck quiescent current: 20 μA in PSM mode Low shutdown current: <0.3 μA Low LDO dropout 110 mV @ 300 mA load High LDO PSRR

65 dB @ 10 kHz at V

55 dB @ 100 kHz at V Low noise LDO: 40 μV rms at V Initial accuracy: ±1% Current-limit and thermal overload protection Power-good indicator Optional enable sequencing 10-lead 0.75 mm × 3 mm × 3 mm LFCSP package

APPLICATIONS

Mobile phones Personal media players Digital camera and audio devices Portable and battery-powered equipment

GENERAL DESCRIPTION

The ADP2140 includes a high efficiency, low quiescent 600 mA

stepdown dc-to-dc converter and a 300 mA LDO packaged in a small 10-lead 3 mm × 3 mm LFCSP. The total solution requires only four tiny external components.

The buck regulator uses a proprietary high speed current-mode, constant frequency, pulse-width modulation (PWM) control scheme for excellent stability and transient response. To ensure the longest battery life in portable applications, the ADP2140 has a power saving variable frequency mode to reduce switching frequency under light loads.

The LDO is a low quiescent current, low dropout linear regulator designed to operate in a split supply mode with V

1.65 V. The low input voltage minimum allows the LDO to be powered from the output of the buck regulator increasing efficiency and reducing power dissipation. The ADP2140 runs from input voltages of 2.3 V to 5.5 V allowing single Li+/Li− polymer

OUT2

= 1.2 V

OUT2

= 1.2 V

as low as

IN2

Buck with 300 mA LDO Regulator

ADP2140

TYPICAL APPLICATION CIRCUITS

= 3.6

IN1

+

C

IN

10µF

100kΩ

PG EN1 EN2 FB

V

= 1.8V

OUT2

+

C

OUT2

1µF

Figure 1. ADP2140 with LDO Connected to V

= 3.3

IN1

+

C

IN

10µF

100kΩ

PG EN1 EN2 FB

V

= 1.2V

OUT2

+

C

OUT2

1µF

Figure 2. ADP2140 with LDO Connected to Buck Output

cell, multiple alkaline/NiMH cell, PCMCIA, and other standard power sources.

ADP2140 includes a power-good pin, soft start, and internal compensation. Numerous power sequencing options are userselectable through two enable inputs. In autosequencing mode, the highest voltage output enables on the rising edge of EN1. During logic controlled shutdown, the input disconnects from the output and draws less than 300 nA from the input source. Other key features include: undervoltage lockout to prevent deep battery discharge, soft start to prevent input current overshoot at startup, and both short-circuit protection and thermal overload protection circuits to prevent damage in adverse conditions.

When the ADP2140 is used with two 0603 capacitors, one 0402 capacitor, one 0402 resistor, and one 0805 chip inductor, the total solution size is approximately 90 mm print solution to meet a variety of portable applications.

10

9 8 7 6

10

9 8 7 6

ADP2140

VIN1 PGND PG SW EN1 AGND EN2 VOUT2

VIN2

ADP2140

VIN1 PGND PG SW EN1 AGND EN2 VOUT2

VIN2

1 2 3 4 5

2

resulting in the smallest foot-

1µH

V

= 1.2V

OUT

+

C

OUT

10µF

IN1

V

= 1.8V

OUT

+

C

OUT

10µF

07932-001

07932-002

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

ADP2140

REVISION HISTORY

6/10—Revision 0: Initial Version

Rev. 0 | Page 2 of 32

ADP2140

SPECIFICATIONS

V

= 3.6 V, V

IN1

C

= 10 µF, C

OUT

specifications, unless otherwise noted.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

BUCK SECTION

Input Voltage Range V Buck Output Accuracy V V Transient Load Regulation V Load = 50 mA to 250 mA, rise/fall time = 200 ns 75 mV Load = 200 mA to 600 mA, rise/fall time = 200 ns 75 mV

Transient Line Regulation V V V V

PWM To PSM Threshold V

Output Current I

Current Limit I

Switch On Resistance

PFET R

NFET R Switch Leakage Current I Quiescent Current IQ No load, device not switching 20 30 A Minimum On Time ON-TIME Oscillator Frequency FREQ 2.55 3.0 3.15 MHz Frequency Foldback Threshold V Start-Up Time1 t Soft Start Time2 SS

LDO SECTION

Input Voltage Range V LDO Output Accuracy V

1 mA < I Line Regulation Load Regulation3 Dropout Voltage4 V I Ground Current I I I Power Supply Rejection Ratio PSRR V

PSRR on V

100 kHz, V 100 kHz, V 100 kHz, V

IN2

= V

OUT2

+ 0.3 V or 1.65 V, whichever is greater; 5 V EN1 = EN2 = V

OUT2

= 1 µF, L

= 1 H; TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical

OUT

2.3 5.5 V

IN1

I

OUT

TR-LOAD

Line transient = 4 V to 5 V, 4 s rise time

TR-LINE

600 mA

OUT

V

LIM

V

PFET

V

NFET

EN1 = GND, VIN1 = 5.5 V, and SW = 0 V −1 A

LEAK-SW

Output voltage where fSW ≤ 50% of nominal frequency 50 %

FOLD

START-UP

V

TIME

1.65 5.5 V

IN2

I

OUT2

OUT

IN1

V

OUT

IN1

70 ns

MIN

OUT

OUT2

1 mA < I = 25°C

V

/V

OUT2

V

/I

OUT2

DROPOUT

No load, buck disabled 22 35 A

AGND

10 kHz, V

IN2

V

IN2

I

OUT2

I

OUT2

IN2

; I

IN1

= 200 mA, I

OUT

= 10 mA, CIN = 10 F,

OUT2

= 10 mA −1.5 +1.5 % = 2.3 V or (V

+ 0.5 V) to 5.5 V, I

OUT

= 1 mA to 600 mA −2.5 +2.5 %

OUT

= 1.8 V

= 1.0 V 40 mV = 1.8 V 25 mV = 3.3 V 25 mV

= 2.3 V or (V

+ 0.5 V) to 5.5 V 100 mA

OUT

+ 0.5 V) to 5.5 V 1100 1300 mA

OUT

= 2.3 V to 5.5 V 250 mΩ = 2.3 V to 5.5 V 250 mΩ

= 1.8 V, 600 mA load 70 µs = 1.8 V, 600 mA load 150 s

= 10 mA, TJ = 25°C −1 +1 %

−1.5 +1.5 %

= (V

< 300 mA, V

OUT2

< 300 mA, V

OUT2

+ 0.3 V) to 5.5 V, I

OUT2

IN2

= (V

+ 0.3 V) to 5.5 V, TJ

OUT2

+ 0.3 V) to 5.5 V −3 +3 %

OUT2

= 10 mA −0.05 +0.05 %/V

OUT2

= 1 mA to 300 mA 0.001 0.005 %/mA = 10 mA, V = 300 mA, V

= 1.8 V 4 7 mV

OUT2

= 1.8 V 110 200 mV

OUT2

= 10 mA 65 90 A = 300 mA 150 220 A

= V

OUT2

+ 1 V, V

OUT2

= 5 V, I

IN1

= 10 mA

OUT2

= 1.2 V, 1.8 V, 3.3 V 65 dB

= 3.3 V 53 dB = 1.8 V 54 dB = 1.2 V 55 dB

Rev. 0 | Page 3 of 32

ADP2140

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

Output Noise OUT 10 Hz to 100 kHz, V 10 Hz to 100 kHz, V 10 Hz to 100 kHz, V 10 Hz to 100 kHz, V 10 Hz to 100 kHz, V

Current Limit I

Input Leakage Current I

Start-Up Time1 t

Soft Start Time2 SS ADDITIONAL FUNCTIONS

Undervoltage Lockout UVLO

Input Voltage Rising UVLO Input Voltage Falling UVLO

EN Input

EN1, EN2 Input Logic High VIH 2.3 V ≤ V EN1, EN2 Input Logic Low VIL 2.3 V ≤ V EN1, EN2 Input Leakage I

EN1, EN2 = V Shutdown Current I Thermal Shutdown

Threshold TSSD T Hysteresis TS

Power Good

Rising Threshold PG Falling Threshold PG Power-Good Hysteresis PG Output Low VOL I

Leakage Current IOH Power-good pin pull-up voltage = 5.5 V 1 A Buck to LDO Delay t Power-Good Delay t

1

Start-up time is defined as the time between the rising edge of ENx to V

2

Soft start time is defined as the time between V

3

Based on an endpoint calculation using 1 mA and 300 mA loads.

4

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.3 V.

V

NOISE

T

LIM

EN2 = GND, V

LEAK-LDO

V

START-UP

V

TIME

2.23 2.3 V

RISE

2.05 2.16 V

FAL L

EN1, EN2 = V

EN-LKG

V

SHUT

20

SD-HYS

92 %V

RISE

86 %V

FAL L

6 %V

HYS

PWM mode only 5 ms

DELAY

PWM mode only 5 ms

RESET

being at 10% to V

OUTx

= V

= 5 V, I

IN2

IN1

= 25°C 360 500 760 mA

J

= 3.3 V, 300 mA load 70 µs

OUT2

= 3.3 V, 300 mA load 130 s

OUT2

≤ 5.5 V 1.0 V

IN1

≤ 5.5 V 0.27 V

IN1

= 5.5 V, EN1, EN2 = GND, TJ = −40°C to +85°C 0.3 1.2 A

IN1

rising 150

J

= 4 mA 0.2 V

SINK

OUTx

being at 90% of the V

OUTx

= 10 mA

OUT2

= 0.8 V 29 µV rms

OUT2

= 1.2 V 40 µV rms

OUT2

= 1.8 V 50 µV rms

OUT2

= 2.5 V 66 µV rms

OUT2

= 3.3 V 88 µV rms

OUT2

= 5.5 V and V

IN2

or GND 0.05 µA

IN1

or GND 1 µA

IN1

being at 10% of the V

= 0 V 1 A

OUT2

nominal value.

OUTx

nominal value.

OUTx

°C °C

OUT

RECOMMENDED SPECIFICATIONS: CAPACITORS AND INDUCTOR

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

MINIMUM INPUT AND OUTPUT CAPACITANCE1

Buck C LDO C

MIN

CAPACITOR ESR

Buck R LDO R

MINIMUM INDUCTOR IND

1

The minimum input and output capacitance should be greater than 0.70 F over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R- and X5R-type capacitors are recommended, Y5V and Z5U capacitors are not recommended for use with any LDO.

ESR

MIN

Rev. 0 | Page 4 of 32

TA = −40°C to +125°C

7.5 10 µF

0.7 1.0 µF Ω

0.001 0.01 Ω

0.001 1 Ω

0.7 1 H

ADP2140

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

VIN1, VIN2 to PGND, AGND −0.3 V to +6.5 V

VOUT2 to PGND, AGND −0.3 V to V

SW to PGND, AGND −0.3 V to V

IN2

IN1

FB to PGND, AGND −0.3 V to +6.5 V

PG to PGND, AGND −0.3 V to +6.5 V

EN1, EN2 to PGND, AGND −0.3 V to +6.5 V

Storage Temperature Range −65°C to +150°C

Operating Ambient Temperature Range −40°C to +85°C

Operating Junction Temperature Range −40°C to +125°C

Soldering Conditions JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in com-

bination. The ADP2140 can be damaged when the junction

temperature limits are exceeded. Monitoring ambient temperature

does not guarantee that T

limits. In applications with high power dissipation and poor

thermal resistance, the maximum ambient temperature may

need to be derated.

In applications with moderate power dissipation and low

is within the specified temperature

J

Junction-to-ambient thermal resistance (θ based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent on the application and board layout. In applications where high maximum power dissipation exists, close attention to thermal board design is required. The value of θ on PCB material, layout, and environmental conditions. The specified values of θ board. Refer to JESD 51-7 for detailed information on the board construction.

For more information, see

and Manufacturing Guide for the Lead Frame Chip Scale Package (LFCSP).

Ψ

is the junction-to-board thermal characterization parameter

JB

with units of °C/W. Ψ calculation using a 4-layer board. The JESD51-12, Guidelines for Reporting and Using Package Thermal Information, states that thermal characterization parameters are not the same as thermal resistances. Ψ multiple thermal paths rather than a single path, as in thermal resistance, θ from the top of the package as well as radiation from the package, factors that make Ψ Maximum junction temperature (T board temperature (T formula

T

= TB + (PD × ΨJB)

J

Refer to JESD51-8 and JESD51-12 for more detailed information about Ψ

printed circuit board (PCB) thermal resistance, the maximum

ambient temperature can exceed the maximum limit as long as

the junction temperature is within specification limits. The

junction temperature (T

ambient temperature (T

(P

), and the junction-to-ambient thermal resistance of the

D

package (θ

).

JA

Maximum junction temperature (T

ambient temperature (T

) of the device is dependent on the

J

), the power dissipation of the device

A

) is calculated from the

J

) and power dissipation (PD) using the

A

formula

T

= TA + (PD × θJA)

J

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type θJA ΨJB Unit

10-Lead 3 mm × 3 mm LFCSP 35.3 16.9 °C/W

ESD CAUTION

are based on a 4-layer, 4 in. × 3 in. circuit

JA

AN-772 Application Note, A Design

of the package is based on modeling and

JB

measures the component power flowing through

JB

. Therefore, ΨJB thermal paths include convection

JB

more useful in real-world applications.

JB

J

) and power dissipation (PD) using the

B

.

JB

) of the package is

JA

may vary, depending

JA

) is calculated from the

Rev. 0 | Page 5 of 32

ADP2140

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

PGND

AGND

NOTES

1. THE EXPOSED PAD ON THE BOTTOM OF T HE LFCSP PACKAGE E NHANCES THERMAL PERF ORMANCE AND IS EL ECTRICALLY CONNECTED TO G ROUND INSIDE THE PACKAGE. IT IS RECOMMENDE D T HAT THE EXPO SED PAD BE CONNECTED TO THE GROUND PL ANE ON THE CIRCUIT BOARD.

SW

VIN2

FB

1 2

ADP2140

TOP VIEW

3

(Not to S cale)

4 5

VIN1

10

PG

9

EN1

8

EN2

7

VOUT2

6

Figure 3. Pin Configuration

Table 5. Pin Function Descriptions

Pin Mnemonic Description

1 PGND Power Ground. 2 SW Connection from Power MOSFETs to Inductor. 3 AGND Analog Ground. 4 FB Feedback from Buck Output. 5 VIN2 LDO Input Voltage. 6 VOUT2 LDO Output Voltage. 7 EN2 Logic 1 to Enable LDO or No Connect for Autosequencing. 8 EN1

Logic 1 to Enable Buck or Initiate Sequencing. This is a dual function pin and the state of EN2 determines which function is operational.

9 PG

Power Good. Open-drain output. PG is held low until both output voltages (which includes the external inductor and capacitor sensed by the FB pin) rise above 92% of nominal value. PG is held high until both

outputs fall below 85% of nominal value. 10 VIN1 Analog Power Input. EP

Exposed Pad. The exposed pad on the bottom of the LFCSP package enhances thermal performance and is

electrically connected to ground inside the package. It is recommended that the exposed pad be connected

to the ground plane on the circuit board.

07932-003

Rev. 0 | Page 6 of 32

ADP2140

TYPICAL PERFORMANCE CHARACTERISTICS

BUCK OUTPUT

V

= 4 V, V

IN1

= 1.8 V, I

OUT

30

= 10 mA, CIN = C

OUT

= 10 µF, TA = 25°C, unless otherwise noted.

OUT

1.82

25

20

15

10

QUIESCENT CURRENT (µA)

5

0

2.3 2.8 3.3 3.8 4.3 4.8 5.3 INPUT VOLTAGE ( V)

–40°C –5°C +25°C +85°C +125°C

07932-004

Figure 4. Quiescent Supply Current vs. Input Voltage, Different Temperatures

3.1

3.0

2.9

2.8

2.7

FREQUENCY (MHz )

+25°C

2.6

2.5

2.3 2.8 3.3 3.8 4.3 4.8 5.3 INPUT VOLTAGE ( V)

–40°C –5°C +85°C +125°C

07932-005

Figure 5. Switching Frequency vs. Input Voltage, Different Temperatures

3.10

3.05

3.00

2.95

2.90

2.85

2.80

FREQUENCY (MHz )

2.75

2.70

2.65

2.60 –60 –40 –20 0 20 40 60 80 100 120 140

TEMPERATURE ( °C)

5.5V

4.6V

3.1V

2.3V

07932-006

Figure 6. Switching Frequency vs. Temperature, Different Input Voltages

1.81

1.80

1.79

1.78

OUTPUT VOLTAGE (V)

1.77

1.76 –40 1258525–5

Figure 7. Output Voltage vs. Temperature, V

LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 50mA LOAD CURRENT = 100mA LOAD CURRENT = 300mA LOAD CURRENT = 600mA

JUNCTION TEM PERATURE (°C)

= 2.3 V, Different Loads

IN1

1200

1150

1100

1050

1000

950

900

850

CURRENT LIMI T (mA)

800

750

700

–60 –40 –20 0 20 40 60 80 100 120 140

JUNCTION TEMPERATURE (° C)

2.3V

3.0V

4.0V

5.0V

5.5V

Figure 8. Current Limit vs. Temperature, Different Input Voltages

140

120

100

80

60

CURRENT (mA)

40

20

0

3.50 5.505.255.004.754.504.254.003.75 INPUT VOLTAGE (V)

–40°C –5°C +25°C +85°C +125°C

Figure 9. PSM to PWM Mode Transition vs. Input Voltage, Different

Temperatures

07932-007

07932-008

07932-009

Rev. 0 | Page 7 of 32

ADP2140

V

= 4 V, V

IN1

OUT

1.82

1.81

1.80

= 1.8 V, I

= 10 mA, CIN = C

OUT

= 10 µF, TA = 25°C, unless otherwise noted.

OUT

3.350

3.325

1.79

1.78

OUTPUT VOLTAGE (V)

1.77

1.76

2.3 5.55.14.74.33.93.53.12.7

Figure 10. Line Regulation, V

LOAD CURRENT = 1mA LOAD CURRENT = 10mA LOAD CURRENT = 50mA LOAD CURRENT = 100mA LOAD CURRENT = 300mA LOAD CURRENT = 600mA

INPUT VOLTAG E ( V)

= 1.8 V, Different Loads

OUT

1.82

1.81

1.80

1.79

1.78

OUTPUT VOLTAGE (V)

1.77

1.76 1 10 100 1000

Figure 11. Load Regulation, V

LOAD CURRENT (mA)

= 1.8 V, V

OUT

IN1

1.22

1.21

1.20

1.19

OUTPUT VOLTAGE (V)

1.18

1.17 1 10 100 1000

Figure 12. Load Regulation, V

LOAD CURRENT (mA)

= 1.2 V, V

OUT

IN1

07932-010

07932-011

= 2.3 V

07932-012

= 2.3 V

3.300

OUTPUT VOLTAGE (V)

3.275

3.250 1 10 100 1000

LOAD CURRENT (mA)

Figure 13. Load Regulation, V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

1 10 100 1000

LOAD CURRENT (mA)

Figure 14. Efficiency vs. Load Current, V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

1 10 100 1000

LOAD CURRENT (mA)

Figure 15. Efficiency vs. Load Current, V

= 3.3 V

OUT

2.5V

3.0V

4.0V

5.0V

5.5V

= 1.8 V, Different Input Voltages

OUT

–40°C –5°C +25°C +85°C +125°C

= 1.8 V, Different Temperatures

OUT

07932-013

07932-014

07932-015

Rev. 0 | Page 8 of 32

ADP2140

V

= 4 V, V

IN1

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

Figure 16. Efficiency vs. Load Current, V

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

Figure 17. Efficiency vs. Load Current, V

= 1.8 V, I

OUT

0

1 10 100 1000

= 10 mA, CIN = C

OUT

LOAD CURRENT (mA)

= 1.2 V, Different Input Voltages

OUT

= 10 μF, TA = 25°C, unless otherwise noted.

OUT

2.5V

3.0V

4.0V

5.0V

5.5V

–40°C –5°C +25°C +85°C

0

1 10 100 1000

LOAD CURRENT (mA)

= 1.2 V, Different Temperatures

OUT

+125°C

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

1 10 100 1000

07932-016

Figure 19. Efficiency vs. Load Current, V

LOAD CURRENT (mA)

= 3.3 V, Different Temperatures

OUT

–40°C –5°C +25°C +85°C +125°C

07932-019

100

90

80

70

60

50

40

EFFICIENCY (%)

30

20

10

0

1 10 100 1000

07932-017

Figure 20. Efficiency vs. Load Current, V

LOAD CURRENT (mA)

= 3.3 V, Different Input Voltages

OUT

4.0V

5.0V

5.5V

07932-018

T

2

1

3

CH1 1.00V CH2 50.0mV M20.0µs A CH1 4.68V

Figure 18. Line Transient, V

INPUT VOLTAGE

OUTPUT VOLTAGE

SWITCH NO DE

T 11.60%CH3 5.00V

= 1.8 V, Power Save Mode, 50 mA,

OUT

= 4 V to 5 V, 4 μs Rise Time

V

IN1

07932-020

Rev. 0 | Page 9 of 32

T

2

1

3

CH1 1.00V CH2 20.0mV M20. 0µ s A CH1 4.68V

Figure 21. Line Transient, V

INPUT VOLTAGE

OUTPUT VOLTAGE

SWITCH NO DE

T 11.60%CH3 5.00V

= 1.8 V, PWM Mode, 600 mA, V

OUT

4 μs Rise Time

= 4 V to 5 V,

IN1

07932-021

ADP2140

V

= 4 V, V

IN1

OUT

= 1.8 V, I

= 10 mA, CIN = C

OUT

= 10 µF, TA = 25°C, unless otherwise noted.

OUT

T

2

1

3

CH1 1.00V CH2 50.0mV M20.0µs A CH1 4.68V

Figure 22. Line Transient, V

INPUT VOLTAGE

OUTPUT VOLTAGE

SWITCH NO DE

T 11.60%CH3 5.00V

= 1.2 V, PSM Mode, 50 mA, V

OUT

4 s Rise Time

T

2

1

INPUT VOLTAGE

OUTPUT VOLTAGE

SWITCH NO DE

= 4 V to 5 V,

IN1

T

2

1

3

CH1 1.00V CH2 20.0mV M20. 0µ s A CH1 4.68V

07932-022

Figure 25. Line Transient, V

INPUT VOLTAGE

OUTPUT VOLTAGE

SWITCH NO DE

T 11.60%CH3 5.00V

= 3.3 V, PWM Mode, 600 mA, V

OUT

07932-025

= 4 V to 5 V,

IN1

4 s Rise Time

T

3

1

2

SWITCH NO DE

LOAD CURRENT

OUTPUT VOLTAGE

3

CH1 1.00V CH2 20.0mV M20. 0µ s A CH1 4.32V

Figure 23. Line Transient, V

T

2

1

3

CH1 1.00V CH2 50.0mV M20. 0µ s A CH1 4.68V

Figure 24. Line Transient, V

T 10.80%CH3 5.00V

= 1.2 V, PWM Mode, 600 mA, V

OUT

4 s Rise Time

INPUT VOLTAGE

OUTPUT VOLTAGE

SWITCH NO DE

T 11.60%CH3 5.00V

= 3.3 V, PSM Mode, 50 mA, V

OUT

4 s Rise Time

= 4 V to 5 V,

IN1

= 4 V to 5 V,

IN1

CH1 200mA CH2 50.0mV M20.0µs A CH1 288mA

07932-023

Figure 26. Load Transient, V

OUT

T 10.40%CH3 5.00V

07932-026

= 1.8 V, 200 mA to 600 mA, Load Current Rise

Time = 200 ns

T

3

1

2

CH1 100mA CH2 50.0mV M20.0µs A CH1 136mA

07932-024

Figure 27. Load Transient, V

SWITCH NO DE

LOAD OUTPUT

OUTPUT VOLTAGE

T 10.40%CH3 5.00V

= 1.8 V, 50 mA to 250 mA, Load Current Rise

OUT

07932-027

Time = 200 ns

Rev. 0 | Page 10 of 32

ANALOG DEVICES ADP2140 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

TYPICAL APPLICATION CIRCUITS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

RECOMMENDED SPECIFICATIONS: CAPACITORS AND INDUCTOR

ABSOLUTE MAXIMUM RATINGS

THERMAL DATA

THERMAL RESISTANCE

ESD CAUTION

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TYPICAL PERFORMANCE CHARACTERISTICS

BUCK OUTPUT