92 % peak efficiency
6 MHz operating frequency
38 µA (typical) no load quiescent current in PFM mode
1.80 V, 1.82 V, 1.85V, 1.875V fixed output voltage
500 mA continuous output current
Input voltage :2.3 V to 5.5 V
0.28 µA (typical) shutdown supply current
Automatic power-saving mode
Compatible with tiny multilayer inductors
Internal synchronous rectifier
Internal compensation
Internal soft start
Output to ground short circuit protection
Current-limit protection
Enable/shutdown logic input
Undervoltage lockout
Thermal shutdown
Ultra small 6-ball 1.17 mm
APPLICATIONS
Mobile phones
Digital cameras
Digital audio
Portable equipment
1-cell Li+/Li-polymer and 3-cell alkaline/nickel
2
WLCSP
Step-Down, DC-to-DC Converter
ADP2121
GENERAL DESCRIPTION
The ADP2121 is a high frequency, low quiescent current, stepdown, dc-to-dc converter optimized for portable applications in
which board area and battery life are critical constraints. Fixed
frequency operation at 6 MHz enables the use of tiny ceramic
inductors and capacitors. Additionally the synchronous rectification
improves efficiency and results in fewer external components. At
high load currents, the device uses a voltage regulating pulse-width
modulation (PWM) mode that maintains a constant frequency
with excellent stability and transient response. At light load
conditions, the ADP2121 can automatically enter a power saving
mode that utilizes pulse-frequency modulation (PFM) to reduce
the effective switching frequency and ensure the longest battery
life in portable applications. During logic controlled shutdown
(EN = 0), the input is disconnected from the output and draws less
than 0.28 A (typical) from the source.
The ADP2121 has an input voltage range of 2.3 V to 5.5 V allowing the
use of a single Li+/Li-polymer cell, multiple alkaline/Ni-MH cell,
PCMCIA, and other standard power sources. The converter is
internally compensated to minimize external components, and its 1.80
V, 1.82 V, 1.85 V, or 1.875 V fixed output can source up to 500 mA.
Other key features include undervoltage lockout (UVLO) to prevent
deep-battery discharge and soft start to prevent input current
overshoot at startup.
TYPICAL APPLICATION CIRCUIT
Figure 1. Circuit Configuration of ADP2121
OUTPUT VOLTAGE OPTIONS
Table 1.
Input Voltage
Range (V)
2.3 - 5.5 100 1.800, 1.850, 1.875
2.3 - 5.5 300 1.820
Rev. PrA
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
All limits are subject to change upon final temperature characterization and release.
2
Transients not included in voltage accuracy specifications. For PFM mode, the V
3
Guaranteed by design.
accuracy specification is for the lower point of the ripple.
OUT
Rev. PrA | Page 3 of 14
ADP2121 Preliminary Technical Data
www.BDTIC.com/ADI
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
VIN −0.3 V to +6 V
VEN/V
VFB/VSW −0.3 V to VIN + 0.2 V
Operating Ambient Temperature –40°C to +85°C
Operating Junction Temperature –40°C to + 125°C @ 500 mA
Storage Temperature –45°C to +150°C
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
ESD (electrostatic discharge)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
−0.3 V to +6 V
MODE
Machine Model −100 V to +100 V
Human Body Model −2000 V to +2000 V
Charged Device Model −500 V to +500 V
THERMAL RESISTANCE
The thermal resistance of the system, θJA, is specified for the
worst-case conditions, that is, a device soldered in a circuit
board for surface-mount packages. The junction-to-ambient
thermal resistance is highly dependent on the application and
board layout. In applications where high maximum power
dissipation exists, attention to thermal board design is required.
The value of θ
and environmental conditions.
Table 4.
Package Type θ
6-Ball WLCSP
2-Layer Board 105 °C/W
4-Layer Board 198 °C/W
Maximum Power Dissipation
2-Layer Board 380 mW
4-Layer Board 202 mW
may vary, depending on PCB material, layout,
JA
Unit
JA
ESD CAUTION
Rev. PrA | Page 4 of 14
Preliminary Technical Data ADP2121
www.BDTIC.com/ADI
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
BALLA1
INDICATOR
1
2
MODE VIN
A
SW
B
C
(BALL SIDE DOW N)
(BUMPS ON OPPOSITE SIDE)
Figure 3. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
A1 MODE Mode Select. This pin toggles between auto (PFM and PWM switching) and PWM modes. Set MODE low to allow
the part to operate in auto mode. Pull MODE high to force the part to operate in PWM mode.
B1 SW Switch Node.
C1 FB Feedback Divider Input. Connect the output capacitor from FB to GND to set the output voltage ripple and to
complete the control loop.
A2 VIN Power Supply Input.
B2 EN Enable. Pull this pin high to enable the part. Set this pin low to disable the part. Do not leave this pin floating.
C2 GND Ground Pin.
EN
FBGND
TOP VIEW
Not to Scale
07407-003
Rev. PrA | Page 5 of 14
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