Power input voltage range: 2.95 V to 20 V
On-board bias regulator
Minimum output voltage: 0.6 V
0.6 V reference voltage with ±1.0% accuracy
Supports all N-channel MOSFET power stages
Available in 300 kHz, 600 kHz, and 1.0 MHz options
No current-sense resistor required
Power saving mode (PSM) for light loads (ADP1875 only)
Resistor programmable current limit
Power good with internal pull-up resistor
Externally programmable soft start
Thermal overload protection
Short-circuit protection
Standalone precision enable input
Integrated bootstrap diode for high-side drive
Starts into a precharged output
Available in a 16-lead QSOP package
APPLICATIONS
Telecom and networking systems
Mid- to high-end servers
Set-top boxes
DSP core power supplies
GENERAL DESCRIPTION
The ADP1874/ADP1875 are versatile current mode, synchronous
step-down controllers. They provide superior transient response,
optimal stability, and current-limit protection by using a constant
on-time, pseudo fixed frequency with a programmable current
limit, current control scheme. In addition, these devices offer
optimum performance at low duty cycles by using a valley, current
mode control architecture. This allows the ADP1874/ADP1875
to drive all N-channel power stages to regulate output voltages
to as low as 0.6 V.
The ADP1875 is the power saving mode (PSM) version of
the device and is capable of pulse skipping to maintain output
regulation while achieving improved system efficiency at light
loads (see the ADP1875 Power Saving Mode (PSM) section for
more information).
Available in three frequency options (300 kHz, 600 kHz, and
1.0 MHz, plus the PSM option), the ADP1874/ADP1875 are well
suited for a wide range of applications that require a single-input
power supply range from 2.95 V to 20 V. Low voltage biasing is
supplied via a 5 V internal low dropout regulator (LDO).
On-Time and Valley Current Mode
ADP1874/ADP1875
TYPICAL APPLICATIONS CIRCUIT
= 2.95V TO 20
IN
C
C
C
C2
R
C
10k
REG
R
TOP
V
OUT
R
BOT
C
VREG2
C
VREG
R
RES
100
VIN = 5V (PSM)
95
90
85
80
75
70
65
60
VIN = 13V (PSM)
55
EFFICIENCY (%)
50
45
VIN = 16.5V (PSM)
40
35
30
25
101001k10k100k
Figure 2. ADP1874/ADP1875 Efficiency vs. Load Current (V
In addition, soft start programmability is included to limit input inrush current from the input supply during startup and to
provide reverse current protection during precharged output
conditions. The low-side current sense, current gain scheme, and
integration of a boost diode, along with the PSM/forced pulsewidth modulation (PWM) option, reduce the external part count
and improve efficiency.
The ADP1874/ADP1875 operate over the −40°C to +125°C
junction temperature range and are available in a 16-lead QSOP
package.
VIN
ADP1874/
ADP1875
COMPBST
EN
DRVH
FB
GND
VREG
VREG_IN
RES
SW
DRVL
PGOOD
TRACK
PGND
SS
C
IN
C
Q1
BST
C
Q2
R
PGD
V
EXT
C
SS
R
TRK2
R
TRK1
Figure 1. Typical Applications Circuit
VIN = 16.5V
VIN = 13V
TA = 25°C
V
= 1.8V
OUT
f
= 300kHz
SW
WÜRTH INDUCTOR:
744325120, L = 1.2µH, DCR = 1.8m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
LOAD CURRENT (mA)
L
OUT
LOAD
V
MASTER
= 1.8 V, 300 kHz)
OUT
V
OUT
09347-001
09347-102
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC). VREG = 5 V,
BST − SW = VREG − V
RECT_DROP
unless otherwise specified.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
POWER SUPPLY CHARACTERISTICS
High Input Voltage Range VIN C
ADP1874ARQZ-0.3/ADP1875ARQZ-0.3 (300 kHz) 2.95 12 20 V
ADP1874ARQZ-0.6/ADP1875ARQZ-0.6 (600 kHz) 2.95 12 20 V
ADP1874ARQZ-1.0/ADP1875ARQZ-1.0 (1.0 MHz) 3.25 12 20 V
Quiescent Current I
Shutdown Current I
Undervoltage Lockout UVLO Rising VIN (see Figure 35 for temperature variation) 2.65 V
UVLO Hysteresis Falling VIN from operational state 190 mV
INTERNAL REGULATOR
CHARACTERISTICS
VREG Operational Output Voltage VREG C
ADP1874ARQZ-0.3/ADP1875ARQZ-0.3 (300 kHz) 2.75 5 5.5 V
ADP1874ARQZ-0.6/ADP1875ARQZ-0.6 (600 kHz) 2.75 5 5.5 V
ADP1874ARQZ-1.0/ADP1875ARQZ-1.0 (1.0 MHz) 3.05 5 5.5 V
VREG Output in Regulation VIN = 7 V, 100 mA 4.82 4.981 5.16 V
V
Load Regulation 0 mA to 100 mA, VIN = 7 V 32 mV
0 mA to 100 mA, VIN = 20 V 34 mV
Line Regulation VIN = 7 V to 20 V, 20 mA 2.5 mV
V
VIN to VREG Dropout Voltage 100 mA out of VREG, VIN ≤ 5 V 300 415 mV
Short VREG to PGND VIN = 20 V 229 320 mA
SOFT START
Soft Start Period Calculation
ERROR AMPLIFER
FB Regulation Voltage VFB T
T
T
Transconductance Gm 320 496 670 μS
FB Input Leakage Current I
CURRENT-SENSE AMPLIFIER GAIN
Programming Resistor (RES)
Value from RES to PGND
RES = 22 kΩ ± 1% 5.5 6 6.5 V/V
RES = none 11 12 13 V/V
RES = 100 kΩ ± 1% 22 24 26 V/V
Output Source Resistance2 I
Output Sink Resistance2 I
Rise Time3 t
Fall Time3 t
Low-Side Driver
Output Source Resistance2 I
Output Sink Resistance2 I
Rise Time3 t
Fall Time3 t
Propagation Delays
DRVL Fall to DRVH Rise3 t
DRVH Fall to DRVL Rise3 t
SW Leakage Current I
Integrated Rectifier
Channel Impedance I
PRECISION ENABLE THRESHOLD
Logic High Level VIN = 2.9 V to 20 V, VREG = 2.75 V to 5.5 V 605 634 663 mV
Enable Hysteresis VIN = 2.9 V to 20 V, VREG = 2.75 V to 5.5 V 31 mV
COMP VOLTAGE
COMP Clamp Low Voltage V
COMP Clamp High Voltage V
COMP Zero Current Threshold V
THERMAL SHUTDOWN T
Thermal Shutdown Threshold Rising temperature 155 °C
Thermal Shutdown Hysteresis 15 °C
CURRENT LIMIT
Hiccup Current Limit Timing COMP = 2.4 V 6 ms
OVERVOLTAGE AND POWER GOOD
THRESHOLDS
FB Power Good Threshold FB
FB Power Good Hysteresis 30 mV
FB Overvoltage Threshold FBOV V
FB Overvoltage Hysteresis 30 mV
PGOOD Low Voltage During Sink V
PGOOD Leakage Current PGOOD = 5 V 1 400 nA
600 kHz
= 2 V, TJ = 25°C 500 540 580 ns
OUT
= 0.8 V 82 110 ns
OUT
1.0 MHz
= 2 V, TJ = 25°C 285 312 340 ns
OUT
= 1.5 A, 100 ns, positive pulse (0 V to 5 V) 2.25 3 Ω
SOURCE
= 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.70 1 Ω
= 1.5 A, 100 ns, positive pulse (0 V to 5 V) 1.6 2.2 Ω
SOURCE
= 1.5 A, 100 ns, negative pulse (5 V to 0 V) 0.7 1 Ω
SINK
VREG = 5.0 V, CIN = 4.3 nF (see Figure 60) 18 ns
r,DR VL
VREG = 5.0 V, CIN = 4.3 nF (see Figure 59) 16 ns
f,DRV L
BST − SW = 4.4 V (see Figure 59) 15.4 ns
tpdhDRVH
BST − SW = 4.4 V (see Figure 60) 18 ns
tpdhDRVL
BST = 25 V, SW = 20 V, VREG = 5 V 110 μA
SWLEAK
= 10 mA 22 Ω
SINK
COMP(LOW )
Tie EN pin to VREG to enable device
0.47 V
(2.75 V ≤ VREG ≤ 5.5 V)
(2.75 V ≤ VREG ≤ 5.5 V) 2.55 V
COMP(H IGH)
(2.75 V ≤ VREG ≤ 5.5 V) 1.15 V
COMP_ZC T
TMSD
PGOOD
PGD
PGOOD
VFB rising during system power-up 542 566 mV
rising during overvoltage event, I
FB
I
= 1 mA 143 200 mV
PGOOD
Rev. 0 | Page 4 of 44
= 1 mA 691 710 mV
PGOOD
ADP1874/ADP1875
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
TRACKING
Track Input Voltage Range 0 5 V
FB-to-Tracking Offset Voltage 0.5 V < TRACK < 0.6 V, offset = VFB − V
Leakage Current V
1
The maximum specified values are with the closed loop measured at 10% to 90% time points (see Figure and Figure 60), C
MOSFETs being Infineon BSC042N03MS G.
2
Guaranteed by design.
3
Not automatic test equipment (ATE) tested.
= 5 V 1 50 nA
TRACK
63 mV
TRACK
59
= 4.3 nF, and the upper- and lower-side
GATE
Rev. 0 | Page 5 of 44
ADP1874/ADP1875
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
VREG, VREG_IN, TRACK to PGND, GND −0.3 V to +6 V
VIN, EN, PGOOD to PGND −0.3 V to +28 V
FB, COMP, RES, SS to GND −0.3 V to (VREG + 0.3 V)
DRVL to PGND −0.3 V to (VREG + 0.3 V)
SW to PGND −2.0 V to +28 V
BST to SW −0.6 V to (VREG + 0.3 V)
BST to PGND −0.3 V to +28 V
DRVH to SW −0.3 V to VREG
PGND to GND ±0.3 V
PGOOD Input Current 35 mA
θJA (16-Lead QSOP)
4-Layer Board 104°C/W
Operating Junction Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Soldering Conditions JEDEC J-STD-020
Maximum Soldering Lead Temperature
(10 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all other voltages are
referenced to PGND.
300°C
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA Unit
θJA (16-Lead QSOP)
4-Layer Board 104° °C/W
BOUNDARY CONDITION
In determining the values given in Ta b le 2 and Tabl e 3, natural
convection is used to transfer heat to a 4-layer evaluation board.
ESD CAUTION
Rev. 0 | Page 6 of 44
ADP1874/ADP1875
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VIN
1
COMP
2
3
EN
ADP1874/
ADP1875
FB
4
GND
RES
VREG
VREG_IN
TOP VIEW
5
(Not to Scale)
6
7
8
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin
No.
Mnemonic Description
1 VIN High-Side Input Voltage. Connect VIN to the drain of the upper-side MOSFET.
2 COMP
Output of the Error Amplifier. Connect the compensation network between this pin and AGND to achieve stability
(see the Compensation Network section).
3 EN Connect to VREG to Enable IC. When pulled down to AGND externally, disables the IC.
4 FB Noninverting Input of the Internal Error Amplifier. This is the node where the feedback resistor is connected.
5 GND
Analog Ground Reference Pin of the IC. All sensitive analog components should be connected to this ground plane
(see the Layout Considerations section).
6 RES Current Sense Gain Resistor (External). Connect a resistor between the RES pin and GND (Pin 5).
7 VREG
Internal Regulator Supply Bias Voltage for the ADP1874/ADP1875 Controller (Includes the Output Gate Drivers). A
bypass capacitor of 1 μF directly from this pin to PGND and a 0.1 μF across VREG and GND are recommended.
8 VREG_IN Input to the Internal LDO. Tie this pin directly to Pin 7 (VREG).
9 TRACK
Tracking Input. If the tracking function is not used, it is recommended to connect TRACK to VREG through a resistor
higher than 1 MΩ or simply connect TRACK between 0.7 V and 2 V to reduce the bias current going into the pin.
10 SS
Soft Start Input. Connect an external capacitor to GND to program the soft start period. Capacitance value of 10 nF for
every 1 ms of soft start delay.
11 PGOOD
Open-Drain Power Good Output. Sinks current when FB is out of regulation or during thermal shutdown. Connect a
3 kΩ resistor between PGOOD and VREG. Leave unconnected if not used.
12 DRVL
Drive Output for the External Lower-Side, N-Channel MOSFET. This pin also serves as the current-sense gain setting
pin (see Figure 69).
13 PGND Power GND. Ground for the lower-side gate driver and lower-side, N-channel MOSFET.
14 DRVH Drive Output for the External Upper-Side, N-Channel MOSFET.
15 SW Switch Node Connection.
16 BST
Bootstrap for the Upper-Side MOSFET Gate Drive Circuitry. An internal boot rectifier (diode) is connected between
VREG and BST. A capacitor from BST to SW is required. An external Schottky diode can also be connected between
VREG and BST for increased gate drive capability.
16
15
14
13
12
11
10
9
BST
SW
DRVH
PGND
DRVL
PGOOD
SS
TRACK
09347-003
Rev. 0 | Page 7 of 44
ADP1874/ADP1875
TYPICAL PERFORMANCE CHARACTERISTICS
100
95
90
VIN = 13V (PSM)
85
80
75
70
65
60
55
50
45
40
EFFICIENCY (%)
35
VIN = 16.5V (PSM)
30
25
20
15
10
5
0
101001k10k100k
TA = 25°C
V
OUT
f
= 300kHz
SW
WÜRTH INDUCTOR:
744325072, L = 0.72µH, DCR = 1.3m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
LOAD CURRENT (mA)
Figure 4. Efficiency—300 kHz, V
VIN = 13V
= 0.8V
VIN = 16.5V
= 0.8 V
OUT
09347-104
100
95
90
85
80
75
70
65
60
55
50
45
40
EFFICIENCY (%)
35
30
25
20
15
10
5
0
101001k10k100k
VIN = 13V (PSM)
VIN = 16.5V
(PSM)
Figure 7. Efficiency—600 kHz, V
VIN = 13V
VIN = 16.5V
TA = 25°C
= 0.8V
V
OUT
f
= 600kHz
SW
WÜRTH INDUCTOR:
744355147, L = 0.47µH, DCR = 0.67m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
LOAD CURRENT (mA)
= 0.8 V
OUT
09347-107
100
95
VIN = 5V (PSM)
90
85
80
75
70
65
60
55
50
45
40
EFFICIENCY (%)
35
30
25
20
15
10
5
0
VIN = 13V (PSM)
VIN = 16.5V (PSM)
101001k10k100k
LOAD CURRENT (mA)
Figure 5. Efficiency—300 kHz, V
VIN = 16.5V
VIN = 13V
TA = 25°C
= 1.8V
V
OUT
f
= 300kHz
SW
WÜRTH INDUCTOR:
744325120, L = 1.2µH, DCR = 1.8m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
= 1.8 V
OUT
100
VIN = 16.5V (PSM)
95
90
85
80
75
VIN = 13V (PSM)
70
65
60
55
50
45
40
EFFICIENCY (%)
35
30
25
20
15
10
5
0
101001k10k100k
Figure 6. Efficiency—300 kHz, V
VIN = 13V
VIN = 16.5V
TA = 25°C
= 7V
V
OUT
f
= 300kHz
SW
WÜRTH INDUCTOR:
7443551200, L = 2.0µH, DCR = 2.6m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
LOAD CURRENT (mA)
= 7 V
OUT
100
95
90
85
VIN = 13V (PSM)
80
75
70
65
60
55
50
VIN = 16.5V (PSM)
45
40
EFFICIENCY (%)
35
30
25
20
15
10
5
0
101001k10k100k
09347-105
Figure 8. Efficiency—600 kHz, V
VIN = 13V
VIN = 16.5V
TA = 25°C
= 1.8V
V
OUT
f
= 600kHz
SW
WÜRTH INDUCTOR:
744325072, L = 0.72µH, DCR = 1.3m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
LOAD CURRENT (mA)
= 1.8 V
OUT
09347-108
100
95
90
VIN = 16.5V (PSM)
85
80
75
70
65
60
55
50
45
40
EFFICIENCY (%)
35
30
25
20
15
10
5
0
101001k10k100k
09347-106
VIN = 13V (PSM)
VIN = 20V (PSM)
VIN = 20V
TA = 25°C
V
OUT
f
= 600kHz
SW
WÜRTH INDUCTOR:
744318180, L = 1.4µH, DCR = 3.2m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
LOAD CURRENT (mA)
Figure 9. Efficiency—600 kHz, V
VIN = 16.5V
= 5V
OUT
= 5 V
09347-109
Rev. 0 | Page 8 of 44
ADP1874/ADP1875
100
95
90
85
80
75
70
VIN = 13V (PSM)
65
60
55
50
45
40
EFFICIENCY (%)
35
30
VIN = 16.5V (PSM)
25
20
15
10
5
0
101001k10k100k
Figure 10. Efficiency—1.0 MHz, V
VIN = 13V
VIN = 16.5V
TA = 25°C
= 0.8V
V
OUT
f
= 1.0MHz
SW
WÜRTH INDUCTOR:
744303012, L = 0.12µH, DCR = 0.33m
INFINEON FETs:
BSC042N03MS G (UPPER/LOWER)
LOAD CURRENT (mA)
= 0.8 V
OUT
09347-110
0.807
0.806
0.805
0.804
0.803
0.802
0.801
0.800
0.799
0.798
0.797
OUTPUT VOLTAGE (V)
0.796
0.795
VIN = 13V
0.794
0.793
0.792
+125°C
+25°C
–40°C
0200040006000800010,000
VIN = 16.5V
+125°C
+25°C
–40°C
LOAD CURRENT (mA)
Figure 13. Output Voltage Accuracy—300 kHz, V
OUT
= 0.8 V
09347-013
100
95
90
85
80
VIN = 13V (PSM)
75
70
65
60
55
50
45
40
VIN = 16.5V (PSM)
EFFICIENCY (%)
35
30
25
20
15
10
5
0
101001k10k100k
Figure 11. Efficiency—1.0 MHz, V
VIN = 13V
VIN = 16.5V
TA = 25°C
= 1.8V
V
OUT
f
= 1.0MHz
SW
WÜRTH INDUCTOR:
744303022, L = 0.22µH, DCR = 0.33m