Maximum output current: 300 mA
Input voltage range: 2.5 V to 5.5 V
Light load efficient
I
= 75 μA with 100 μA load
GND
Low shutdown current: <1 μA
Very low dropout voltage: 170 mV @ 300 mA load
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±2%
16 fixed output voltage options with soft start:
0.75 V to 3.3 V (ADP1712)
Adjustable output voltage option: 0.8 V to 5.0 V
(ADP1712 Adjustable)
16 fixed output voltage options with reference bypass:
0.75 V to 3.3 V (ADP1713)
16 fixed output voltage options with tracking:
0.75 V to 3.3 V (ADP1714)
Low output noise: 40 μV rms
High PSRR: 72 dB @ 1 kHz
Stable with small 2.2 μF ceramic output capacitor
Excellent load/line transient response
Current limit and thermal overload protection
Logic controlled enable
5-lead TSOT package
APPLICATIONS
Mobile phones
Digital camera and audio devices
Portable and battery-powered equipment
Post dc-dc regulation
GENERAL DESCRIPTION
The ADP1712/ADP1713/ADP1714, available in a tiny, 5-lead
TSOT package, are low dropout linear regulators that operate
from 2.5 V to 5.5 V and provide up to 300 mA of output current.
The low 170 mV dropout voltage at a 300 mA load improves
efficiency and allows operation over a wide input voltage range.
Using a novel scaling architecture, ground current is a very low
75 μA when driving a 100 μA load, making the ADP1712/
ADP1713/ADP1714 ideal for battery-operated portable equipment.
The ADP1712/ADP1713/ADP1714 are available in 16 fixed
output voltage options. The ADP1712 is also available in an
adjustable version, which allows output voltages that range from
0.8 V to 5 V via an external divider. The ADP1712 fixed version
allows an external capacitor to be connected to program the
CMOS Linear Regulator
ADP1712/ADP1713/ADP1714
TYPICAL APPLICATION CIRCUITS
ADP1712
1
2.2µF
IN
2
GND
3
EN
Figure 1. ADP1712 with Fixed Output Voltage and Soft-Start Capacitor, 3.3 V
DP1712
V
.2µ
IN
= 5.5V
ADJUSTABLE
1
IN
2
GND
3
EN
OUT
ADJ
Figure 2. ADP1712 with Adjustable Output Voltage, 0.8 V to 5.0 V
VIN = 3V
2.2µ
ADP1713
1
IN
2
GND
3
EN
OUT
BYP
Figure 3. ADP1713 with Fixed Output Voltage and Bypass Capacitor, 0.75 V
VIN = 3V
2.2µF
1
2
3
DP1714
IN
GND
EN
OUT
TRK
5
4
0V TO 5V
Figure 4. ADP1714 with Output Voltage Tracking
soft-start time. The ADP1713 allows a reference bypass capacitor
to be connected, which reduces output voltage noise and
improves power supply rejection. The ADP1714 includes a
tracking feature, which allows the output to follow an external
voltage rail or reference.
The ADP1712/ADP1713/ADP1714 are optimized for stable
operation with small 2.2 μF ceramic output capacitors, allowing
good transient performance while occupying minimal board
space. An enable pin controls the output voltage on all devices,
and an undervoltage lockout circuit disables the regulator if IN
drops below a minimum threshold. The parts also have short
circuit protection and thermal overload protection, which
prevent damage to the devices in adverse conditions.
OUT
SS
V
OUT
V
OUT
5
4
2.2µF
5
4
V
= 3.3VVIN = 5V
OUT
5
2.2µF
10nF
4
= 0.8V(1 + R1/R2)
2.2µF
R1
R2
V
= 0.75V
OUT
2.2µF
10nF
V
(V)
OUT
3
2
1
0
12345
V
TRK
06455-001
06455-002
06455-003
(V)
06455-004
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
INPUT VOLTAGE RANGE VIN T
OPERATING SUPPLY CURRENT I
I
I
I
I
I
I
I
SHUTDOWN CURRENT I
EN = GND, TJ = –40°C to +125°C 1.0 μA
FIXED OUTPUT VOLTAGE V
ACCURACY (ADP1712 FIXED, 100 μA < I
ADP1713, AND ADP1714)
ADJUSTABLE OUTPUT VOLTAGE V
ACCURACY (ADP1712 ADJUSTABLE)1 100 μA < I
LINE REGULATION ∆V
LOAD REGULATION2 ∆V
I
DROPOUT VOLTAGE3 V
I
I
I
I
I
START-UP TIME4 T
ADP1712 Adjustable and ADP1714 70 μs
ADP1712 External Soft Start CSS = 10 nF 7.3 ms
ADP1713 With 10 nF bypass capacitor 90 μs
CURRENT LIMIT THRESHOLD5 I
THERMAL SHUTDOWN THRESHOLD TSSD T
THERMAL SHUTDOWN HYSTERESIS TS
SOFT-START SOURCE CURRENT SS
(ADP1712 WITH EXTERNAL
SOFT START)
UVLO AC TIVE THRESHOLD UVLO
UVLO INACTIVE THRESHOLD UVLO
UVLO HYSTERESIS UVLO
V
OUT
+ 0.5 V) or 2.5 V (whichever is greater), I
OUT
to V
ACCURACY (ADP1714) V
TRK
= 10 mA, CIN = C
OUT
= –40°C to +125°C 2.5 5.5 V
J
I
GND
EN = GND 0.1 μA
GND-SD
I
OUT
I
OUT
/∆VIN VIN = (V
OUT
/∆I
OUT
OUT
I
DROPOUT
= 0 μA 60 μA
OUT
= 0 μA, TJ = –40°C to +125°C 70 μA
OUT
= 100 μA 75 μA
OUT
= 100 μA, TJ = –40°C to +125°C 85 μA
OUT
= 100 mA 210 μA
OUT
= 100 mA, TJ = –40°C to +125°C 250 μA
OUT
= 300 mA 365 μA
OUT
= 300 mA, TJ = –40°C to +125°C 420 μA
OUT
= 10 mA –1 +1 %
OUT
< 300 mA, TJ = –40°C to +125°C –2 +2 %
OUT
= 10 mA 0.792 0.8 0.808 V
OUT
< 300 mA, TJ = –40°C to +125°C 0.784 0.8 0.816 V
OUT
+ 0.5 V) to 5.5 V, TJ = –40°C to +125°C –0.25 +0.25 %/ V
OUT
I
= 10 mA to 300 mA 0.001 %/mA
OUT
= 10 mA to 300 mA, TJ = –40°C to +125°C 0.004 %/mA
OUT
= 100 mA, V
OUT
= 100 mA, V
OUT
= 300 mA, V
OUT
= 300 mA, V
OUT
= 100 mA, 2.5 V ≤ V
OUT
= 100 mA, 2.5 V ≤ V
I
OUT
OUT
OUT
OUT
OUT
= 2.2 μF, TA = 25°C, unless otherwise noted.
OUT
≥ 3.0 V 60 70 mV
≥ 3.0 V, TJ = –40°C to +125°C 80 mV
≥ 3.0 V 170 205 mV
≥ 3.0 V, TJ = –40°C to +125°C 230 mV
< 3.0 V 70 85 mV
OUT
< 3.0 V, TJ = –40°C to
OUT
95 mV
+125°C
= 300 mA, 2.5 V ≤ V
OUT
= 300 mA, 2.5 V ≤ V
I
OUT
< 3.0 V 200 235 mV
OUT
< 3.0 V, TJ = –40°C to
OUT
270 mV
+125°C
START-UP
380 500 700 mA
LIMIT
rising 150
J
15
SD-HYS
I-SOURCE
ACTIVE
INACTIVE VIN
HYS
TRK-ERROR
SS = GND 0.8 1.2 1.5 μA
VIN falling 2 V
rising 2.45 V
250 mV
0 V ≤ V
= –40°C to +125°C
T
J
0 V ≤ V
= –40°C to +125°C
T
J
≤ (0.5 × V
TRK
≤ (0.5 × V
TRK
OUT(NOM)
OUT(NOM)
), V
), V
OUT(NOM)
OUT(NOM)
≤ 1.8 V,
> 1.8 V,
–40 +40 mV
–80 +80 mV
°C
°C
Rev. A | Page 3 of 16
ADP1712/ADP1713/ADP1714
Parameter Symbol Conditions Min Typ Max Unit
EN INPUT LOGIC HIGH VIH 2.5 V ≤ VIN ≤ 5.5 V 1.8 V
EN INPUT LOGIC LOW VIL 2.5 V ≤ VIN ≤ 5.5 V 0.4 V
EN INPUT LEAKAGE CURRENT V
ADJ INPUT BIAS CURRENT
(ADP1712 ADJUSTABLE)
OUTPUT NOISE OUT
ADP1713
ADP1712 and ADP1714 10 Hz to 100 kHz, VIN = 5.0 V, V
POWER SUPPLY REJECTION RATIO PSRR
ADP1713
ADP1712 and ADP1714 1 kHz, VIN = 5.0 V, V
1
Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of resistors used.
2
Based on an end-point calculation using 10 mA and 300 mA loads. See for typical load regulation performance for loads less than 10 mA. Figure 10
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.5 V.
4
Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
EN = IN or GND 0.1 1 μA
I-LEAKAGE
30 100 nA
ADJ
I-BIAS
NOISE
10 Hz to 100 kHz, V
= 5.0 V, V
IN
= 0.75 V,
OUT
40 μV rms
with 10 nF bypass capacitor
= 3.3 V 380 μV rms
OUT
1 kHz, V
= 5.0 V, V
IN
= 0.75 V, with 10 nF
OUT
72 dB
bypass capacitor
= 3.3 V 65 dB
OUT
Rev. A | Page 4 of 16
ADP1712/ADP1713/ADP1714
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
IN to GND –0.3 V to +6 V
OUT to GND –0.3 V to IN
EN to GND –0.3 V to +6 V
SS/ADJ/BYP/TRK to GND –0.3 V to +6 V
Storage Temperature Range –65°C to +150°C
Operating Junction Temperature Range –40°C to +125°C
Lead Temperature, Soldering (10 sec) 300°C
Soldering Conditions JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA Unit
5-Lead TSOT 170 °C/W
ESD CAUTION
Rev. A | Page 5 of 16
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