Datasheet ADP1710, ADP1711 Datasheet (ANALOG DEVICES)

150 mA, Low Dropout,

V

A

V

V

FEATURES

Maximum output current: 150 mA
Input voltage range: 2.5 V to 5.5 V
Light load efficient

I

= 35 μA with zero load

GND

I

= 40 μA with 100 μA load

GND

Low shutdown current: <1 μA
Low dropout voltage: 150 mV @ 150 mA load
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±2%
Stable with small 1μF ceramic output capacitor
16 fixed output voltage options: 0.75 V to 3.3 V (ADP1710)
Adjustable output voltage option: 0.8 V to 5.0 V

(ADP1710 Adjustable)

16 fixed output voltage options with reference bypass:

0.75 V to 3.3 V (ADP1711)
High PSRR: 69 dB @ 1 kHz
Low noise: 40 μV
Excellent load/line transient response
Current limit and thermal overload protection
Logic controlled enable
5-lead TSOT package

APPLICATIONS

Mobile phones
Digital camera and audio devices
Portable and battery-powered equipment
Post dc-dc regulation

RMS

CMOS Linear Regulator

ADP1710/ADP1711

TYPICAL APPLICATION CIRCUITS

= 5V V

IN

1µF

Figure 1. ADP1710 with Fixed Output Voltage, 3.3 V

= 5.5V

IN

1µF

Figure 2. ADP1710 with Adjustable Output Voltage, 0.8 V to 5.0 V

= 5V V

IN

1µF

Figure 3. ADP1711 with Fixed Output Voltage and Bypass Capacitor, 3.3 V

1

IN

2

GND

3

EN

NC = NO CONNECT

DP1710

ADJUSTABLE

1

IN

2

GND

3

EN

1

IN

2

GND

3

EN

ADP1710

OUT

OUT

ADJ

ADP1711

OUT

BYP

NC

V

5

4

= 3.3V

OUT

5

4

= 0.8V(1 + R1/R2)

OUT

1µF

R1

R2

= 3.3V

OUT

5

10nF

4

1µF

1µF

06310-001

06310-002

6310-003

GENERAL DESCRIPTION

The ADP1710/ADP1711 are low dropout linear regulators
that operate from 2.5 V to 5.5 V and provide up to 150 mA of
output current. Utilizing a novel scaling architecture, ground
current drawn is a very low 40 μA, when driving a 100 μA
load, making the ADP1710/ADP1711 ideal for battery­operated portable equipment.

The ADP1710 and the ADP1711 are each available in sixteen
fixed output voltage options. The ADP1710 is also available in
an adjustable version, which allows output voltages that range
from 0.8 V to 5 V via an external divider. The ADP1711 allows
for a reference bypass capacitor to be connected, which reduces
output voltage noise and improves power supply rejection.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

The ADP1710/ADP1711 are optimized for stable operation with
small 1 μF ceramic output capacitors, allowing for good transient
performance while occupying minimal board space. An enable
pin controls the output voltage on both devices. There is also an
under-voltage lockout circuit on both devices, which disables the
regulator if IN drops below a minimum threshold.

An internal soft start gives a typical start-up time of 80 μs.
Short-circuit protection and thermal overload protection
circuits prevent damage to the devices in adverse conditions.
Both the ADP1710 and the ADP1711 are available in tiny
5lead TSOT packages, for the smallest footprint solution to all
your power needs.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.

ADP1710/ADP1711

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Typical Applicat i o n C i rc uits ............................................................ 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 4

Thermal Resistance ...................................................................... 4

ESD Caution.................................................................................. 4

Pin Configurations and Function Descriptions ........................... 5

Typical Performance Characteristics ............................................. 6

Theory of Operation ........................................................................ 8

Adjustable Output Voltage (ADP1710 Adjustable) ................. 8

Bypass Capacitor (ADP1711)..................................................... 8

Enable Feature ...............................................................................8

Undervoltage L ockout (UVLO) ..................................................9

Application Information................................................................ 10

Capacitor Selection .................................................................... 10

Current Limit and Thermal Overload Protection ................. 10

Thermal Considerations............................................................ 11

Printed Circuit Board Layout Considerations ....................... 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 14

REVISION HISTORY

10/06—Revision 0: Initial Version

Rev. 0 | Page 2 of 16

ADP1710/ADP1711

SPECIFICATIONS

VIN = (V

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT VOLTAGE RANGE V
OPERATING SUPPLY CURRENT I
I
I
I
I
I
I
I
SHUTDOWN CURRENT I
EN = GND, TJ = –40°C to +125°C 1.0 μA
FIXED OUTPUT VOLTAGE ACCURACY V
(ADP1710 AND ADP1711) 100 μA < I
ADJUSTABLE OUTPUT VOLTAGE V
ACCURACY (ADP1710 ADJUSTABLE)1 100 μA < I
LINE REGULATION ∆V
LOAD REGULATION
I
DROPOUT VOLTAGE
I
I
I
I
I
I
I
START-UP TIME

ADP1710 80 μs

ADP1711 With 10 nF bypass capacitor 100 μs
CURRENT LIMIT THRESHOLD
THERMAL SHUTDOWN THRESHOLD TS

THERMAL SHUTDOWN HYSTERESIS TS

UVLO ACTIVE THRESHOLD UVLO
UVLO INACTIVE THRESHOLD UVLO
UVLO HYSTERESIS UVLO
EN INPUT LOGIC HIGH V
EN INPUT LOGIC LOW V
EN INPUT LEAKAGE CURRENT V
ADJ INPUT BIAS CURRENT

(ADP1710 ADJUSTABLE)
OUTPUT NOISE OUT

ADP1710 10 Hz to 100 kHz, V

ADP1711 10 Hz to 100 kHz, V
POWER SUPPLY REJECTION RATIO PSRR

ADP1710 1 kHz, V

ADP1711 1 kHz, V

1

Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances

of resistors used.

2

Based on an end-point calculation using 10 mA and 150 mA loads. See Figure 8 for typical load regulation performance for loads less than 10 mA.

3

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.5 V.

4

Start-up time is defined as the time between the rising edge of EN to OUT being at 90% of its nominal value.

5

Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.

+ 0.5 V) or 2.5 V (whichever is greater), I

OUT

IN

GND

GND-SD

OUT

OUT

/∆VINVIN = (V

2

3

4

5

OUT

∆V

OUT

V

DROPOUT

T

START-UP

I

LIMIT

SD

SD-HYS

IH

IL

I-LEAKAGE

ADJ

/∆I

OUTIOUT

ACTIVEVIN

INACTIVEVIN

HYS

I-BIAS

NOISE

= 1 mA, CIN = C

OUT

= 1 μF, TA = 25°C, unless otherwise noted.

OUT

TJ = –40°C to +125°C 2.5 5.5 V
I

= 0 μA 35 μA

OUT

= 0 μA, TJ = –40°C to +125°C 50 μA

OUT

= 100 μA 40 μA

OUT

= 100 μA, TJ = –40°C to +125°C 80 μA

OUT

= 100 mA 665 μA

OUT

= 100 mA, TJ = –40°C to +125°C 860 μA

OUT

= 150 mA 1 mA

OUT

= 150 mA, TJ = –40°C to +125°C 1.3 mA

OUT

EN = GND 0.1 μA

I

= 1 mA –1 +1 %

OUT

< 150 mA, TJ = –40°C to +125°C –2 +2 %

OUT

I

= 1 mA 0.792 0.8 0.808 V

OUT

< 150 mA, TJ = –40°C to +125°C 0.784 0.816 V

OUT

+ 0.5 V) to 5.5 V, TJ = –40°C to +125°C –0.1 +0.1 %/ V

OUT

= 10 mA to 150 mA 0.002 %/mA
= 10 mA to 150 mA, TJ = –40°C to +125°C 0.004 %/mA

OUT

I

= 100 mA, V

OUT

= 100 mA, V

OUT

= 150 mA, V

OUT

= 150 mA, V

OUT

= 100 mA, 2.5 V ≤ V

OUT

= 100 mA, 2.5 V ≤ V

OUT

= 150 mA, 2.5 V ≤ V

OUT

= 150 mA, 2.5 V ≤ V

OUT

≥ 3.0 V 100 mV

OUT

≥ 3.0 V, TJ = –40°C to +125°C 175 mV

OUT

≥ 3.0 V 150 mV

OUT

≥ 3.0 V, TJ = –40°C to +125°C 250 mV

OUT

< 3.0 V 120 mV

OUT

< 3.0 V, TJ = –40°C to +125°C 200 mV

OUT

< 3.0 V 180 mV

OUT

< 3.0 V, TJ = –40°C to +125°C 300 mV

OUT

180 270 360 mA
TJ rising 150

15

°C

°C

falling 1.95 V
rising 2.45 V

250 mV

2.5 V ≤ VIN ≤ 5.5 V 1.8 V

2.5 V ≤ VIN ≤ 5.5 V 0.4 V
EN = IN or GND 0.1 1 μA

30 100 nA

= 3.3 V 330 μVrms

OUT

= 0.75 V, with 10 nF bypass capacitor 40 μVrms

OUT

= 3.3 V 58 dB

OUT

= 0.75 V, with 10 nF bypass capacitor 69 dB

OUT

Rev. 0 | Page 3 of 16

ADP1710/ADP1711

ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

IN to GND –0.3 V to +6 V
OUT to GND –0.3 V to IN
EN to GND –0.3 V to +6 V
ADJ/BYP to GND –0.3 V to +6 V
Storage Temperature Range –65°C to +150°C
Operating Junction Temperature Range –40°C to +125°C
Soldering Conditions JEDEC J-STD-020

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 3. Thermal Resistance

Package Type θ

5-Lead TSOT 170 °C/W

JA

Unit

ESD CAUTION

Rev. 0 | Page 4 of 16

ADP1710/ADP1711

G

G

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

1

IN

ADP1710

FIXED

2

ND

TOP VIEW

(Not to Scale)

3

EN

NC = NO CONNECT

5

OUT

4

NC

06310-004

IN

ND

EN

1

ADP1710

ADJUSTABLE

2

TOP VIEW

(Not to S cale)

3

5

OUT

4

ADJ

06310-005

GND

EN

1

IN

2

3

ADP1711

TOP VIEW

(Not to S cal e)

5

OUT

4

BYP

06310-006

Figure 4. 5-Lead TSOT (UJ-Suffix) Figure 5. 5-Lead TSOT (UJ-Suffix) Figure 6. 5-Lead TSOT (UJ-Suffix)

Table 4. Pin Function Descriptions

ADP1710
Fixed
Pin No.

ADP1710
Adjustable
Pin No.

ADP1711
Pin No.

Mnemonic Description

1 1 1 IN Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor.
2 2 2 GND Ground.
3 3 3 EN

Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the

regulator. For automatic startup, connect EN to IN.
4 NC No Connect.
4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage.
4 BYP

Connect a 1 nF or greater capacitor (10 nF is recommended) between BYP and GND

to reduce the internal reference noise for low noise applications.
5 5 5 OUT Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor.

Rev. 0 | Page 5 of 16

ADP1710/ADP1711

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 3.8 V, I

3.34

3.33

3.32

3.31

3.30

3.29

(V)

OUT

3.28

V

3.27

3.26

3.25

3.24

3.23

3.32

3.31

3.30

(V)

3.29

OUT

V

3.28

3.27

3.26

0.1 1000

3.32

3.31

3.30

(V)

3.29

OUT

V

3.28

3.27

3.26

3.3 3.8 4.3 4.8 5.3

= 1 mA, CIN = C

OUT

–40

–5 25 85 125

I

LOAD

= 1 μF, TA = 25°C, unless otherwise noted.

OUT

I

= 10mA

LOAD

I

= 1mA

LOAD

I

= 100µA

LOAD

= 50mA

I

= 100mA

LOAD

I

= 150mA

LOAD

(°C)

T

J

Figure 7. Output Voltage vs. Junction Temperature

1 10 100

(mA)

I

LOAD

Figure 8. Output Voltage vs. Load Current

I

LOAD

I

LOAD

= 100µA

= 50mA

LOAD

I

LOAD

= 1mAI

= 100mA

(V)

V

IN

LOAD

I

LOAD

= 10mAI

= 150mA

Figure 9. Output Voltage vs. Input Voltage

1100

1000

I

–40

LOAD

I

LOAD

I

LOAD

I

LOAD

= 150mA

= 100mA

= 50mA

I

= 1mA

= 10mA

LOAD

–5 25 85 125

(°C)

T

J

I

LOAD

= 100µA

06310-010

900
800
700
600

(µA)

500

GND

I

400
300
200
100

0

06310-007

Figure 10. Ground Current vs. Junction Temperature

1100
1000

900
800
700
600

(µA)

500

GND

I

400
300
200
100

0

0.1

06310-008

110100

(mA)

I

LOAD

1000

06310-011

Figure 11. Ground Current vs. Load Current

1500
1400
1300
1200
1100
1000

900
800

(µA)

700

GND

I

600
500
400
300
200
100

0

3.3 3.8 4.3 4.8 5.3

06310-009

I

LOAD

I

LOAD

I

LOAD

I

LOAD

= 10mA

= 150mA

= 100mA

= 50mA

I

V

LOAD

IN

(V)

= 1mA I

LOAD

= 100µA

06310-012

Figure 12. Ground Current vs. Input Voltage

Rev. 0 | Page 6 of 16

ADP1710/ADP1711

180

160

140

120

(mV)

100

80

DROPOUT

V

60

40

20

0

0.1 1000

1 10 100

(mA)

I

LOAD

Figure 13. Dropout Voltage vs. Load Current

06310-013

0

V

= 50mV

RIPPLE

V

= 5V

IN

–10

V

= 0.75V

OUT

C

= 1µF

OUT

–20

–30

I

LOAD

= 50mA

–40

–50

PSRR (dB)

–60

–70

I

LOAD

= 100µA

I

LOAD

10mA

=

–80

–90

10 10M

100 1k 10k 100k 1M

FREQUENCY (Hz)

Figure 16. ADP1711 Power Supply Rejection Ratio vs. Frequency

(10 nF Bypass Capacitor)

06310-016

3.35

3.30

3.25

3.20

(V)

3.15

OUT

V

3.10

3.05

3.00

2.95

3.2 3.6

3.3 3.4 3.5

I

= 100µA

LOAD

= 1mA

I

LOAD

= 10mA

I

LOAD

= 50mA

I

LOAD

= 100mA

I

LOAD

= 150mA

I

LOAD

(V)

V

IN

Figure 14. Output Voltage vs. Input Voltage (in Dropout)

7

6

5

I

= 150mA

LOAD

4

(mA)

GND

3

I

I

=

LOAD

10mA

2

I

=

LOAD

1mA

1

I

=

LOAD

100µA

0

3.20 3.60

3.25 3.30 3.35 3.40 3.45 3.50 3.55
V

I
50mA

IN

LOAD

(V)

I

LOAD

=

Figure 15. Ground Current vs. Input Voltage (In Dropout)

= 100mA

0

V

= 50mV

RIPPLE

= 5V

V

IN

–10

–20

–30

= 3.3V

V

OUT

= 1µF

C

OUT

I

= 50mA

I

LOAD

= 10mA

LOAD

–40

–50

PSRR (dB)

–60

I

= 100µA

–70

LOAD

–80

–90

10 10M

100 1k 10k 100k 1M

06310-014

FREQUENCY (Hz)

06310-017

Figure 17. ADP1710 Power Supply Rejection Ratio vs. Frequency

06310-015

Rev. 0 | Page 7 of 16

ADP1710/ADP1711

A

THEORY OF OPERATION

The ADP1710/ADP1711 are low dropout, CMOS linear
regulators that use an advanced, proprietary architecture to
provide high power supply rejection ratio (PSRR) and excellent
line and load transient response with just a small 1 μF ceramic
output capacitor. Both devices operate from a 2.5 V to 5.5 V
input rail and provide up to 150 mA of output current.
Incorporating a novel scaling architecture, ground current is
very low when driving light loads. Ground current in shutdown
mode is typically 100 nA.

IN

SHUTDOWN

AND UVLO

EN

NC = NO CONNECT

CURRENT LIMI T

THERMAL PROTECT

GND

Figure 18. Internal Block Diagram

REFERENCE

+

OUT

NC/

DJ/

BYP

06310-018

Internally, the ADP1710/ADP1711 each consist of a reference,
an error amplifier, a feedback voltage divider, and a PMOS pass
transistor. Output current is delivered via the PMOS pass
device, which is controlled by the error amplifier. The error
amplifier compares the reference voltage with the feedback
voltage from the output and amplifies the difference. If the
feedback voltage is lower than the reference voltage, the gate of
the PMOS device is pulled lower, allowing more current to pass
and increasing the output voltage. If the feedback voltage is
higher than the reference voltage, the gate of the PMOS device
is pulled higher, allowing less current to pass and decreasing the
output voltage.

The ADP1710 is available in two versions, one with fixed output
voltage options and one with an adjustable output voltage. The
fixed output voltage option is set internally to one of sixteen
values between 0.75 V and 3.3 V, using an internal feedback
network. The adjustable output voltage can be set to between 0.8
V and 5.0 V by an external voltage divider connected from OUT
to ADJ. The ADP1711 is available with fixed output voltage
options and features a bypass pin, which allows an external
capacitor to be connected, which reduces internal reference
noise. All devices are controlled by an enable pin (EN).

ADJUSTABLE OUTPUT VOLTAGE (ADP1710 ADJUSTABLE)

The ADP1710 adjustable version can have its output voltage
set over a 0.8 V to 5.0 V range. The output voltage is set by
connecting a resistive voltage divider from OUT to ADJ. The
output voltage is calculated using the equation

V

= 0.8 V (1 + R1/R2) (1)

OUT

where:

R1 is the resistor from OUT to ADJ.
R2 is the resistor from ADJ to GND.

The maximum bias current into ADJ is 100 nA, so for less
than 0.5% error due to the bias current, use values less than
60 kΩ for R2.

BYPASS CAPACITOR (ADP1711)

The ADP1711 allows for an external bypass capacitor to be
connected to the internal reference, which reduces output
voltage noise and improves power supply rejection. A low
leakage capacitor of 1 nF or greater (10 nF is recommended)
must be connected between the BYP and GND pins.

ENABLE FEATURE

The ADP1710/ADP1711 use the EN pin to enable and disable
the OUT pin under normal operating conditions. As shown in
Figure 19, when a rising voltage on EN crosses the active
threshold, OUT turns on. When a falling voltage on EN crosses
the inactive threshold, OUT turns off.

EN

2

CH1, CH2 (500mV/DIV)

Figure 19. ADP1710 Adjustable Typical EN Pin Operation

OUT

TIME (1ms/DIV)

VIN = 5V

= 1.6V

V

OUT

= 1µF

C

IN

C

= 1µF

OUT

I

LOAD

= 10mA

06310-019

Rev. 0 | Page 8 of 16

ADP1710/ADP1711

As can be seen, the EN pin has hysteresis built in. This prevents
on/off oscillations that can occur due to noise on the EN pin as
it passes through the threshold points.

The EN pin active/inactive thresholds are derived from the IN
voltage. Therefore, these thresholds vary with changing input
voltage.

Figure 20 shows typical EN active/inactive thresholds

when the input voltage varies from 2.5 V to 5.5 V.

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

TYPICAL E N THRESHOLDS ( V )

0.6

0.5

2.50 5.50

2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 5.25

Figure 20. Typical EN Pin Thresholds vs. Input Voltage

EN ACTIVE

EN INACTIVE

HYSTERESIS

V

(V)

IN

06310-020

UNDERVOLTAGE LOCKOUT (UVLO)

The ADP1710/ADP1711 have an undervoltage lockout circuit,
which monitors the voltage on the IN pin. When the voltage on
IN drops below 1.95 V (minimum), the circuit activates, disabling
the OUT pin.

Rev. 0 | Page 9 of 16

ADP1710/ADP1711

V

V

APPLICATION INFORMATION

CAPACITOR SELECTION

Output Capacitor

The ADP1710/ADP1711 are designed for operation with small,
space-saving ceramic capacitors, but they will function with most
commonly used capacitors as long as care is taken about the
effective series resistance (ESR) value. The ESR of the output
capacitor affects stability of the LDO control loop. A minimum of
1 μF capacitance with an ESR of 500 mΩ or less is recommended
to ensure stability of the ADP1710/ADP1711. Transient response
to changes in load current is also affected by output capacitance.
Using a larger value of output capacitance improves the transient
response of the ADP1710/ADP1711 to large changes in load
current.
output capacitance values of 1 μF and 22 μF, respectively.

Figure 21 and Figure 22 show the transient responses for

V

RESPONSE TO LOAD STEP

OUT

FROM 7.5mA TO 142.5mA

Input Bypass Capacitor

Connecting a 1 μF capacitor from IN to GND reduces the
circuit sensitivity to printed circuit board (PCB) layout,
especially when long input traces or high source impedance are
encountered. If greater than 1 μF of output capacitance is
required, the input capacitor should be increased to match it.

Input and Output Capacitor Properties

Any good quality ceramic capacitors can be used with the
ADP1710/ADP1711, as long as they meet the minimum
capacitance and maximum ESR requirements. Ceramic
capacitors are manufactured with a variety of dielectrics, each
with different behavior over temperature and applied voltage.
Capacitors must have a dielectric adequate to ensure the
minimum capacitance over the necessary temperature range
and dc bias conditions. X5R or X7R dielectrics with a voltage
rating of 6.3 V or 10 V are recommended. Y5V and Z5U
dielectrics are not recommended, due to their poor temperature
and dc bias characteristics.

1

10mV/DI

VIN = 5V
V

= 3.3V

OUT

C

= 1µF

IN

C

= 1µF

OUT

TIME (4µs/DIV)

Figure 21. Output Transient Response, C

V

RESPONSE TO LOAD STEP

OUT

FROM 7.5mA TO 142.5mA

1

10mV/DI

TIME (4µs/DIV)

Figure 22. Output Transient Response, C

OUT

VIN = 5V
V
C
C

= 22 μF

OUT

= 1 μF

= 3.3V

OUT

= 22µF

IN

= 22µF

OUT

06310-021

06310-022

PROTECTION

The ADP1710/ADP1711 are protected against damage due to
excessive power dissipation by current and thermal overload
protection circuits. The ADP1710/ADP1711 are designed to
current limit when the output load reaches 270 mA (typical).
When the output load exceeds 270 mA, the output voltage is
reduced to maintain a constant current limit.

Thermal overload protection is included, which limits the
junction temperature to a maximum of 150°C (typical). Under
extreme conditions (that is, high ambient temperature and
power dissipation) when the junction temperature starts to rise
above 150°C, the output is turned off, reducing the output
current to zero. When the junction temperature drops below
135°C, the output is turned on again and output current is
restored to its nominal value.

Consider the case where a hard short from OUT to ground
occurs. At first the ADP1710/ADP1711 current limits, so that
only 270 mA is conducted into the short. If self heating of the
junction is great enough to cause its temperature to rise above
150°C, thermal shutdown activates, turning off the output and
reducing the output current to zero. As the junction
temperature cools and drops below 135°C, the output turns on
and conducts 270 mA into the short, again causing the
junction temperature to rise above 150°C. This thermal
oscillation between 135°C and 150°C causes a current
oscillation between 270 mA and 0 mA, which continues as
long as the short remains at the output.

CURRENT LIMIT AND THERMAL OVERLOAD

Rev. 0 | Page 10 of 16

ADP1710/ADP1711

Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For reliable
operation, device power dissipation must be externally limited
so junction temperatures do not exceed 125°C.

THERMAL CONSIDERATIONS

To guarantee reliable operation, the junction temperature of the
ADP1710/ADP1711 must not exceed 125°C. To ensure the

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

junction temperature stays below this maximum value, the user
needs to be aware of the parameters that contribute to junction
temperature changes. These parameters include ambient
temperature, power dissipation in the power device, and thermal
resistances between the junction and ambient air (θ

). The θJA

JA

number is dependent on the package assembly compounds used

40

20

0

0.5 5.0

and the amount of copper to which the GND pins of the package

θ

JA

(°C/W)

values of the

JA

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

20

0

0.5 5.0

are soldered on the PCB. Table 5 shows typical θ
5lead TSOT package for various PCB copper sizes.

Table 5.

Copper Size (mm2)

01 170
50 152
100 146
300 134
500 131

1

Device soldered to minimum size pin traces.

The junction temperature of the ADP1710/ADP1711 can be
calculated from the following equation:

T

= TA + (PD × θJA) (2)

J

where:

T

is the ambient temperature.

A

is the power dissipation in the die, given by

P

D

= [(VIN – V

P

D

OUT

) × I

] + (VIN × I

LOAD

where:

I

is the load current.

LOAD

I

is the ground current.

GND

V

and V

IN

are the input voltage and output voltage,

OUT

respectively.

) (3)

GND

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

Power dissipation due to ground current is quite small and can
be ignored. Therefore, the junction temperature equation
simplifies to the following:

= TA + {[(VIN – V

T

J

OUT

) × I

] × θJA} (4)

LOAD

20

0

0.5 5.0

As shown in Equation 4, for a given ambient temperature, input
to output voltage differential, and continuous load current,
there exists a minimum copper size requirement for the PCB to
ensure the junction temperature does not rise above 125°C. The
following figures show junction temperature calculations for
different ambient temperatures, load currents, V

IN

to V

OUT

differentials, and areas of PCB copper.

1mA
10mA

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

Figure 23. 500 mm

1mA
10mA

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

Figure 24. 100 mm

1mA
10mA

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

Figure 25. 0 mm

30mA
80mA

30mA
80mA

30mA
80mA

100mA
125mA

V

– V

(V)

IN

OUT

2

of PCB Copper, TA = 25°C

100mA
125mA

V

– V

(V)

IN

OUT

2

of PCB Copper, TA = 25°C

100mA
125mA

V

– V

(V)

IN

OUT

2

of PCB Copper, TA = 25°C

150mA

(LOAD CURRENT)

150mA

(LOAD CURRENT)

150mA

(LOAD CURRENT)

06310-023

06310-024

06310-025

Rev. 0 | Page 11 of 16

ADP1710/ADP1711

140

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

20

1mA
10mA

0

0.5 5.0

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

Figure 26. 500 mm

140

30mA
80mA

100mA
125mA

– V

V

(V)

IN

OUT

2

of PCB Copper, TA = 50°C

150mA

(LOAD CURRENT)

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

06310-026

PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS

Heat dissipation from the package can be improved by increasing
the amount of copper attached to the pins of the ADP1710/
ADP1711. However, as can be seen from
diminishing returns eventually is reached, beyond which an
increase in the copper size does not yield significant heat
dissipation benefits.

Place the input capacitor as close as possible to the IN and GND
pins. Place the output capacitor as close as possible to the OUT
and GND pins. For ADP1711, place the internal reference
bypass capacitor as close as possible to the BYP pin. Use of 0402
or 0603 size capacitors and resistors achieves the smallest
possible footprint solution on boards where area is limited.

GND (BOTTOM)
GND (TOP)

Table 5 , a point of

80

(°C)

J

T

60

40

20

1mA
10mA

0

0.5 5.0

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

Figure 27. 100 mm

140

30mA
80mA

100mA
125mA

– V

V

(V)

IN

OUT

2

of PCB Copper, TA = 50°C

150mA

(LOAD CURRENT)

MAX TJ (DO NOT OPERATE ABOVE THIS POINT)

120

100

80

(°C)

J

T

60

40

20

1mA
10mA

0

0.5 5.0

1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

Figure 28. 0 mm

30mA
80mA

100mA
125mA

– V

V

2

(V)

IN

OUT

of PCB Copper, TA = 50°C

150mA

(LOAD CURRENT)

ADP1710/
ADP1711

IN

06310-027

EN

C3

C2C1

OUT

R1

R2

06310-029

Figure 29. Example PCB Layout

06310-028

Rev. 0 | Page 12 of 16

ADP1710/ADP1711

OUTLINE DIMENSIONS

2.90 BSC

54

0.50

0.30

2.80 BSC

0.95 BSC

*

1.00 MAX

SEATING
PLANE

(UJ-5)

0.20

0.08
8°

4°
0°

0.60

0.45

0.30

1.60 BSC

123

PIN 1

*

0.90

0.87

0.84

0.10 MAX

*

COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

1.90

BSC

Figure 30. 5-Lead Thin Small Outline Transistor Package [TSOT]

Dimensions show in millimeters

Rev. 0 | Page 13 of 16

ADP1710/ADP1711

ORDERING GUIDE

Model

ADP1710AUJZ-0.75R7
ADP1710AUJZ-0.8-R7
ADP1710AUJZ-0.85R7
ADP1710AUJZ-0.9-R7
ADP1710AUJZ-0.95R7
ADP1710AUJZ-1.0-R7
ADP1710AUJZ-1.05R7
ADP1710AUJZ-1.10R7
ADP1710AUJZ-1.15R7
ADP1710AUJZ-1.2-R7
ADP1710AUJZ-1.3-R7
ADP1710AUJZ-1.5-R7
ADP1710AUJZ-1.8-R7
ADP1710AUJZ-2.5-R7
ADP1710AUJZ-3.0-R7
ADP1710AUJZ-3.3-R7
ADP1710AUJZ-R7

1

ADP1711AUJZ-0.75R7
ADP1711AUJZ-0.8-R7
ADP1711AUJZ-0.85R7
ADP1711AUJZ-0.9-R7
ADP1711AUJZ-0.95R7
ADP1711AUJZ-1.0-R7
ADP1711AUJZ-1.05R7
ADP1711AUJZ-1.10R7
ADP1711AUJZ-1.15R7
ADP1711AUJZ-1.2-R7
ADP1711AUJZ-1.3-R7
ADP1711AUJZ-1.5-R7
ADP1711AUJZ-1.8-R7
ADP1711AUJZ-2.5-R7
ADP1711AUJZ-3.0-R7
ADP1711AUJZ-3.3-R7

1

Z = Pb-free part.

Temperature
Range

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

–40°C to +125°C 0.75 5-Lead TSOT UJ-5 L4S
–40°C to +125°C 0.80 5-Lead TSOT UJ-5 L0D
–40°C to +125°C 0.85 5-Lead TSOT UJ-5 L40
–40°C to +125°C 0.90 5-Lead TSOT UJ-5 L41
–40°C to +125°C 0.95 5-Lead TSOT UJ-5 L42
–40°C to +125°C 1.00 5-Lead TSOT UJ-5 L0E
–40°C to +125°C 1.05 5-Lead TSOT UJ-5 L43
–40°C to +125°C 1.10 5-Lead TSOT UJ-5 L47
–40°C to +125°C 1.15 5-Lead TSOT UJ-5 L44
–40°C to +125°C 1.20 5-Lead TSOT UJ-5 L45
–40°C to +125°C 1.30 5-Lead TSOT UJ-5 L46
–40°C to +125°C 1.50 5-Lead TSOT UJ-5 L0F
–40°C to +125°C 1.80 5-Lead TSOT UJ-5 L0G
–40°C to +125°C 2.50 5-Lead TSOT UJ-5 L0H
–40°C to +125°C 3.00 5-Lead TSOT UJ-5 L0J
–40°C to +125°C 3.30 5-Lead TSOT UJ-5 L0K
–40°C to +125°C 0.8 to 5.0 5-Lead TSOT UJ-5 L0L

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

–40°C to +125°C 0.75 5-Lead TSOT UJ-5 L4T
–40°C to +125°C 0.80 5-Lead TSOT UJ-5 L0M
–40°C to +125°C 0.85 5-Lead TSOT UJ-5 L48
–40°C to +125°C 0.90 5-Lead TSOT UJ-5 L49
–40°C to +125°C 0.95 5-Lead TSOT UJ-5 L4A
–40°C to +125°C 1.00 5-Lead TSOT UJ-5 L0N
–40°C to +125°C 1.05 5-Lead TSOT UJ-5 L4C
–40°C to +125°C 1.10 5-Lead TSOT UJ-5 L4G
–40°C to +125°C 1.15 5-Lead TSOT UJ-5 L4D
–40°C to +125°C 1.20 5-Lead TSOT UJ-5 L4E
–40°C to +125°C 1.30 5-Lead TSOT UJ-5 L4F
–40°C to +125°C 1.50 5-Lead TSOT UJ-5 L0P
–40°C to +125°C 1.80 5-Lead TSOT UJ-5 L0Q
–40°C to +125°C 2.50 5-Lead TSOT UJ-5 L0R
–40°C to +125°C 3.00 5-Lead TSOT UJ-5 L0S
–40°C to +125°C 3.30 5-Lead TSOT UJ-5 L0U

Output
Voltage (V)

Package
Description

Package
Option

Branding

Rev. 0 | Page 14 of 16

ADP1710/ADP1711

NOTES

Rev. 0 | Page 15 of 16

ADP1710/ADP1711

NOTES

©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06310-0-10/06(0)

Rev. 0 | Page 16 of 16