ANALOG DEVICES ADP1706, ADP1707, ADP1708 Service Manual
1 A, Low Dropout,
V
A
V
FEATURES
Maximum output current: 1 A
Input voltage range: 2.5 V to 5.5 V
Low shutdown current: <1 μA
Low dropout voltage: 345 mV @ 1 A load
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±2.5%
16 fixed output voltage options with soft start:
0.75 V to 3.3 V (ADP1706)
16 fixed output voltage options with tracking
0.75 V to 3.3 V (ADP1707)
Adjustable output voltage option:
0.8 V to 5.0 V (ADP1708)
Stable with small 4.7 μF ceramic output capacitor
Excellent load/line transient response
Current limit and thermal overload protection
Logic-controlled enable
Available in an 8-lead, exposed paddle SOIC and
3 mm × 3 mm, 8-lead exposed paddle LFCSP
APPLICATIONS
Notebook computers
Memory components
Telecommunications equipment
Network equipment
DSP/FPGA/microprocessor supplies
Instrumentation equipment/data acquisition systems
CMOS Linear Regulator
ADP1706/ADP1707/ADP1708
TYPICAL APPLICATION CIRCUITS
ADP1706
1
EN
2
SENSE
GND
3
V
= 5V
IN
IN
4
IN
Figure 1. ADP1706 with Fixed Output Voltage, 3.3 V
ADP1707
1
EN
2
GND
3
IN
= 5V
4
V
OUT
3
2
1
0
IN
IN
(V)
12345
V
TRK
Figure 2. ADP1707 with Output Voltage Tracking
DP1708
IN
= 5V
1
2
3
4
EN
GND
IN
IN
ADJ
SENSE
OUT
OUT
Figure 3. ADP1708 with Adjustable Output Voltage, 0.8 V to 5.0 V
SS
OUT
OUT
TRK
SENSE
OUT
OUT
(V)
8
7
6
5
10nF
8
7
6
5
8
7
6
5
R2
R1
4.7µF4.7µF
V
OUT
4.7µF4.7µF
V
TRK
4.7µF4.7µF
V
= 0.8V(1 + R1/R2)
OUT
= 3.3V
V
OUT
06640-001
06640-003
06640-002
GENERAL DESCRIPTION
The ADP1706/ADP1707/ADP1708 are CMOS, low dropout
linear regulators that operate from 2.5 V to 5.5 V and provide
up to 1 A of output current. Using an advanced proprietary
architecture, they provide high power supply rejection and
achieve excellent line and load transient response with a small
4.7 μF ceramic output capacitor.
The ADP1706/ADP1707 are available in 16 fixed output voltage options. The ADP1708 is available in an adjustable version,
which allows output voltages that range from 0.8 V to 5.0 V via
an external divider. The ADP1706 allows an external soft start
capacitor to be connected to program the start-up time; the
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
ADP1707 and ADP1708 contain internal soft start capacitors
that give a typical start-up time of 100 μs. The ADP1707
includes a tracking feature that allows the output to follow an
external voltage rail or reference.
The ADP1706/ADP1707/ADP1708 are available in an 8-lead,
exposed paddle SOIC package and an 8-lead, 3 mm × 3 mm
exposed paddle LFCSP, making them not only very compact
solutions but also providing excellent thermal performance for
applications requiring up to 1 A of output current in a small,
low profile footprint.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
ADP1706/ADP1707/ADP1708
TABLE OF CONTENTS
Features.............................................................................................. 1
Applications....................................................................................... 1
Typical Application Circuits............................................................ 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 10
REVISION HISTORY
6/07—Revision 0: Initial Version
Soft Start Function (ADP1706)................................................ 10
Adjustable Output Voltage (ADP1708)................................... 11
Track Mode (ADP1707) ............................................................ 11
Enable Feature ............................................................................ 11
Application Information................................................................ 12
Capacitor Selection .................................................................... 12
Voltage Tracking Applications.................................................. 12
Current Limit and Thermal Overload Protection ................. 12
Thermal Considerations............................................................ 13
PCB Layout Considerations...................................................... 15
Outline Dimensions....................................................................... 16
Ordering Guide .......................................................................... 17
Rev. 0 | Page 2 of 20
ADP1706/ADP1707/ADP1708
SPECIFICATIONS
VIN = (V
Table 1.
Parameter Symbol Test Conditions Min Typ Max Unit
INPUT VOLTAGE RANGE VIN T
OPERATING SUPPLY CURRENT I
I
I
I
I
SHUTDOWN CURRENT I
EN = GND, TJ = −40°C to +125°C 1.0 μA
OUTPUT VOLTAGE ACCURACY
Fixed Output Voltage Accuracy
(ADP1706 and ADP1707)
Adjustable Output Voltage Accuracy
(ADP1708)
LINE REGULATION ∆V
LOAD REGULATION
DROPOUT VOLTAGE
I
I
I
I
START-UP TIME
ADP1707 and ADP1708 100 μs
ADP1706 CSS = 10 nF 7.3 ms
CURRENT LIMIT THRESHOLD
THERMAL SHUTDOWN
Thermal Shutdown Threshold TSSD T
Thermal Shutdown Hysteresis TS
SOFT START SOURCE CURRENT (ADP1706) SS
V
OUT
EN INPUT
EN Input Logic High VIH 2.5 V ≤ VIN ≤ 5.5 V 1.8 V
EN Input Logic Low VIL 2.5 V ≤ VIN ≤ 5.5 V 0.4 V
EN Input Leakage Current V
ADJ INPUT BIAS CURRENT (ADP1708) ADJ
SENSE INPUT BIAS CURRENT SNS
+ 0.6 V) or 2.5 V (whichever is greater), I
OUT
1
2
3
4
5
to V
ACCURACY (ADP1707) V
TRK
= 10 mA, CIN = C
OUT
= –40°C to +125°C 2.5 5.5 V
J
I
GND
EN = GND 0.1 μA
GND-SD
V
I
OUT
I
100 μA < I
V
I
OUT
I
100 μA < I
/∆VIN
OUT
∆V
/∆I
OUT
OUT
V
I
DROPOUT
t
START-UP
I
1.1 1.5 1.8 A
LIMIT
15
SD-HYS
SS = GND 0.6 1.1 1.6 μA
I-SOURCE
TRK-ERROR
EN = IN or GND 0.1 1 μA
I-LEAKAGE
30 100 nA
I-BIAS
4 μA
I-BIAS
= 0 mA 50 μA
OUT
= 100 mA 310 μA
OUT
= 100 mA, TJ = −40°C to +125°C 390 μA
OUT
= 1 A 1.2 mA
OUT
= 1 A, TJ = −40°C to +125°C 1.55 mA
OUT
= 10 mA −1 +1 %
OUT
= 100 μA to 1 A −1.5 +1.5 %
OUT
OUT
= 10 mA 0.792 0.8 0.808 V
OUT
= 100 μA to 1 A 0.788 0.812 V
OUT
OUT
= (V
V
IN
T
= −40°C to +125°C
J
I
OUT
OUT
I
OUT
= −40°C to +125°C
T
J
OUT
OUT
OUT
I
OUT
T
= −40°C to +125°C
J
OUT
I
OUT
= −40°C to +125°C
T
J
rising 150
J
0 V ≤ V
T
= −40°C to +125°C
J
0 V ≤ V
T
= −40°C to +125°C
J
Rev. 0 | Page 3 of 20
+ 0.6 V) to 5.5 V,
OUT
= 10 mA to 1 A, TJ = −40°C to +125°C 0.001 %/mA
= 100 mA, V
= 100 mA, V
= 1 A, V
= 1 A, V
= 100 mA, 2.5 V ≤ V
= 100 mA, 2.5 V ≤ V
= 1 A, 2.5 V ≤ V
= 1 A, 2.5 V ≤ V
≤ (0.5 × V
TRK
≤ (0.5 × V
TRK
= 4.7 μF, TA = 25°C, unless otherwise noted.
OUT
< 1 A, TJ = −40°C to +125°C −2.5 +2.5 %
< 1 A, TJ = −40°C to +125°C 0.780 0.820 V
−0.1 +0.1 %/ V
≥ 3.3 V 33 mV
OUT
≥ 3.3 V,
OUT
≥ 3.3 V 345 mV
OUT
≥ 3.3 V, TJ = −40°C to +125°C 600 mV
OUT
< 3.3 V 35 mV
OUT
< 3.3 V,
OUT
< 3.3 V 365 mV
OUT
< 3.3 V,
OUT
OUT (NOM)
OUT (NOM)
), V
), V
OUT (NOM)
OUT (NOM)
≤ 1.8 V,
> 1.8 V,
55 mV
60 mV
630 mV
−40 +40 mV
−60 +60 mV
°C
°C
ADP1706/ADP1707/ADP1708
Parameter Symbol Test Conditions Min Typ Max Unit
OUTPUT NOISE OUT
10 Hz to 100 kHz, V
POWER SUPPLY REJECTION RATIO PSRR 1 kHz, V
1 kHz, V
1
Accuracy when OUT is connected directly to ADJ. When OUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances
of resistors used.
2
Based on an end-point calculation using 10 mA and 1 A loads. See Figure 11 for typical load regulation performance for loads less than 10 mA.
3
Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 2.5 V.
4
Start-up time is defined as the time between the rising edge of EN to OUT being at 95% of its nominal value.
5
Current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 1.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 1.0 V, or 0.9 V.
10 Hz to 100 kHz, V
NOISE
OUT
OUT
= 0.75 V 125 μV rms
OUT
= 3.3 V 450 μV rms
OUT
= 0.75 V 70 dB
= 3.3 V 56 dB
Rev. 0 | Page 4 of 20
ADP1706/ADP1707/ADP1708
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
IN to GND −0.3 V to +6 V
OUT to GND –0.3 V to IN
EN to GND –0.3 V to +6 V
SS/ADJ/TRK to GND –0.3 V to +6 V
SENSE to GND –0.3 V to +6 V
Storage Temperature Range –65°C to +150°C
Operating Junction Temperature Range –40°C to +125°C
Soldering Conditions JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 3. Thermal Resistance
Package Type θJA Unit
8-Lead SOIC (Exposed Paddle) 58 °C/W
8-Lead 3 mm × 3 mm LFCSP (Exposed Paddle) 66 °C/W
ESD CAUTION
Rev. 0 | Page 5 of 20
ADP1706/ADP1707/ADP1708
G
G
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
EN
1
ADP1706
2
GND
IN
IN
TOP VIEW
3
(Not to S cale)
4
Figure 4. 8-Lead SOIC, ADP1706 Figure 5. 8-Lead LFCSP, ADP1706
EN
1
IN
IN
ADP1707
2
TOP VIEW
3
(Not to S cale)
4
GND
Figure 6. 8-Lead SOIC, ADP1707 Figure 7. 8-Lead LFCSP, ADP1707
EN
1
IN
IN
ADP1708
2
TOP VIEW
3
(Not to Scale)
4
GND
Figure 8. 8-Lead SOIC, ADP1708 Figure 9. 8-Lead LFCSP, ADP1708
8
7
6
5
8
7
6
5
8
7
6
5
SS
SENSE
OUT
OUT
TRK
SENSE
OUT
OUT
ADJ
SENSE
OUT
OUT
PIN 1
1EN
ND
06640-004
ND
06640-006
06640-005
3IN
(Not to Scale)
4IN
1EN
2
3IN
(Not to Scale)
4IN
1EN
2GND
3IN
(Not to Scale)
4IN
ADP1706
TOP VIEW
PIN 1
INDICATOR
ADP1707
TOP VIEW
PIN 1
INDICATOR
ADP1708
TOP VIEW
INDICATOR
2
8SS
7 SENSE
6OUT
5OUT
8TRK
7SENSE
6OUT
5OUT
8 ADJ
7 SENSE
6OUT
5OUT
06640-007
06640-009
06640-008
Table 4. Pin Function Descriptions
ADP1706
Pin No.
1 1 1 EN
ADP1707
Pin No.
ADP1708
Pin No.
Mnemonic Description
Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the
regulator. For automatic startup, connect EN to IN.
2 2 2 GND Ground.
3, 4 3, 4 3, 4 IN Regulator Input Supply. Bypass IN to GND with a 4.7 μF or greater capacitor.
5, 6 5, 6 5, 6 OUT Regulated Output Voltage. Bypass OUT to GND with a 4.7 μF or greater capacitor.
7 7 7 SENSE
Sense. Measures the actual output voltage at the load and feeds it to the error
amplifier. Connect SENSE as close as possible to the load to minimize the effect
of IR drop between the regulator output and the load.
8 N/A N/A SS Soft Start. A capacitor connected to this pin determines the soft start time.
N/A 8 N/A TRK
Track. The output follows the voltage applied at the TRK pin. See the
Operation
section for a more detailed description.
Theory of
N/A N/A 8 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage.
EP EP EP EP
The exposed pad on the bottom of the SOIC package and the LFCSP package. EP
enhances thermal performance and is electrically connected to GND inside the
package. User is recommended to connect EP to the ground plane on the board.
Rev. 0 | Page 6 of 20
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