ANALOG DEVICES ADP1621 Service Manual

Constant-Frequency, Current-Mode

www.BDTIC.com/ADI

FEATURES

92% efficiency (no sense resistor required)
±1.0% initial accuracy
IC supply voltage range: 2.9 V to 5.5 V
Power-input voltage as low as 1.0 V
Capable of high supply input voltage (>5.5 V)

with an e

UVLO and 35 mA shunt regulator

V

IN

External slope compensation with 1 resistor
Programmable operating frequency

(100 k
Lossless current sensing for switch-node voltage <30 V
Resistor current sensing for switch-node voltage >30 V
Synchronizable to external clock
Current-mode operation for excellent line and load transient

r

esponses
10 μA shutdown current
Current limit and thermal overload protection
Soft start in 2048 clock cycles

APPLICATIONS

APD bias
Portable electronic equipment
Isolated dc/dc converter
Step-up/step-down dc/dc converter
LED driver for laptop computer and navigation system
LCD backlighting

GENERAL DESCRIPTION

The ADP1621 is a fixed-frequency, pulse-width modulation
(PWM), current-mode, step-up converter controller. It drives an
external n-channel MOSFET to convert the input voltage to a
higher output voltage. The ADP1621 can also be used to drive
flyback, SEPIC, and forward converter topologies, either isolated
or nonisolated.

The ADP1621 eliminates the use of a current-sense power

sistor by measuring the voltage drop across the on resistance

re
of the n-channel MOSFET. This technique, allowed up to a
maximum voltage of 30 V at the switch node, maximizes
efficiency and reduces cost. For switch-node voltages higher than
30 V or for more accurate current limiting, the CS pin can be
connected to a current-sense resistor in the source of the MOSFET.
The slope compensation is implemented by an external resistor,
allowing a wide range of external components (inductors and
MOSFETs), and can be chosen for various switching frequencies
and input and output voltages.

The ADP1621 supply input voltage range is 2.9 V to 5.5 V, although
hig

her input voltages are possible with the use of a small-signal

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

xternal NPN or a resistor

Hz to 1.5 MHz) with 1 resistor

Step-Up DC/DC Controller

ADP1621

TYPICAL APPLICATION CIRCUIT

L1

4.7µH

D1

C3

C4

1µF

0.1µF

10V

10V

SDSN

COMP

R

COMP

COMP

R

FREQ

31.6kΩ
1%

FREQ

9.09kΩ

C2

120pF

C

1.8nF

f

= 600kHz

OSC

C1 = MURATA GRM31CR60J476M
C

= SANYO POSCAP 6TPE150M

OUT3

L1 = TOKO FDV0630-4R7M

Figure 1. High Efficiency Output Bo

3.3 V Input, 5 V Output (Bootstrapped)

100

90

80

70

60

EFFICIENCY (%)

50

40

30

0.01 10

Figure 2. Efficiency of Circuit Shown in Figure 1

NPN pass transistor or a single resistor. The voltage of the
power input can be as low as 1 V for fuel cell applications. The
switching frequency is set by an external resistor over a range of
100 kHz to 1.5 MHz and can be synchronized to an external
clock by using the SDSN pin. The shutdown quiescent current is
less than 10 μA. The ADP1621 has a thermal shutdown feature
that shuts down the gate driver when the junction temperature
reaches approximately 150°C. The internal soft start circuit limits
inrush current at startup. The ADP1621 is available in the 10-lead
MSOP lead-free package and is specified over the −40°C to +125°C
junction temperature range.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] ©2006 Analog Devices, Inc. All rights reserved.

IN

PIN

CS

ADP1621

GATE

PGND

FB

GND

AGND

M1 = VISHAY Si7882DP
D1 = VISHAY SSA33L

0.1 1

LOAD CURRENT (A)

R

35.7kΩ

S

80Ω

11.5kΩ

M1

ost Converter in Lossless Mode,

V

= 3.3V

IN

R1

1%

C

OUT1

1µF
10V

R2

1%

C1
47µF

6.3V

C
10µF
10V

OUT2

V

= 5V

OUT

1A

C

OUT3

150µF

6.3V
×2

06090-001

06090-042

ADP1621

www.BDTIC.com/ADI

TABLE OF CONTENTS

Features.............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Typical Application Circuit ............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution.................................................................................. 5

Simplified Block Diagram ............................................................... 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics ............................................. 8

Theory of Operation ...................................................................... 12

Control Loop............................................................................... 12

Current-Sense Configurations.................................................. 12

Current Limit.............................................................................. 13

Undervoltage Lockout ............................................................... 13

Shutdown..................................................................................... 13

Soft Start ...................................................................................... 13

Internal Shunt Regulators.......................................................... 13

Setting the Oscillator Frequency and Synchronization

Frequency .................................................................................... 13

Application Information: Boost Converter................................. 14

Duty Cycle................................................................................... 14

Setting the Output Voltage........................................................ 14

Inductor Current Ripple............................................................ 14

Inductor Selection...................................................................... 14

Input Capacitor Selection.......................................................... 15

Output Capacitor Selection....................................................... 15

Diode Selection........................................................................... 15

MOSFET Selection..................................................................... 16

Loop Compensation .................................................................. 16

Slope Compensation.................................................................. 17

Current Limit.............................................................................. 18

Light Load Operation ................................................................ 18

Recommended Component Manufacturers........................... 19

Layout Considerations................................................................... 20

Efficiency Considerations ............................................................. 21

Examples of Application Circuits................................................. 22

Standard Boost Converter—Design Example........................ 22

Bootstrapped Boost Converter................................................. 23

SEPIC Converter Circuit........................................................... 27

Low Voltage Power-Input Circuit ............................................ 27

LED Driver Application Circuits ............................................. 28

Related Parts.................................................................................... 30

Outline Dimensions....................................................................... 31

Ordering Guide .......................................................................... 31

REVISION HISTORY

12/06—Rev. 0 to Rev. A

Changes to Table 1............................................................................ 3

Changes to Table 2............................................................................ 5

Added Table 3.................................................................................... 5

Changes to Table 5.......................................................................... 19

Changes to Ordering Guide.......................................................... 31

7/06—Revision 0: Initial Version

Rev. A | Page 2 of 32

ADP1621

www.BDTIC.com/ADI

SPECIFICATIONS

VIN = 5 V, R

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

MAIN CONTROL LOOP

Internal Soft Start Time tSS 2048 Cycles
PIN Supply Voltage
IN Supply Voltage
Shunt Regulation Voltage V
I
Shunt Resistance R
Current into PIN = 8 mA to 12 mA 7 Ω
IN Quiescent Current IIN V
IN Shutdown Current VIN = 2.9 V to 5.5 V, SDSN = GND 1 10 μA
PIN Supply Current I

Static Mode, No Switching VFB = 1.3 V, V
Shutdown Mode SDSN = GND 1 10 μA

Undervoltage Lockout Threshold at

IN Pin

FB Regulation Voltage VFB T

1.197 1.215 1.233 V
FB Input Current IFB V
Line Regulation

2.9 V ≤ VIN ≤ 5 V, TJ = −40°C to +125°C 0.02 0.072 %/V

Load Regulation
Error Amplifier Transconductance gm 300 μS
COMP Zero-Current Threshold V
COMP Clamp High Voltage V
T
Current-Sense Amplifier Gain n 7.5 9.5 11.5 V/V
Peak Slope-Compensation Current at

CS Pin
CS Pin Leakage Current I
Shutdown Time tSD SDSN pin from high to low or left floating 50 μs
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis

OSCILLATOR

Oscillator Frequency Range
Oscillator Frequency f
Oscillator Frequency Tempco f
SDSN Input Level Threshold V
SDSN Threshold Hysteresis −0.19 V
SDSN Internal Pull-Down Resistor R
Synchronization Minimum Pulse Width t
Synchronization Maximum Pulse Width t
Synchronization Frequency f
GATE Minimum On Time t
GATE Minimum Off Time t
Maximum Duty Cycle
Recommended Maximum

Synchronized Frequency Ratio

= 100 kΩ, f

FREQ

4

= 200 kHz, TJ = −40°C to 125°C, unless otherwise noted.

OSC

1

1

2

3

5

5

6

6, 7

6, 8

V

2.9 V

PIN

VIN 2.9 V

I

SHUNT

Current into IN = 8 mA to 12 mA 13 Ω

SHUNT

PIN

V

V

UVLO

V

= 3 mA, I

IN

= 3 mA, I

IN

= 2.9 V to 5.5 V, VFB = 1.215 V 1.8 3 mA

IN

rising 2.2 2.5 2.8 V

UVLO

hysteresis −80 mV

UVLO

= 25°C 1.203 1.215 1.227 V

A

= 1.215 V, TA = 25°C −75 +25 +75 nA

FB

= 3 mA, TA = 25°C 5.4 5.6 5.7 V

PIN

= 3 mA 5.2 5.6 6.0 V

PIN

COMP

< V

, GATE = 0 V 1 10 μA

COMP,ZCT

SHUNT

SHUNT

V
V

∆VFB/∆VIN 2.9 V ≤ VIN ≤ 5 V, TJ = −40°C to +85°C 0.02 0.06 %/V

∆VFB/∆V

COMP,ZCT

COMP,CLAMP

I

SC,PK

CS,LEAK

T

TMSD

COMP

V

= 1.4 V to 1.5 V −1 −0.1 %

COMP

0.85 1.0 1.15 V
TJ = −40°C to +85°C 1.9 2.0 2.1 V

= −40°C to +125°C 1.9 2.0 2.2 V

J

= 0 V to 100 mV maximum

V

CS

across R

V

= 30 V (GATE low) 5 μA

CS

(GATE high)

S

55 70 85 μA

150 °C

−10 °C

f

100 1500 kHz

OSC

R

OSC

±0.06 %/°C

OSC,TC

SDSN,THRESH

SDSN

SYNC,MIN

SYNC,MAX

SYNC

ON,MIN

OFF,MIN

D

MAX

f

SYNC/fOSC

VIN = V

100 kΩ

V

V

110 1800 kHz

V

V

f

f

= 65 kΩ, TA = 25°C 255 325 395 kHz

FREQ

= 5 V 1.5 1.7 1.9 V

PIN

= 0 V to VIN 45 100 ns

SDSN

= 0 V to VIN 0.8/f

SDSN

= 1.215 V, V

FB

= 1.215 V, V

FB

= 200 kHz, R

SW

= 200 kHz, R

OSC

= 1.0 V 180 215 ns

COMP

= 2.0 V 190 230 ns

COMP

= 100 kΩ 93 97 %

FREQ

= 100 kΩ, f

FREQ

= fSW 1.1 1.2 1.4

SYNC

ns

SYNC

Rev. A | Page 3 of 32

ADP1621

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Parameter Symbol Conditions Min Typ Max Unit

GATE DRIVER

GATE Rise Time
GATE Fall Time

1

The maximum input voltage is the shunt regulation voltage, which is typically 5.5 V and can range from 5.3 V to 6.0 V over the specified temperature range.

2

The ADP1621 is tested in a feedback servo loop, which servos VFB to the internal reference voltage. The voltage change in FB is measured while VIN is changed from

2.9 V to 5 V. The line regulation is calculated by (∆VFB/VFB) × 100%/∆VIN.

3

The ADP1621 is tested in a feedback servo loop, which servos VFB to the internal reference voltage, and V

(1.0 V ≤ V

4

The peak slope-compensation current at the CS pin is typically 70 μA, and effectively clamped at 116 mV. Thus, RS should not exceed 1.6 kΩ (116 mV/70 μA).

5

Guaranteed by design for thermal shutdown. When the thermal junction temperature of the ADP1621 reaches approximately 150°C, the ADP1621 goes into thermal

COMP

shutdown and the GATE voltage is pulled low. When the junction temperature drops below about 140°C, the soft start sequence is initiated and the ADP1621 resumes
normal operation.

6

f

is the natural oscillation frequency, f

OSC

7

Guaranteed by design and bench characterization.

8

To ensure proper synchronization operation, set the synchronization frequency, f

be synchronized to as high as 1.8 MHz, the peak slope-compensation current decreases at higher synchronization frequencies. It is recommended that the maximum
f

be less than 1.4× of f

SYNC

Compensation section in the Application Information: Boost Converter section).

9

GATE rise and fall times are measured from 10% to 90% levels.

9

≤ 2.0 V).

9

is the synchronization frequency, and fSW is the switching frequency. If synchronization is used, then fSW = f

SYNC

and should not exceed 1.8 MHz. The slope-compensation resistor, RS, should be chosen for the synchronization frequency (see the Slope

OSC

tR C
tF C

= 3.3 nF 17 ns

GATE

= 3.3 nF 13 ns

GATE

, to 1.2× of the free-running frequency, f

SYNC

is forced from 1.4 V to 1.5 V. The V

COMP

. Although the switching frequency can

OSC

range is

COMP

; otherwise, fSW = f

SYNC

OSC

.

Rev. A | Page 4 of 32

ADP1621

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ABSOLUTE MAXIMUM RATINGS

Table 2.

Parameter Rating

IN to GND −0.3 V to V
FB, COMP, SDSN, FREQ, GATE to GND −0.3 V to (VIN + 0.3 V)
CS to GND −5 V to +33 V
PIN to PGND −0.3 V to V
Supply Current into IN 25 mA
Supply Current into PIN 35 mA
Storage Temperature Range −55°C to +150°C
Junction Operating Temperature Range1 −55°C to +150°C
Junction Storage Temperature Range −55°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Package Power Dissipation1 (T

1

In applications where high power dissipation and poor package thermal
resistance are present, the maximum ambient temperature may need to be
derated. Maximum ambient temperature (TA,MAX) is dependent on the
maximum operating junction temperature (TJ,MAX = 150oC), the maximum
power dissipation of the device in the application (PD,MAX), and the junction­to-ambient thermal resistance of the package in the application (θ
by the following equation: T

A,MAX = TJ,MAX --- (θJA x PD,MAX).

J,MAX

− TA)/θJA

SHUNT

SHUNT

JA), is given

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

Absolute maximum ratings apply individually only, not in

mbination. Unless otherwise specified, all other voltages are

co
referenced to GND.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 3. Thermal Resistance

Package Type θJA Unit

10-lead MSOP on a 2-layer PCB 200 °C/W
10-lead MSOP on a 4-layer PCB 172 °C/W

Junction-to-ambient thermal resistance of the package is based
on modeling and calculation using 2-layer and 4-layer boards,
and natural convection. The junction-to-ambient thermal
resistance is application- and board-layout dependent. In
applications where high maximum power dissipation exists,
attention to thermal dissipation issues in board design is
required.

ESD CAUTION

Rev. A | Page 5 of 32

ADP1621

www.BDTIC.com/ADI

SIMPLIFIED BLOCK DIAGRAM

FB

COMP

V

OSC

1.4V

FREQ

+

+

CS

PGND

GND

V

REF

1.215V

ERROR

AMPLIFIER

g

m

SET

OSC

SLOPE

COMP

n

SOFT START

(2048 CYCLES)

PWM

COMPARATOR

Figure 3. ADP1621 Simplified Block Diagram

UVLO

5.5V

S

R

100kΩ

ADP1621

GATE

DRIVER

5.5V

PIN

GATE

IN

SDSN

06090-002

Rev. A | Page 6 of 32

ADP1621

C

www.BDTIC.com/ADI

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 SDSN

Shutdown and Synchronization Input. Tur
If SDSN is left floating or when the SDSN is pulled low, the ADP1621 goes into shutdown after 50 μs. If synchronization is
needed, synchronize the switching frequency to an external clock by connecting the external clock to the SDSN

pin. An internal 100 kΩ pull-down resistor is connected from SDSN to GND.
2 GND Ground.
3 COMP

Regulation Control Compensation Node. COMP is the output of

Connect a series RC from COMP to GND to compensate the regulator. The nominal voltage range for this pin is

1.0 V to 2.0 V.

4 FB

Feedback Input. FB is the input to the in

through a resistive voltage divider. The ratio of the voltage divider sets the output voltage. The regulation voltage

at FB is nominally 1.215 V.
5 FREQ

Frequency Control Input. Connect a resistor from FREQ t

between 100 kHz and 1.5 MHz. The nominal voltage of this pin is 1.4 V.
6 PGND

Power Ground Input. PGND is the ground return for the inter

current-sense amplifier. Connect PGND to GND as close to the ADP1621 as possible.
7 GATE

Gate Driver Output. The maximum gate driver output is equal t

external n-channel power MOSFET. Connect GATE to the gate of the MOSFET.
8 PIN

Power Input. PIN powers the gate driver output. An internal 5.5 V shunt regulat

PIN to PGND with a 0.1 μF or greater capacitor.
9 CS

Current-Sense Input. CS is the positive input of the current-se

the CS pin increases linearly from 0 V to a maximum of 116 mV, and the nominal peak slope-compensation output

current is 70 μA. When GATE is off, the CS function is disabled. For current sensing in lossless mode, connect CS to

the drain of the power MOSFET. The absolute maximum voltage at CS is 33 V. For higher accuracy current sensing

or higher switch-node voltages, connect CS to a current-sense power resistor in the source of the power MOSFET.

In both sensing methods, it is required to add a slope-compensation resistor, R

in the inductor current for duty cycles greater than 50%. However, it is recommended to add R

because load transients can momentarily cause the duty cycle to be greater than 50%, even when the steady-

state duty cycle is less than 50%.
10 IN

Input Voltage. IN powers the ADP1621 internal circuitry. An in

Bypass IN to GND with a 0.1 μF or greater capacitor.

1

SDSN

GND

2

OMP

FREQ

ADP1621

3

TOP VIEW

(Not to Scale)

FB

4

5

Figure 4. Pin Configuration

n the ADP1621 on by driving SDSN high; turn it off by driving SDSN low.

ternal transconductance error amplifier. Drive FB from the output voltage

10

IN

CS

9

PIN

8

GATE

7

6

PGND

06090-003

the internal transconductance error amplifier.

o GND to set the free-running switching frequency

nal gate driver and the negative input of the internal

o the PIN voltage. GATE drives the gate of the

or is connected to this pin. Bypass

nse amplifier. When GATE is turned on, the voltage at

, to the CS pin to achieve stability

S

ternal 5.5 V shunt regulator is connected to this pin.

for all duty cycles

S

Rev. A | Page 7 of 32

ADP1621

www.BDTIC.com/ADI

TYPICAL PERFORMANCE CHARACTERISTICS

100

92

90

80

70

60

EFFICIENCY (%)

50

40

30

0.01 10

0.1 1

LOAD CURRENT (A)

TA = 25°C

f

= 220kHz

SW

V

= 3.3V

IN

V

= 5V

OUT

Figure 5. Efficiency vs. Load Current

1

TA = 25°C

= 3.3V

V

IN

= 5V

V

OUT

LOAD = 1A

V

RIPPLES @ 5V

OUT

AC-COUPLED

91

90

89

88

87

EFFICIENCY (%)

86

85

84

100

300 500 700 900 1100 1300 1500

06090-004

SWITCHING FREQUENCY (kHz)

LOAD = 0.5A

LOAD = 1A

TA = 25°C
V
V

= 3.3V

IN
OUT

= 5V

06090-007

Figure 8. Efficiency vs. Switching Frequency

100

10

1

0.1

0.01

I

IN

I

PIN

2

CH1 20mV CH2 2V M 2µs A CH2 2.6V

CH2 = GATE

Figure 6. Output Voltage Ripple of the Circuit Shown in Figure 1

1.21605

TA=25°C

1.21600

1.21595

(V)

1.21590

FB

V

1.21585

1.21580

1.21575

2.5 6.0

3.0 3 .5 4.0 4.5 5.0 5.5

V

(V)

IN

Figure 7. V

vs. VIN

FB

0.001

SUPPLY CURRENT (mA)

0.0001

0.00001
07

123456

6090-005

SUPPLY VOLTAGE (V)

TA = 25°C
NO SWITCHING

06090-008

Figure 9. Supply Current vs. Supply Voltage

2.5

2.0

1.5

(V)

COMP

V

1.0

0.5

0

1.17 1.29

1.19 1. 21 1.23 1.25 1.27

V

06090-006

Figure 10. V

FB

(V)

COMP

vs. VFB

TA = 25°C
V

= 5V

IN

06090-009

Rev. A | Page 8 of 32

ADP1621

www.BDTIC.com/ADI

45

40

35

30

25

20

15

PIN SUPPLY CURRENT (mA)

10

5

0

0 1800

200 400 600 800 1000 1200 1400 1600

SWITCHING FREQUENCY (kHz)

MOSFET QG = 25nC

MOSFET QG = 15nC

MOSFET QG = 7nC

Figure 11. PIN Supply Current vs. Switching Frequency

06090-010

35

TA = 25°C
V

= V

= 5V

IN

30

25

20

15

10

GATE RISE AND FALL TI MES (ns)

5

0

PIN

t

OR

t

IS FROM

R

F

10% TO 90% O F
THE GATE VOLTAGE

05

5 1015202530354045

GATE CAPACITANCE (nF)

Figure 14. GATE Rise and

Fall Times vs. C

t

R

t

GATE

F

0

06090-013

2.60

SDSN = 5V

2.55

(V)

2.50

UVLO

V

2.45

2.40
–50 150

1.03

)

VIN = 5V

1.02

OSC,25°C

f

/

OSC

1.01

f

1.00

0.99

0.98

NORMALIZE D FREQUENCY (

0.97
–50 150

0 50 100

TEMPERATURE (° C)

Figure 12. V

Threshold vs. Temperature

UVLO

0 50 100

TEMPERATURE (° C)

Figure 13. Frequency vs. Temperature

1600

1500

1400

1300

1200

1100

1000

900

(kHz)

800

700

OSC

f

600

500

400

300

200

100

0

0 200

20 40 60 80 100 120 140 160 180

R

06090-011

Figure 15. Oscillator Freq

198

TA = 25°C
R

= 100kΩ

FREQ

197

196

195

(kHz)

OSC

194

f

193

192

191

2

06090-012

345

Figure 16. Oscillator Freq

(kΩ)

FREQ

uency vs. Resistance

V

(V)

IN

uency vs. V

06090-014

06090-015

IN

Rev. A | Page 9 of 32

ADP1621

www.BDTIC.com/ADI

250

VIN = 5V
CS = 30V

200

1.6

1.4

1.2

VIN = 5V
SDSN = 0V

150

100

TEMPERATURE ( °C)

50

0

–40 160

10 60 110

CS LEAKAGE (n A)

Figure 17. Temperature vs. CS Leakage

8

4

0

–4

–8

FB BIAS CURRENT (n A)

–12

–16

–50 150

VFB = 1.2113V AT 25° C
FB BIAS CURRENT I S MEASURED
BY FORCING A CONSTANT 1. 2113V
OVER THE T EMPERATURE RANGE .

0 50 100

TEMPERATURE (° C)

Figure 18. FB Bias Current vs. Temperature

1.0

0.8

0.6

0.4

SHUTDOWN IN CURRENT (µA)

0.2

0
–50 150

06090-016

0 50 100

TEMPERATURE (° C)

06090-019

Figure 20. Shutdown IN Current vs. Temperature

1.2165

VIN = 5V

1.2160
SDSN = 0V

1.2155

1.2150

1.2145

(V)

FB

V

1.2140

1.2135

1.2130

1.2125

1.2120

–50 150

06090-017

050100

TEMPERATURE ( °C)

Figure 21. FB Volta

ge vs. Temperature

06090-020

90

80

70

60

50

40

30

20

10

PEAK SLOPE CO MPENSATIO N CURRENT (µA)

0

1.0

1.2 1.4 1.6 1.8 2. 0

f

OSC

= 550kHz

Figure 19. Slope-Compensation Current vs. f

f

SYNC/fOSC

f

OSC

= 200kHz

SYNC/fOSC

2.2

06090-018

Rev. A | Page 10 of 32

4

2

1

CH1 5V CH2 5V

Figure 22. DCM Switching Waveform

TA = 25°C
V

= 3.3V

IN

V

= 5V

OUT

LOAD = 0.1A
DCM OPERATIO N

CH4 500mAΩ

CH4 = INDUCTOR CURRENT

CH2 = DRAIN VOLT AGE

CH1 = GATE

M2µs A CH1 2.9V

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