ANALOG DEVICES ADP151 Service Manual

CMOS Linear Regulator

ADP151

Rev. E

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NC = NO CONNECT

1

2

3

5

4

1µF

1µF

V

OUT

= 1.8VV

IN

= 2.3V

VOUT

NC

VIN

GND

EN

OFF

ON

08627-001

VIN VOUT

1 2

EN GND

C

OUT

1µF

C

IN

V

OUT

= 1.8V

V

IN

= 2.3V

TOP VIEW

(Not to Scale)

A

B

OFF

ON

08627-002

ADP151

TOP VIEW

(Not to Scale)

4

6

5

GND

VOUT

NC

3

1

2

EN

VIN

NC

08627-047

NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.

ON

OFF

1µF 1µF

V

IN

= 2.3V V

OUT

= 1.8V

Data Sheet

FEATURES

Ultralow noise: 9 µV rms
No noise bypass capacitor required
Stable with 1 µF ceramic input and output capacitors
Maximum output current: 200 mA
Input voltage range: 2.2 V to 5.5 V
Low quiescent current

I

= 10 µA with 0 load

GND

I

= 265 μA with 200 mA load

GND

Low shutdown current: <1 µA
Low dropout voltage: 140 mV at 200 mA load
Initial accuracy: ±1%
Accuracy over line, load, and temperature: ±2.5%
16 fixed output voltage options: 1.1 V to 3.3 V
PSRR performance of 70 dB at 10 kHz
Current-limit and thermal overload protection
Logic controlled enable
Internal pull-down resistor on EN input
5-lead TSOT package
6-lead LFCSP package
4-ball, 0.4 mm pitch WLCSP

Ultralow Noise, 200 mA,

TYPICAL APPLICATION CIRCUIT

Figure 1. TSOT ADP151 with Fixed Output Voltage, 1.8 V

Figure 2. WLCSP ADP151 with Fixed Output Voltage, 1.8 V

APPLICATIONS

RF, VCO, and PLL power supplies
Mobile phones
Digital camera and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Portable medical devices

GENERAL DESCRIPTION

The ADP151 is an ultralow noise, low dropout linear regulator
that operates from 2.2 V to 5.5 V and provides up to 200 mA
of output current. The low 140 mV dropout voltage at 200 mA
load improves efficiency and allows operation over a wide input
voltage range.

Using an innovative circuit topology, the ADP151 achieves
ultralow noise performance without the necessity of a bypass
capacitor, making it ideal for noise-sensitive analog and RF
applications. The ADP151 also achieves ultralow noise per­formance without compromising PSRR or transient line and
load performance. The low 265 μA of quiescent current at
200 mA load makes the ADP151 suitable for battery-operated
portable equipment.

The ADP151 also includes an internal pull-down resistor on the
EN input.

Figure 3. LFCSP ADP151 with Fixed Output Voltage, 1.8 V

The ADP151 is specifically designed for stable operation with
tiny 1 µF, ±30% ceramic input and output capacitors to meet
the requirements of high performance, space constrained
applications.

The ADP151 is capable of 16 fixed output voltage options,
ranging from 1.1 V to 3.3 V.

Short-circuit and thermal overload protection circuits prevent
damage in adverse conditions. The ADP151 is available in tiny
5-lead TSOT, 6-lead LFCSP, and 4-ball, 0.4 mm pitch, halide-free
WLCSP packages for the smallest footprint solution to meet a
variety of portable power application requirements.

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]

www.analog.com

ADP151 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Typical Application Circuit ............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Input and Output Capacitor, Recommended Specifications .. 4

Absolute Maximum Ratings ............................................................ 5

Thermal Data ................................................................................ 5

Thermal Resistance ...................................................................... 5

ESD Caution .................................................................................. 5

Pin Configurations and Function Descriptions ........................... 6

REVISION HISTORY

4/12—Rev. D to Rev. E

Changes to Figure 33 ...................................................................... 13

Updated Outline Dimensions ....................................................... 21

Changes to Ordering Guide .......................................................... 22

3/11—Rev. C to Rev. D

Changes to Current-Limit Threshold Temperature Range ......... 4

Added EPAD Notation .................................................................... 6

Changes to Ordering Guide .......................................................... 22

1/11—Rev. B to Rev. C

Changes to Figure 23 ........................................................................ 9

12/10—Rev. A to Rev. B

Added LFCSP Package ....................................................... Universal

Added Figure 3; Renumbered Sequentially .................................. 1

Added Table 2 Caption; Renumbered Sequentially ..................... 4

Changes to Table 4 ............................................................................ 5

Added Figure 6, Changes to Table 5 ............................................... 6

Changes to Figure 23 ........................................................................ 9

Changes to Figure 37 and Figure 38 ............................................. 14

Typical Performance Characteristics ..............................................7

Theory of Operation ...................................................................... 11

Applications Information .............................................................. 12

Capacitor Selection .................................................................... 12

Enable Feature ............................................................................ 13

Adjustable Output Voltage Operation ..................................... 13

Current-Limit and Thermal Overload Protection ................. 15

Thermal Considerations ............................................................ 15

Printed Circuit Board Layout Considerations ............................ 20

Outline Dimensions ....................................................................... 21

Ordering Guide .......................................................................... 22

Added Figure 51 to Figure 56 ....................................................... 18

Added Figure 59 ............................................................................. 19

Added Figure 62 ............................................................................. 20

Added Figure 65 ............................................................................. 21

Updated Outline Dimensions ....................................................... 21

Changes to Ordering Guide .......................................................... 23

8/10—Rev. 0 to Rev. A

Changes to Figure 8 ........................................................................... 7

Changes to Figure 15 Caption and Figure 16 Caption ................. 8

Changes to Figure 17 Caption and Figure 18 Caption ................. 9

Changes to Ordering Guide .......................................................... 21

3/10—Revision 0: Initial Version

Rev. E | Page 2 of 24

Data Sheet ADP151

I

= 200 mA, TJ = −40°C to +125°C

350

μA

V

< 1.8 V

I

= 100 µA to 200 mA, TJ = −40°C to +125°C

0.009

%/mA

SPECIFICATIONS

VIN = (V

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

INPUT VOLTAGE RANGE VIN TJ = −40°C to +125°C 2.2 5.5 V
OPERATING SUPPLY CURRENT I
I
I
I
I
I
I

SHUTDOWN CURRENT I
EN = GND, TJ = −40°C to +125°C 1.0 µA
OUTPUT VOLTAGE ACCURACY

V
TSOT/LFCSP V
V

100 µA < I
V
100 µA < I

WLCSP V

100 µA < I
V
100 µA < I
REGULATION

Line Regulation ∆V

Load Regulation (TSOT/LFCSP)1 ∆V
I
I
V
I
I

Load Regulation (WLCSP)1 ∆V
I

V
I
I
DROPOUT VOLTAGE2 V
I

TSOT/LFCSP I
I

WLCSP I
I

+ 0.4 V) or 2.2 V, whichever is greater; EN = VIN, I

OUT

I

GND

EN = GND 0.2 µA

GND-SD

I

OUT

TJ = −40°C to +125°C

OUT

TJ = −40°C to +125°C

OUT

/∆VIN VIN = (V

OUT

/∆I

OUT

OUT

/∆I

OUT

OUT

I

DROPOUT

= 0 µA 10 µA

OUT

= 0 µA, TJ = −40°C to +125°C 20 µA

OUT

= 100 µA 20 µA

OUT

= 100 µA, TJ = −40°C to +125°C 40 µA

OUT

= 10 mA 60 µA

OUT

= 10 mA, TJ = −40°C to +125°C 90 µA

OUT

= 200 mA 265 μA

OUT

OUT

= 10 mA −1 +1 %

OUT

OUT

OUT

OUT

OUT

V

OUT

= 100 µA to 200 mA 0.006 %/mA

OUT

= 100 µA to 200 mA, TJ = −40°C to +125°C 0.012 %/mA

OUT

OUT

= 100 µA to 200 mA 0.003 %/mA

OUT

= 100 µA to 200 mA, TJ = −40°C to +125°C 0.008 %/mA

OUT

V

OUT

= 100 µA to 200 mA 0.004 %/mA

OUT

OUT

OUT

= 100 µA to 200 mA 0.002 %/mA

OUT

= 100 µA to 200 mA, TJ = −40°C to +125°C 0.006 %/mA

OUT

= 10 mA 10 mV

OUT

= 10 mA, TJ = −40°C to +125°C 30 mV

OUT

= 200 mA 150 mV

OUT

= 200 mA, TJ = −40°C to +125°C 230 mV

OUT

= 200 mA 135 mV

OUT

= 200 mA, TJ = −40°C to +125°C 200 mV

OUT

= 10 mA, CIN = C

OUT

= 1 µF, TA = 25°C, unless otherwise noted.

OUT

< 1.8 V

< 200 mA, VIN = (V

OUT

+ 0.4 V) to 5.5 V −3 +2 %

OUT

≥1.8 V

< 200 mA, VIN = (V

OUT

< 200 mA, VIN = (V

OUT

+ 0.4 V) to 5.5 V −2.5 +1.5 %

OUT

+ 0.4 V) to 5.5 V −2.5 +2 %

OUT

≥1.8 V

< 200 mA, VIN = (V

OUT

+ 0.4 V ) to 5.5 V, TJ = −40°C to +125°C −0.05 +0.05 %/V

OUT

+ 0.4 V ) to 5.5 V −2 +1.5 %

OUT

< 1.8 V %/mA

≥ 1.8 V

< 1.8 V %/mA

≥1.8 V

Rev. E | Page 3 of 24

ADP151 Data Sheet

CURRENT-LIMIT THRESHOLD4

I

TJ = 0°C to +125°C

220

300

400

mA

Thermal Shutdown Threshold

TSSD

TJ rising

150

°

100 kHz, VIN = 4.3 V, V

= 3.3 V, I

= 10 mA

55 dB

Parameter Symbol Conditions Min Typ Max Unit

START-UP TIME3 t

UNDERVOLTAGE LOCKOUT TJ = −40°C to +125°C

Input Voltage Rising UVLO
Input Voltage Falling UVLO
Hysteresis UVLO

THERMAL SHUTDOWN

Thermal Shutdown Hysteresis TS

EN INPUT

EN Input Logic High VIH 2.2 V ≤ VIN ≤ 5.5 V 1.2 V

EN Input Logic Low VIL 2.2 V ≤ VIN ≤ 5.5 V 0.4 V

EN Input Pull-Down Resistance REN VIN = VEN = 5.5 V 2.6 MΩ
OUTPUT NOISE OUT
10 Hz to 100 kHz, VIN = 5 V, V
10 Hz to 100 kHz, VIN = 5 V, V
POWER SUPPLY REJECTION RATIO PSRR

VIN = V

+ 0.5 V 10 kHz, VIN = 3.8 V, V

OUT

100 kHz, VIN = 3.8 V, V

VIN = V

+ 1 V 10 kHz, VIN = 4.3 V, V

OUT

10 kHz, VIN = 2.2 V, V
100 kHz, VIN = 2.2 V, V

1

Based on an end-point calculation using 0.1 mA and 200 mA loads. See Figure 8 for typical load regulation performance for loads less than 1 mA.

2

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.2 V.

3

Start-up time is defined as the time between the rising edge of EN and V

4

Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V (that is, 2.7 V).

V

STA RT-UP

LIMIT

RISE

FAL L

120 mV

HYS

15

SD-HYS

10 Hz to 100 kHz, VIN = 5 V, V

NOISE

= 3.3 V 180 µs

OUT

1.96 V

1.28 V

= 3.3 V 9 µV rms

OUT

= 2.5 V 9 µV rms

OUT

= 1.1 V 9 µV rms

OUT

= 3.3 V, I

OUT

= 3.3 V, I

OUT

= 3.3 V, I

OUT

OUT

= 1.1 V, I

OUT

= 1.1 V, I

OUT

being at 90% of its nominal value.

OUT

= 10 mA 70 dB

OUT

= 10 mA 55 dB

OUT

= 10 mA 70 dB

OUT

OUT

= 10 mA 70 dB

OUT

= 10 mA 55 dB

OUT

C

°C

INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS

Table 2.

Parameter Symbol Conditions Min Typ Max Unit

Minimum Input and Output

Capacitance

1

Capacitor ESR R

1

The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.

TA = −40°C to +125°C 0.7 µF

C

MIN

TA = −40°C to +125°C 0.001 0.2 Ω

ESR

Rev. E | Page 4 of 24

Data Sheet ADP151

4-Ball, 0.4 mm Pitch WLCSP

260

58

°C/W

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

VIN to GND −0.3 V to +6.5 V
VOUT to GND −0.3 V to VIN
EN to GND −0.3 V to +6.5V
Storage Temperature Range −65°C to +150°C
Operating Junction Temperature Range −40°C to +125°C
Operating Ambient Temperature Range −40°C to +125°C
Soldering Conditions JEDEC J-STD-020

Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in
combination. The ADP151 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that T
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.

In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (T
the device is dependent on the ambient temperature (T
power dissipation of the device (P
thermal resistance of the package (θ

The maximum junction temperature (T
ambient temperature (T
formula

T

= TA + (PD × θJA)

J

The junction-to-ambient thermal resistance (θ
is based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ

is within the specified temperature

J

) of

J

), the

A

), and the junction-to-ambient

D

).

JA

) is calculated from the

J

) and power dissipation (PD) using the

A

) of the package

JA

may vary, depending

JA

on PCB material, layout, and environmental conditions. The
specified values of θ

are based on a 4-laye r, 4 in. × 3 in. circuit

JA

board. See JESD51-7 and JESD51-9 for detailed information
on the board construction. For additional information, see the
AN-617 Application Note, MicroCSP™ Wafer Level Chip Scale
Package, available at www.analog.com.

Ψ

is the junction-to-board thermal characterization parameter

JB

with units of °C/W. Ψ

of the package is based on modeling and

JB

calculation using a 4-layer board. The JESD51-12, Guidelines for
Reporting and Using Electronic Package Thermal Information, states
that thermal characterization parameters are not the same as
thermal resistances. Ψ

measures the component power flowing

JB

through multiple thermal paths rather than a single path as in
thermal resistance, θ

. Therefore, ΨJB thermal paths include

JB

convection from the top of the package as well as radiation from
the package, factors that make Ψ
applications. Maximum junction temperature (T
from the board temperature (T

more useful in real-world

JB

) is calculated

J

) and power dissipation (PD)

B

using the formula

T

= TB + (PD × ΨJB)

J

See JESD51-8 and JESD51-12 for more detailed information
about Ψ

.

JB

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.

Table 4. Thermal Resistance

Package Type θJA ΨJB Unit

5-Lead TSOT 170 43 °C/W

6-Lead 2 mm × 2 mm LFCSP 63.6 28.3 °C/W

ESD CAUTION

Rev. E | Page 5 of 24

ADP151 Data Sheet

NC = NO CONNECT

TOP VIEW

(Not to Scale)

ADP151

1

2

3

5

4

VIN

GND

EN

VOUT

NC

08627-003

1 2

A

B

TOP VIEW

(Not to Scale)

VIN VOUT

EN GND

08627-004

ADP151

TOP VIEW

(Not to Scale)

3

1

2

GND

VOUT

NC

4

6

5

EN

VIN

NC

08627-048

NOTES

1. NC = NO CONNECT. DO NOT CONNECT T O THIS PI N.

2. THE EXPOSED PAD MUST BE CONNECTED TO GROUND.

3

B1 4 EN

Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator.

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

Figure 4. 5-Lead TSOT Pin Configuration Figure 5. 4-Ball WLCSP Pin Configuration Figure 6. 6-Lead LFCSP Pin Configuration

Table 5. Pin Function Descriptions

Pin No.

TSOT WLCSP LFCSP

Mnemonic Description

1 A1 6 VIN Regulator Input Supply. Bypass VIN to GND with a 1 µF or greater capacitor.
2 B2 3 GND Ground.

For automatic startup, connect EN to VIN.
4 N/A 2 NC No Connect. Not connected internally.
5 A2 1 VOUT Regulated Output Voltage. Bypass VOUT to GND with a 1 µF or greater capacitor.
N/A N/A 5 NC No Connect. Not connected internally.
N/A N/A EPAD Exposed Pad. The exposed pad must be connected to ground. The exposed pad enhances

the thermal performance of the package.

Rev. E | Page 6 of 24

Data Sheet ADP151

3.35

3.25

3.27

3.29

3.31

3.33

–40 –5 25 85 125

V

OUT

(V)

JUNCTION T E M P E RATURE (°C)

LOAD = 10µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 200mA

08627-005

3.35

3.25

3.27

3.29

3.31

3.33

0.01 10001001010.1

V

OUT

(V)

I

LOAD

(mA)

08627-006

3.35

3.25

3.27

3.29

3.31

3.33

3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4

V

OUT

(V)

VIN (V)

LOAD = 10µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 200mA

08627-007

1k

100

10

1

–40 –5 25 85 125

GROUND CURRENT ( µ A)

JUNCTION T E M P E RATURE (°C)

LOAD = 10µA
LOAD = 100µA
LOAD = 1mA
LOAD = 10mA
LOAD = 100mA
LOAD = 200mA

08627-008

1k

10

100

0.01 10001001010.1

GROUND CURRENT ( µ A)

I

LOAD

(mA)

08627-009

GROUND CURRENT ( µ A)

VIN (V)

1k

10

100

3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4

LOAD = 10µA
LOAD = 100µA
LOAD = 1mA

LOAD = 10mA
LOAD = 100mA
LOAD = 200mA

08627-010

TYPICAL PERFORMANCE CHARACTERISTICS

VIN = 5 V, V

= 3.3 V, I

OUT

= 1 mA, CIN = C

OUT

= 1 µF, TA = 25°C, unless otherwise noted.

OUT

Figure 7. Output Voltage vs. Junction Temperature

Figure 8. Output Voltage vs. Load Current

Figure 10. Ground Current vs. Junction Temperature

Figure 11. Ground Current vs. Load Current

Figure 9. Output Voltage vs. Input Voltage

Figure 12. Ground Current vs. Input Voltage

Rev. E | Page 7 of 24

ADP151 Data Sheet

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

–50 –25 1251007550250

SHUTDOWN CURRE NT (µA)

TEMPERATURE (°C)

V

IN

= 3.6V

V

IN

= 3.8V
VIN = 4.2V
V

IN

= 4.4V
VIN = 4.8V
V

IN

= 5.5V

08627-011

120

100

80

60

40

20

0

1 10 100 1000

DROPOUT VOLTAGE (mA)

I

LOAD

(mA)

08627-012

3.40

3.00

3.05

3.10

3.15

3.20

3.25

3.30

3.35

3.10 3.15 3.20 3.25

3.30 3.35 3.40 3.45 3.50 3.55

V

OUT

(V)

V

IN

(V)

I

OUT

= 1mA

I

OUT

= 5mA

I

OUT

= 10mA

I

OUT

= 50mA

I

OUT

= 100mA

I

OUT

= 200mA

08627-013

800

700

600

500

400

300

200

100

0

3.10 3.553.503.453.403.353.303.253.203.15

GROUND CURRENT ( µ A)

V

IN

(V)

I

OUT

= 1mA

I

OUT

= 5mA

I

OUT

= 10mA

I

OUT

= 50mA

I

OUT

= 100mA

I

OUT

= 200mA

08627-014

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

PSRR (dB)

FREQUENCY ( Hz )

200mA
100mA
10mA
1mA
100µA

08627-015

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10 100 1k 10k 100k 1M 10M

PSRR (dB)

FREQUENCY ( Hz )

200mA
100mA
10mA
1mA
100µA

08627-016

Figure 13. Shutdown Current vs. Temperature at Various Input Voltages

Figure 14. Dropout Voltage vs. Load Current

Figure 16. Ground Current vs. Input Voltage (in Dropout)

Figure 17. Power Supply Rejection Ratio vs. Frequency, V

= 1.2 V, VIN = 2.2 V

OUT

Figure 15. Output Voltage vs. Input Voltage (in Dropout)

Figure 18. Power Supply Rejection Ratio vs. Frequency, V

= 2.8 V, VIN = 3.3 V

OUT

Rev. E | Page 8 of 24