Analog Devices ADP1148AR, ADP1148AN-5, ADP1148AN-3.3, ADP1148AN, ADP1148AR-5, ADP1148AR-3.3 Datasheet
Specifications and Main Features
Frequently Asked Questions
User Manual
High Efficiency Synchronous
Q
R
S
V
TH1
V
IN
SENSE(–)
V
TH2
1.25V
OFF-TIME
CONTROL
100kV
13kV
B
V
IN
P-DRIVESENSE(+)SENSE(–)
G
46
C
T
I
TH
SHUTDOWN
8
13
ADP1148
10mV to
150mV
C
V
FB
INT V
CC
REFERENCE
510
T
N-DRIVE
PWR
GND
14
12
ADJUSTABLE
VERSION
V
FB
9
7
S
1
Q
R
S
2
V
SLEEP
SIGNAL
GND
11
NON-OVERLAP
DRIVE
a
ADP1148, ADP1148-3.3, ADP1148-5
FEATURES
Operation From 3.5 V to 18 V Input Voltage
Ultrahigh Efficiency > 95%
Low Shutdown Current
Current Mode Operation for Excellent Line and Load
Transient Response
High Efficiency Maintained Over Wide Current Range
Logic Controlled Micropower Shutdown
Short Circuit Protection
Very Low Dropout Operation
Synchronous FET Switching for High Efficiency
Adaptive Nonoverlap Gate Drives
APPLICATIONS
Notebook and Palmtop Computers
Portable Instruments
Battery Operated Digital Devices
Industrial Power Distribution
Avionics Systems
Telecom Power Supplies
GPS Systems
Cellular Telephones
GENERAL DESCRIPTION
The ADP1148 is part of a family of synchronous step-down
switching regulator controllers featuring automatic sleep mode
to maintain high efficiencies at low output currents. These
devices drive external complementary power MOSFETs at
switching frequencies up to 250 kHz using a constant off-time
current-mode architecture.
Step-Down Switching Regulators
FUNCTIONAL BLOCK DIAGRAM
The constant off-time architecture maintains constant ripple
current in the inductor, easing the design of wide input range
converters. Current-mode operation provides excellent line and
load transient response. The operating current level is user
programmable via an external current sense resistor.
The ADP1148 incorporates automatic Power Saving Sleep
Mode operation when load currents drop below the level required for continuous operation. In sleep mode, standby power
is reduced to only about 2 mW at V
both MOSFETs are turned off.
= 10 V. In shutdown,
IN
TYPICAL APPLICATIONS
VIN (5.2V TO 18V)
++
C
100mF
62mH
C1
10BQ040
IN
R
L*
SENSE
0.05V
1mF
>1.5V = SHUTDOWN
R
1kV
C
3300pF
10nF
0V = NORMAL
C
C
T
470pF
C
Figure 1. High Efficiency Step-Down ConverterFigure 2. ADP1148-5 Typical Efficiency
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
ADP1148-55 mA < I
SLEEP MODE OUTPUT RIPPLEdV
INPUT DC SUPPLY CURRENT
3
Normal ModeV
Sleep Mode (ADP1148-3.3)V
Sleep Mode (ADP1148-5)V
ShutdownV
OUT
I
OUT
I
Q
= 0 A50mV p-p
LOAD
TA = +25°C
= 4 V < VIN < 18 V1.62.3mA
IN
= 4 V < VIN < 18 V160250µA
IN
= 4 V < VIN < 18 V160250µA
IN
SHUTDOWN
< 2 A4065mV
LOAD
< 2 A60100mV
LOAD
= 2.1 V,1020µA
4 V < VIN < 15 V
CURRENT SENSE THRESHOLDV
VOLTAGE
4
8–V7
ADP1148 OnlyV
ADP1148-3.3V
ADP1148-5V
V9 = V
V7 = 5 V, TA = +25°C25mV
= V
9
= 5 V130150170mV
V
7
= V
7
= V
V
7
= V
7
V7 = V
/4 + 25 mV (Forced),
OUT
/4 mV – 25 mV (Forced),
OUT
+ 100 mV (Forced)25mV
OUT
100 mV (Forced)130150170mV
OUT –
+ 100 mV (Forced25mV
OUT
– 100 mV (Forced)130150170mV
OUT
SHUTDOWN PIN THRESHOLD
ADP1148-3.3, ADP1148-5V
SHUTDOWN PIN INPUT CURRENTI
PIN DISCHARGE CURRENTI
C
T
OFF-TIMEt
DRIVER OUTPUT TRANSITIONt
10
10
4
OFF
, t
R
F
TA = +25°C0.60.82.0V
0 V < V
SHUTDOWN
TA = +25°C, V
= V
V
7
V
OUT
,506590µA
OUT
= 0 V210µA
CT = 390 pF, I
< 8 V, VIN = 18 V1.25µA
in Regulation,
OUT
= 700 mA456µs
LOAD
CL = 3000 pF (Pins 1, 14)
TIMESVIN = 6 V, TA = +25°C100200ns
NOTES
1
All limits at temperature extremes are guaranteed via correlation using standard Quality Control methods. Specifications subject to change without notice.
2
TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas:
ADP1148AR, ADP1148AR-3.3, ADP1148AR-5: TJ = TA + (PD × 110°C/W)
ADP1148AN, ADP1148AN-3.3, ADP1148AN-5: TJ = TA + (PD × 70°C/W)
3
Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. The allowable operating frequency may be limited by power
dissipation at high input voltages.
4
The ADP1148 version is tested with external feedback resistors, setting the nominal output voltage to 3.3 V.
Specifications subject to change without notice.
–2–
REV. A
ADP1148, ADP1148-3.3, ADP1148-5
ELECTRICAL CHARACTERISTICS
ParameterSymbolConditions
(–408C ≤ TA ≤ +858C,1 VIN = 10 V, V
2
= 0 V, unless otherwise noted. See Figure 17.)
SHUTDOWN
MinTypMaxUnits
FEEDBACK VOLTAGE
ADP1148 OnlyV
REGULATED OUTPUT VOLTAGEV
10
OUT
ADP1148-3.3I
ADP1148-5I
INPUT DC SUPPLY CURRENT
3
I
Q
VIN = 9 V1.201.251.30V
VIN = 9 V
= 700 mA3.173.333.4V
LOAD
= 700 mA4.855.055.2V
LOAD
Normal ModeVIN = 4 V < VIN < 18 V1.62.6mA
Sleep Mode (ADP1148-3)V
Sleep Mode (ADP1148-5)V
ShutdownV
= 4 V < VIN < 18 V160280µA
IN
= 6 V < VIN < 18 V160280µA
IN
SHUTDOWN
= 2.1 V,1024µA
4 V < VIN < 12 V
CURRENT SENSE THRESHOLD
VOLTAGE
ADP1148 OnlyV9 = V
ADP1148-3.3V
ADP1148-5.0V
SHUTDOWN PIN THRESHOLDV
4
V8–V
10
7
= 5 V
V
7
= V
V
9
= 5 V
V
7
= V
7
= V
V
7
= V
7
V7 = V
/4 + 25 mV (Forced),0mV
OUT
/4 – 25 mV (Forced),115150175mV
OUT
+ 100 mV (Forced)0mV
OUT
– 100 mV (Forced)115150175mV
OUT
+ 100 mV (Forced)0mV
OUT
– 100 mV (Forced)115150175mV
OUT
ADP1148-3.3, ADP1148-50.550.82V
OFF-TIMEt
NOTES
1
All limits at temperature extremes are guaranteed via correlation using standard Quality Control method.
2
TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formulas:
ADP1148AR, ADP1148AR-3, ADP1148AR-5: TJ = TA + (PD × 110°C/W)
ADP1148AN, ADP1148AN-3, ADP1148AN-5: TJ = TA + (PD × 70°C/W)
3
Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. The allowable operating frequency may be limited by power
dissipation at high input voltages.
4
The ADP1148 version is tested with external feedback resistors setting the nominal output voltage to 3.3 V.
Specifications subject to change without notice.
OFF
CT = 390 pF, I
= 700 mA456.2µs
LOAD
ABSOLUTE MAXIMUM RATINGS
Input Supply Voltage (Pin 3) . . . . . . . . . . . . . –0.3 V to +20 V
1P-Channel DriveHigh Current Gate Drive for Top P-Channel MOSFET. The voltage swing at Pin 4 is from V
ground.
2NCNo Connection.
3V
4C
5Int V
IN
T
CC
Input Voltage.
External Capacitor CT from Pin 4 to Ground Sets the Operating Frequency. The frequency is also
dependent on the ratio V
OUT/VIN
.
Internal Supply Voltage, Nominally 3.3 V. Must be decoupled to signal ground. Do not externally load
this pin.
6I
TH
Error Amplifier Decoupling Point. The current comparator threshold increases with the Pin 7 voltage.
7Sense–Connects to internal resistive divider that sets the output voltage in ADP1148-3.3 and ADP1148-5
versions. Pin 7 is also the (–) input for the current comparator.
8Sense+The (+) Input for the Current Comparator. A built-in offset between Pins 7 and 8, in conjunction with
, sets the current trip threshold.
R
SENSE
9V
FB
For the ADP1148 adjustable version, Pin 9 serves as the feedback pin from an external resistive divider
used to set the output voltage. On ADP1148-3.3 and ADP1148-5 versions, this pin is not used.
10ShutdownTaking Pin 10 of the ADP1148, ADP1148-3.3 or ADP1148-5 high holds both MOSFETs off. Must be
at ground potential for normal operation.
11Signal GNDSmall Signal Ground. Must be routed separately from other grounds to the (–) terminal of C
12Power GNDDriver Power Ground. Connects to source of N-channel MOSFET and the (–) terminal of C
13NCNo Connection.
14N-Channel DriveHigh Current Drive for bottom N-channel MOSFET. The voltage swing at Pin 13 is from ground to
VIN.
IN
OUT
IN
to
.
.
PIN CONFIGURATIONS
14-Lead Plastic DIP
14-Lead Plastic SO
P-DRIVE
SENSE(–)
1
2
NC
3
V
IN
ADP1148
4
C
TOP VIEW
T
(Not to Scale)
5
INT V
CC
6
I
TH
7
NC = NO CONNECT
*FIXED OUTPUT VERSIONS = SD1
N-DRIVE
14
13
NC
12
POWER GND
11
SIGNAL GND
10
SHUTDOWN
9
V
FB
8
SENSE(+)
*
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP1148, ADP1148-3.3, ADP1148-5 feature proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.