ANALOG DEVICES ADN8820 Service Manual

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EDFA and CW Laser Controller

Preliminary Technical Data

FEATURES

Four Operational Modes Including:

Constant Laser Current
Constant Optical Output Power
Constant EDFA Gain

Constant Laser Power
High Power Efficiency: >90%
Three Built-In Photodiode TIAs
Adjustable Laser Diode and EDFA Protection Limits
Free-run or Synchronous Switching Frequency Modes
Adjustable Phase Delay for Synchornous Clock Mode
Optional Dithering Built-In
Programmable Dither Frequency and Amplitude

APPLICATIONS

EDFA Pump Laser Diode Control
CW Laser Bias Control
Raman Amplifiers

GENERAL DESCRIPTION

The ADN8820 is a versatile Continuous Wave (CW) and EDFA
laser diode driver and controller. It provides a low noise and
precise current control for driving a source or pump laser diode.

ADN8820

Output Power (COP), or Constant EDFA Gain (CG). Multiple
pump laser applications are easily supported by the ADN8820.
Common-cathode-to-ground and common-anode-to-VDD
configurations are also supported.

The ADN8820 has a high speed closed-loop control, making it
suitable for add/drop applications in telecommunication
systems. It has a low-current shutdown mode and a soft-start
feature to minimize power supply bounce on start-up.

Protection circuitry is built into the device. The protection
limits are easily adjustable and are used to set maximum output
current and voltage, optical output power, EDFA gain, and
pump or CW laser power.

The output stage consists of a high-efficiency PWM amplifier in
parallel with a high-speed linear amplifier. This provides the
fastest settling time response along with the lowest power and
heat dissipation. A pair of external MOSFETs on the PWM
amplifier provide output currents of up to 5A.

Three low-bias current TIAs are built-in. These allow
amplification for the laser back-facet photodiode and EDFA
input and output photodiodes. For CW laser applications, the
two unused TIAs can be used for etalon photodiode
amplification, allowing continuous wavelength monitoring.

*

It can be set to operate in one of four controller modes:
Constant Current (CC), Constant Laser Power (CLP), Constant

FUNCTIONAL BLOCK DIAGRAM

*

U.S. Patent Pending

Rev. PrB

Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Anal og Devices.

The ADN8820 is available in a 7 x 7 mm lead-frame chip scale
package (LFCSP) with a package height of less than 1 mm.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

ADN8820 - SPECIFICATIONS1 Preliminary Technical Data

Table 1. ADN8820—Electrical Characteristics (AVDD = PVDD = 5V, AGND = PGND = 0V, TA = 25°C, using typical

circuit in Figure 1, unless otherwise noted.)

2

Parameter Symbol Conditions Min Typ Max Unit

TRANSIMPEDANCE AMPLIFIERS
Detection Range IIP From IPDIN Photodiode
I
I
Input Bias Current IB
IB
IB

From OPDIN Photodiode 0.005 5,000

OP

LP

IPDIN

OPDIN

LPDIN

From LPDIN Photodiode 5 5,000
IPDIN, OPDIN, LPDIN Amplifier 100 pA

Inputs 100 pA
100 pA

0.005 5,000

µA
µA
µA

Input Voltage Range VBLP, VB 0 VDD V
Monitor Output Range V
V
V
Input Offset Voltage V

V
V

Maximum Output Current I
I
I
Gain-Bandwidth Product GBW
GBW
GBW

IPO

LPO

OPO

OSIP

OSOP

OSLP

OUTIPO

OUTLPO

OUTOPO

IP

OP

LP

IPO, LPO, OPO Outputs 0 VDD V
0 VDD V
0 VDD V
IPDIN, OPDIN, LPDIN Amplifiers 10

10

µV
µV

2 mV
IPO, LPO, OPO Outputs ±10 mA
±10 mA
±10 mA
IPDIN, OPDIN, LPDIN Amplifiers 10 MHz
10 MHz

1 MHz
LIMIT CONTROLS
Input Voltage Range V

INLIM

IPMIN, OPLIM, LPLIM, ILIM, and

0 2.6 V

VLIM
Limiter Accuracy V
Open Circuit Voltage V

OSLIM

LIMNC

OPLIM, LPLIM, ILIM, IPMIN ±10 mV
Voltage for OPLIM, LPLIM, and ILIM

2.5 2.6 2.7 V

with no connection
Pull-up Current IB

LIM

Flowing out of OPLIM, LPLIM, and

500 nA

ILIM with LIM Voltage <2.0V
IPMIN Disable Threshold V
VLIM Input Bias Current I

VLIM Voltage Control Accuracy |V

V

IPMINLO

VLIM

= 0V 200 mV

IPO

Flowing into VLIM pin 1

– VLIM| 50 mV

LINOUT

µA

ERROR AMPLIFIER
Input Offset Voltage V

Input Common-Mode Voltage Range V
Output Voltage Swing V
Maximum Output Current I

OSEA

CMEA

OUTEA

MAXEA

Gain-Bandwidth GBW

EA

10 25

µV
0 VDD V
0 VDD V
±10 mA
10 MHz

SET INPUT
Input Voltage Range V
Input Bias Current IB

SET

SET

0 VDD V
±1

µA

MULTIPLEXERS
Ouput Impedance 100

Ω

Output Voltage Range 0 VDD V

1

Specifications subject to change without notice

2

Capital letters denote pin names.

Rev. PrB | Page 2 of 9

ADN8820 - SPECIFICATIONS1 Preliminary Technical Data

Table 1. ADN8820—Electrical Characteristics (AVDD = PVDD = 5V, AGND = PGND = 0V, TA = 25°C, using typical

circuit in Figure 1, unless otherwise noted.)

2

Parameter Symbol Conditions Min Typ Max Unit

LINEAR OUTPUT
Short-Circuit Output Current I
Output Voltage Compliance V
V
Power Supply Rejection Ratio PSRR
Gain-Bandwidth Product GBW

OUTLIN

LINMAX

LINMIN

LIN

LIN

300 mA
I

= 300mA (sourcing) 4.5 V

OUTLIN

I

= -160mA (sinking) 0.5 V

OUTLIN

68 dB

10 MHz
PWM OUTPUT
Offset Voltage V

V

OSPWM

= LINOUT - FB ±10 mV

OSPWM

Non-Overlap Delay
Output Transistion Time tR, tF

Output Driver Resistance R
R

NGATE

PGATE

Output Current Ripple I
Soft-Start Time

Standby Mode Threshold V

SSSB

≤ 3nF

FET C

ISS

6

6

= 300mA, V

OUT

= 0.1 µF

C

SS

= 2V 1 %

OUT

PWM and LINOUT disabled 0.4 V

40 ns

Ω

Ω

15 ms

OSCILLATOR
Free-Run Oscillation Frequency f

CLK

CMPOSC = VDD; SYNCIN = 0V 100 1,000 kHz
Synchornization Capture Range SYNCIN driven with external clock 100 1,000 kHz
Phase Adjustment

φ

CLK

45 315 degrees

CURRENT SENSE AMPLIFIER
Input Common-Mode Voltage Range V
Input Resistance R

Output Offset Voltage V
Gain A
Output Voltage Range V

CMCS

INCS

OSLIO

VCS

LIO

0 VDD V

10.5

V

= V

CSP

V

LIO

= 2.5V 1 mV

CSN

/ (V

– V

CSP

) 20 V/V

CSN

kΩ

0 VDD V
DITHER GENERATOR
Frequency Range f
Frequency Multiplier Programming

DITHER

xx kΩ ≤ RT ≤ xx kΩ

See Table II

0.2 2 MHz

Voltage
Dither Current Control Votlage V
Programming Current Range I

Maximum DO Output Current I
DO Output Voltage V

V

DCTL

V

DCTL

MAXDO

DO

LIO

LIO

±19 ±20 ±21 mA

1.5 V

= 2.5 V 1.2 1.25 1.3 V
= 2.5 V 0 100

µA

POWER SUPPLY
Power Supply Range VDD 3.0 5.5 V
Supply Current ISY

Shutdown Current I
Standby Current I
Undervoltage Lockout V

SD

SB

UVLO

SD

DSEL/

-40°C ≤ T

≥ 0.8V; I

≤ +85°C

A

OUT

= 0A

DSEL/SD ≤ 0.2V
SS/SB ≤ 0.2V

2.4 2.5 V

25 30 mA

10

µA

2.5 mA

REFERNCE OUTPUT
Reference Voltage V

REF

Power Supply Rejection Ratio PSRR

REF

I

≤ 2 mA

REF

With respct to AVDD 68 V

2.4 2.5 2.6 V

1

Specifications subject to change without notice

2

Capital letters denote pin names.

Rev. PrB | Page 3 of 9