3.3 V 2.7 Gb/s
FEATURES
SFP reference design available
Input sensitivity: 3 mV p-p
80 ps rise/fall times
CML outputs: 700 mV p-p differential
Programmable LOS detector: 2 mV to 13 mV
Rx signal strength indicator (RSSI):
SFF-8472 compliant average power measurement
Single-supply operation: 3.3 V
Low power dissipation: 130 mW
Available in space-saving 3 mm × 3 mm 16-lead LFCSP
APPLICATIONS
SFP/SFF/GBIC optical transceivers
OC-3/12/48, GbE, Fibre Channel receivers
10GBASE-LX4 transceivers
WDM transponders
Limiting Amplifier
ADN2890
GENERAL DESCRIPTION
The ADN2890 is a high gain, limiting amplifier optimized for
use in SONET, Gigabit Ethernet (GbE), and Fibre Channel
optical receivers that accept input levels of up to 2.0 V p-p
differential and have 3 mV p-p differential input sensitivity. The
ADN2890 provides the receiver functions of quantization and
loss of signal (LOS) detection. The ADN2890 can easily operate
at up to 3.2 Gb/s to support LX4 transceivers.
The limiting amplifier also measures average received power
based on a direct measurement of the photodiode current with
better than 1 dB of accuracy over the entire input range of the
receiver. This eliminates the need for external average Rx power
detection circuitry in SFF-8472 compliant optical transceivers.
The ADN2890 limiting amplifier operates from a single 3.3 V
supply, has low power dissipation, and is available in a spacesaving 3 mm × 3 mm 16-lead lead frame chip scale package
(LFCSP).
FUNCTIONAL BLOCK DIAGRAM
AVCC AVEE DRVCC DRVEE
ADN2890
CFR
F
ADN2880
PD_CATHODE
PIN
NIN
PD_VCC
50Ω 50Ω
3kΩ
CAZ1 CAZ2 SQUELCH
0.01µF
Figure 1.
DRVCC
V
REF
RSSI/LOS
DETECTOR
50Ω 50Ω
THRADJ
OUTP
OUTN
+V
LOS
RSSI_OUT
10k
Ω
ADuC7020
04509-0-001
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
ADN2890
TABLE OF CONTENTS
Specifications..................................................................................... 3
Loss of Signal (LOS) Detector .....................................................8
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ........................................................................ 8
LIMAMP ....................................................................................... 8
REVISION HISTORY
Revision 0: Initial Version
Received Signal Strength Indicator (RSSI).................................8
Squelch Mode ................................................................................8
Applications Information.................................................................9
PCB Design Guidelines ................................................................9
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 11
Rev. 0 | Page 2 of 12
ADN2890
SPECIFICATIONS
VCC = V
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
QUANTIZER DC CHARACTERISTICS
Input Voltage Range 1.8 2.8 V p-p @ PIN or NIN, dc-coupled
Input Common Mode 2.1 2.7 V DC-coupled
Peak-to-Peak Differential Input Range 2.0 V p-p PIN − NIN, ac-coupled
Input Sensitivity 4 3 mV p-p
Input Offset Voltage 100 µV
Input RMS Noise 235 µV rms
Input Resistance 50 Ω Single-ended
Input Capacitance 0.65 pF
QUANTIZER AC CHARACTERISTICS
Input Data Rate 155 2700 Mb/s
Small Signal Gain 57 dB Differential
S11 −10 dB Differential, f < 2.7 GHz
S22 −10 dB Differential, f < 2.7 GHz
Random Jitter 2.4 5 ps rms Input > 10 mV p-p, OC-48, PRBS 2
Deterministic Jitter 13.7 19 ps p-p Input > 10 mV p-p, OC-48, PRBS 223 − 1
Low Frequency Cutoff 30 kHz CAZ = Open
1.0 kHz CAZ = 0.0 1 µF
Power Supply Rejection 45 dB 100 kHz < f < 10 MHz
LOSS OF SIGNAL DETECTOR (LOS)
LOS Assert Level 0.5 2.5 4.0 mV p-p R
7.0 12.0 16.0 mV p-p R
Hysteresis 3.0 6.0 dB OC-3, PRBS 2
2.0 3.0 dB OC-3, PRBS 2
4.5 7.5 dB OC-48, PRBS 2
2.5 4.5 dB OC-48, PRBS 2
LOS Assert Time 600 ns DC-coupled
LOS De-Assert Time 100 ns DC-coupled
RSSI
Input Current Range 5 1000 µA
RSSI Output Accuracy 15%
10% IIN > 20 µA
Gain 1.0 mA/mA I
Offset 50 nA
Compliance Voltage VCC − 1.05 VCC − 0.3 V @ PD_CATHODE
POWER SUPPLIES
VCC 3.0 3.3 3.6 V
ICC 39 54 mA
OPERATING TEMPERATURE RANGE −40 +25 +85 °C T
CML OUTPUT CHARACTERISTICS
Output Impedance 50 Ω Single-ended
Output Voltage Swing 650 700 800 V p-p Differential
Output Rise and Fall Time 80 100 ps 20% to 80%
LOGIC INPUTS (SQUELCH)
VIH, Input High Voltage 2.0 V
VIL, Input Low Voltage 0.8 V
Input Current −100 nA I
100 nA I
MIN
to V
, VEE = 0 V, TA = T
MAX
MIN
to T
, unless otherwise noted.
MAX
PIN − NIN, BER ≤ 1 × 10
= 100 kΩ
THRADJ
= 0 Ω
THRADJ
I
≤ 20 µA
IN
RSSI/IPD
to T
MIN
23
− 1, R
THRADJ
23
− 1, R
THRADJ
23
− 1, R
23
− 1, R
MAX
, VIN = 2.4 V
INH
, VIN = 0.4 V
INL
−10
THRADJ
THRADJ
= 0 Ω
= 10 kΩ
= 0 Ω
= 100 kΩ
23
− 1
Rev. 0 | Page 3 of 12
ADN2890
Parameter Min Typ Max Unit Test Conditions/Comments
LOGIC OUTPUTS (LOS)
VOH, Output High Voltage 2.4 V
VOL, Output Low Voltage 0.4 V
Open drain output, 4.7 kΩ − 10 kΩ
pull-up resistor to V
CC
Open drain output, 4.7 kΩ − 10 kΩ
pull-up resistor to V
CC
Rev. 0 | Page 4 of 12