SFP/SFF and SFF-8472 MSA-compliant
SFP reference design available
50 Mbps to 3.3 Gbps operation
Multirate 155 Mbps to 3.3 Gbps operation
Dual-loop control of average power and extinction ratio
Typical rise/fall time 60 ps
Bias current range 2 mA to 100 mA
Modulation current range 5 mA to 90 mA
Laser fail alarm and automatic laser shutdown (ALS)
Bias and modulation current monitoring
3.3 V operation
4 mm × 4 mm LFCSP package
Voltage setpoint control
Resistor setpoint control
The ADN2870 laser diode driver is designed for advanced SFP
and SFF modules, using SFF-8472 digital diagnostics. The device
features dual-loop control of the average power and extinction
ratio, which automatically compensates for variations in laser
characteristics over temperature and aging. The laser need only
be calibrated at 25°C, eliminating the need for expensive and
time consuming temperature calibration. The ADN2870 supports
single-rate operation from 50 Mbps to 3.3 Gbps or multirate
from 155 Mbps to 3.3 Gbps.
Average power and extinction ratio can be set with a voltage
provided by a microcontroller DAC or by a trimmable resistor.
The part provides bias and modulation current monitoring as
well as fail alarms and automatic laser shutdown. The device
interfaces easily with the ADI ADuC70xx family of microconverters and with the ADN289x family of limiting amplifiers
to make a complete SFP/SFF transceiver solution. An SFP
reference design is available. The product is available in a spacesaving 4 mm ×4 mm LFCSP package specified over the −40°C to
+85°C temperature range.
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Output Current IBIAS 2 100 mA
Compliance Voltage 1.2 V
IBIAS when ALS is High 0.2 mA
CCBIAS Compliance Voltage 1.2 V
MODULATION CURRENT (IMODP, IMODN)
Output Current IMOD 5 90 mA
Compliance Voltage 1.5 V
IMOD when ALS is High 0.05 mA
Rise Time
Fall Time
Random Jitter
Deterministic Jitter
Pulse-Width Distortion
Resistance Range 1.2 25 kΩ Resistor setpoint mode
Voltage 1.1 1.2 1.35 V Resistor setpoint mode
AVERAGE POWER REFERENCE VOLTAGE INPUT (PAVREF)
Voltage Range 0.12 1 V
Photodiode Monitor Current (Average Current) 120 1000 µA
EXTINCTION RATIO REFERENCE VOLTAGE INPUT (ERREF)
Voltage Range 0.1 1 V
DATA INPUTS (DATAP, DATAN)
4
V p-p (Differential) 0.4 2.4 V AC-coupled
Input Impedance (Single-Ended) 50 Ω
LOGIC INPUTS (ALS)
V
IH
V
IL
ALARM OUTPUT (FAIL)
V
OFF
V
ON
5
MIN
2
to T
,1 unless otherwise noted. Typical values as specified at 25°C.
MAX
CC
V
CC
V
60 104 ps
60 96 ps
0.8 1.1 ps rms
35 ps 20 mA < IMOD < 90 mA
30 ps 20 mA < IMOD < 90 mA
2 V
0.8 V
> 1.8 V
< 1.3 V
Voltage setpoint mode
(RPAV fixed at 1 kΩ)
Voltage setpoint mode
(RPAV fixed at 1 kΩ)
Voltage setpoint mode
(RERSET fixed at 1 kΩ)
Voltage required at FAIL for Ibias and
Imod to turn off when FAIL asserted
Voltage required at FAIL for Ibias and
Imod to stay on when FAIL asserted
Rev. 0 | Page 3 of 20
ADN2870
Parameter Min Typ Max Unit Conditions/Comments
IBMON, IMMON DIVISION RATIO
IBIAS/IBMON
IBIAS/IBMON
IBIAS/IBMON STABILITY
IMOD/IMMON 50 A/A
IBMON Compliance Voltage 0 1.3 V
SUPPLY
7
I
CC
VCC (w.r.t. GND)
1
Temperature range: –40°C to +85°C.
2
Measured into a 15 Ω load (22 Ω resistor in parallel with digital scope 50 Ω input) using a 11110000 pattern at 2.5 Gbps, shown in Figure 2.
3
Guaranteed by design and characterization. Not production tested.
4
When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows in the IMODP pin.
5
Guaranteed by design. Not production tested.
6
IBIAS/IBMON ratio stability is defined in SFF-8472 revision 9 over temperature and supply variation.
7
ICC min for power calculation in the Power Consumption section.
8
All VCC pins should be shorted together.
3
3
3, 6
85 100 115 A/A 11 mA < IBIAS < 50 mA
92 100 108 A/A 50 mA < IBIAS < 100 mA
±5 % 10 mA < IBIAS < 100 mA
30 mA When IBIAS = IMOD = 0
8
3.0 3.3 3.6 V
V
CCVCC
ADN2870
IMODP
22Ω
R
L
C
BIAS TEE
80kHz → 27GHz
Figure 2. High Speed Electrical Test Output Circuit
TO HIGH SPEED
DIGITAL
OSCILLOSCOPE
50Ω INPUT
04510-034
Rev. 0 | Page 4 of 20
ADN2870
SFP TIMING SPECIFICATIONS
Table 2.
Parameter Symbol Min Typ Max Unit Conditions/Comments
ALS Assert Time t_off 1 5 µs
ALS Negate Time
Time to Initialize, Including
Reset of FAIL
1
1
t_on 0.83 0.95 ms
t_init 25 275 ms From power-on or negation of FAIL using ALS.
FAIL Assert Time t_fault 100 µs Time to fault to FAIL on.
ALS to Reset time t_reset 5 µs Time TX_DISABLE must be held high to reset TX_FAULT.
1
Guaranteed by design and characterization. Not production tested.
V
SE
DATAP
DATAN
Time for the rising edge of ALS (TX_DISABLE) to when the bias
current falls below 10% of nominal.
Time for the falling edge of ALS to when the modulation current
rises above 90% of nominal.
SFP MODULE
VCC_Tx
1µH
3.3V
0.1µF0.1µF10µF
DATAP–DATAN
0V
Figure 3. Signal Level Definition
V p-p
DIFF
= 2× V
SFP HOST BOARD
SE
04510-002
Figure 4. Recommended SFP Supply
04510-003
Rev. 0 | Page 5 of 20
ADN2870
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VCC to GND 4. 2 V
IMODN, IMODP –0.3 V to +4.8 V
PAVCAP –0.3 V to +3.9 V
ERCAP –0.3 V to +3.9 V
PAVSET –0.3 V to +3.9 V
PAVREF –0.3 V to +3.9 V
ERREF –0.3 V to +3.9 V
IBIAS –0.3 V to +3.9 V
IBMON –0.3 V to +3.9 V
IMMON –0.3 V to +3.9 V
ALS –0.3 V to +3.9 V
CCBIAS –0.3 V to +3.9 V
RPAV –0.3 V to +3.9 V
ERSET –0.3 V to +3.9 V
FAIL –0.3 V to +3.9 V
DATAP, DATAN
(single-ended differential)
TEMPERATURE SPECIFICATIONS
Operating Temperature Range
Industrial
Storage Temperature Range –65°C to +150°C
Junction Temperature (TJ max) 150°C
LFCSP Package
Power Dissipation
θJA Thermal Impedance
θJCThermal Impedance 29.5°C/W
Lead Temperature (Soldering 10 s) 300°C
___________________
1
Power consumption equations are provided in the Power Consumption
section.
2
θJA is defined when part is soldered on a 4-layer board.
1
2
1.5 V
−40°C to +85°C
(TJ max – TA)/θJA W
30°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 6 of 20
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