Analog Devices ADN2847 Datasheet

3V Dual-Loop 50 Mbps to 3.3 Gbps
a
FEATURES 50 Mbps to 3.3 Gbps Operation Single 3.3 V Operation Typical Rise/Fall Time 80 ps Bias Current Range 2 mA to 100 mA Modulation Current Range 5 mA to 80 mA Monitor Photodiode Current 50 A to 1200 A Dual MPD Functionality for DWDM 50 mA Supply Current at 3.3 V Closed-Loop Control of Power and Extinction Ratio Full Current Parameter Monitoring Laser Fail and Laser Degrade Alarms Automatic Laser Shutdown, ALS Optional Clocked Data Supports FEC Rates 48-Lead (7 mm 7 mm) LFCSP Package 32-Lead (5 mm 5 mm) LFCSP Package Available in Die Form
Laser Diode Driver
ADN2847
APPLICATIONS SONET OC-1/3/12/48 SDH STM-0/1/4/16 Fibre Channel Gigabit Ethernet DWDM Dual MPD Wavelength Control

GENERAL DESCRIPTION

The ADN2847 uses a unique control algorithm to control both average power and extinction ratio of the laser diode, LD, after initial factory setup. External component count and PCB area are low as both power and extinction ratio control are fully integrated. Programmable alarms are provided for laser fail (end of life) and laser degrade (impending fail).
Optional dual MPD current monitoring is designed into the ADN2847 specifically for DWDM wavelength control.
MPD
GND
GND
GND
V
CC
IMPD
IMPD2
PSET
ERSET

FUNCTIONAL BLOCK DIAGRAM

V
IBMON
IMMON
IMPDMON
IMPDMON2
ALS
FAIL
DEGRADE
I
MOD
CONTROL
I
BIAS
PAV CAPERCAP
GNDGND
CC
IMODN
CLKSEL
ADN2847
LBWSETIDTONE
CC
V
GND
IMODP
I
BIAS
ASET
GND
DATAP
DATAN
CLKP
CLKN
V
CC
LD
REV. 0
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
ADN2847
–SPECIFICATIONS
(VCC = 3.0 V to 3.6 V. All specifications T otherwise noted.1 Typical values as specified at 25C.)
MIN
to T
, unless
MAX
Parameter Min Typ Max Unit Conditions/Comments
LASER BIAS (BIAS)
Output Current I
BIAS
Compliance Voltage 1.2 V
during ALS 0.1 mA
I
BIAS
ALS Response Time 5 µsI CCBIAS Compliance Voltage 1.2 V
MODULATION CURRENT (IMODP, IMODN)
Output Current I
MOD
Compliance Voltage 1.5 V
during ALS 0.1 mA
I
MOD
Rise Time (See Figure 4 for Typical Distribution) Fall Time (See Figure 5 for Typical Distribution) Random Jitter Pulsewidth Distortion
3
3
2 100 mA
CC
CC
2
V
V
580mA
CC
3
3
80 120 ps 80 120 ps
V
1 1.5 ps RMS 15 ps I
< 10% of nominal
BIAS
= 40 mA
MOD
MONITOR PD (MPD, MPD2)
Current 50 1200 µAAverage Current Compliance Voltage 1.65 V
POWER SET INPUT (PSET)
Capacitance 80 pF Monitor Photodiode Current into RPSET Resistor 50 1200 µAAverage Current Voltage 1.1 1.2 1.3 V
EXTINCTION RATIO SET INPUT (ERSET)
Allowable Resistance Range 1.2 25 k Voltage 1.1 1.2 1.3 V
ALARM SET (ASET)
Allowable Resistance Range 1.2 25 k Voltage 1.1 1.2 1.3 V Hysteresis 5 %
CONTROL LOOP Low Loop Bandwidth Selection
Time Constant 0.22 s LBWSET
2.25 s LBWSET = V
DATA INPUTS (DATAP, DATAN, CLKP, CLKN)
4
= GND
CC
V p-p (Single-Ended, Peak-to-Peak) 100 500 mV Data and Clock Inputs Are Input Impedance (Single-Ended) 50 AC-Coupled
5
(See Figure 1) 50 ps
t
SETUP
5
t
(See Figure 1) 100 ps
HOLD
LOGIC INPUTS (ALS, LBWSET, CLKSEL)
V
IH
V
IL
2.4 V
0.8 V
ALARM OUTPUTS (Internal 30 kΩ Pull-Up)
V
OH
V
OL
2.4 V
0.8 V
IDTONE
Compliance Voltage V
I
OUT
 
f
Ratio
I
IN
6
IN
0.01 1 MHz
–1.5 V
CC
2
User to Supply Current Sink in the Range of 50 µA to 4 mA
IBMON, IMMON, IMPDMON, IMPDMON2
IBMON, IMMON Division Ratio 100 A/A IMPDMON, IMPDMON2 1 A/A IMPDMON to IMPDMON2 Matching 2 % I Compliance Voltage 0 V
–1.2 V
CC
= 1200 µA
MPD
REV. 0–2–
ADN2847
Parameter Min Typ Max Unit Conditions/Comments
SUPPLY
7
I
CC
8
V
CC
NOTES
1
Temperature range: –40C to +85C.
2
The high speed performance for the die version of ADN2847 can be achieved when using the bonding diagram shown in Figure 3.
3
Measured into a 25 W load using a 11110000 pattern at 2.5 Gbps.
4
When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows in the IMODP pin.
5
Guaranteed by design and characterization. Not production tested.
6
IDTONE may cause eye distortion.
7
I
for power calculation on page 8 is the typical ICC given.
CCMIN
8
All VCC pins should be shorted together.
Specifications subject to change without notice.
3.0 3.3 3.6 V
50 mA I
BIAS
= I
MOD
= 0

ABSOLUTE MAXIMUM RATINGS

(TA = 25C, unless otherwise noted.)
1
VCC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.2 V
Digital Inputs (ALS, LBWSET, CLKSEL) . . –0.3 V to V
IMODN, IMODP . . . . . . . . . . . . . . . . . . . . . . . . . V
+ 0.3 V
CC
+ 1.2 V
CC
Operating Temperature Range
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . .–40C to +85∞C
Storage Temperature Range . . . . . . . . . . . . . –65C to +150∞C
Junction Temperature (T 48-Lead LFCSP Package
Power Dissipation
q
Thermal Impedance3 . . . . . . . . . . . . . . . . . . . . . 25C/W
JA
max) . . . . . . . . . . . . . . . . . . . 150C
J
2
. . . . . . . . . . . . . . . . (TJ max – TA)/qJA W
Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . 300∞C
32-Lead LFCSP Package
Power Dissipation
q
Thermal Impedance3 . . . . . . . . . . . . . . . . . . . . . 32C/W
JA
2
. . . . . . . . . . . . . . . . (TJ max – TA)/qJA W
Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . 300∞C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma­nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2
Power consumption formulae are provided on page 8.
3
q
is defined when part is soldered on a 4-layer board.
JA

ORDERING GUIDE

Temperature Package
Model Range Description
ADN2847ACP-32 –40C to +85∞C 32-Lead LFCSP ADN2847ACP-48 –40C to +85∞C 48-Lead LFCSP ADN2847ACP-32-RL –40C to +85∞C 32-Lead LFCSP ADN2847ACP-32-RL7 –40C to +85∞C 32-Lead LFCSP ADN2847ACP-48-RL –40C to +85∞C 48-Lead LFCSP
HOLD
t
H
DATAP/DATAN
CLKP
SETUP
t
S
Figure 1. Setup and Hold Time
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADN2847 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
ADN2847
2280m
2620m
3 GNDCLKSEL
GND2
GND2
GND2
2
V
CC
IMODN
IMODN
GND2
IMODP IMODP
GND2
GND2
I
BIAS
I
BIAS
CCBIAS
GND GND4
LBWSET
ASET
IBMON
ERSET
IMMON
PSET
GND
V
CC
IMPD
FAIL
ALS
IMPDMON2
Figure 2. Metallization Photograph
2280m
DEGRADEIDTONE
GNDGND3
GND
VCC4IMPD2IMPDMON
CLKN
CLKP
GND1
DATAP
DATAN
GND1
V
1
CC
GND
PAVCAP
ERCAP
DIE ROTATED 90 IN PACKAGE
1
BOTTOM
LEFT RIGHT
TOP
2620m
Figure 3. Bonding Diagram

DIE PAD COORDINATES*

Pad Number Pad Name x[m] Y[m]
1 TP1 (GND) –996 1026 2 LBWSET –996 853 3 ASET –996 679 4 ERSET –996 506 5 PSET –996 332
6 TP2 (GND) –996 159 7 IMPD –996 –15
8IMPDMON –996 506 9 IMPDMON2 –996 –361 10 IMPD2 –996 –534 11 GND4 –996 –724 12 V
4 –995 –964
CC
13 ERCAP –925 –1191 14 PAVCAP –777 –1191 15 TP3 (GND) –606 –1191 16 V
1 –389 –1191
CC
17 GND1 –200 –1191 18 DATAN –70 –1191 19 DATAP 83 –1191 20 GND1 263 –1191 21 CLKP 442 –1191 22 CLKN 596 –1191 23 TP4 (GND) 762 –1191 24 TP5 (GND) 996 –1109 25 TP6 (GND) 996 –935 26 CLKSEL 996 –762 27 DEGRADE 996 –589 28 FAIL 996 –415 29 ALS 996 –242
Pad Number Pad Name x[m] Y[m]
30 V
3 996 –19
CC
31 GND3 996 251 32 IMMON 996 441 33 IBMON 996 614 34 GND2 996 804 35 IDTONE 995 993 36 GND2 995 1133 37 GND2 867 1191 38 V
2 713 1191
CC
39 IMODN 500 1191 40 IMODN 396 1191 41 GND2 242 1191 42 IMODP 88 1191 43 IMODP –16 1191 44 GND2 –239 1191 45 GND2 –443 1191 46 I 47 I
BIAS
BIAS
633 1191772 1191
48 CCBIAS 912 1191
*With the origin in the center of the die (see Figure 2).
REV. 0–4–
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