Datasheet ADMP421 Datasheet (ANALOG DEVICES)

Bottom Port and Digital Output

ADMP421

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

Trademarks and registered trademarks are the property of their respective owners.

Fax: [phone] ©2010–2011 Analog Devices, Inc. All rights reserved.

ADMP421

ADC

POWER

MANAGEMENT

CLK
DATA

VDD

GND

PDM

MODULATOR

CHANNEL

SELECT

L/R SELECT

07596-001

Data Sheet

FEATURES

Small and thin 3 mm × 4 mm × 1 mm surface-mount package
High SNR of 61 dBA
High sensitivity of −26 dBFS
Flat frequency response from 100 Hz to 15 kHz
Low current consumption: <650 µA
Sleep mode for extended battery life
High PSR of 80 dBFS
Fourth-order Σ-Δ modulator
Digital PDM output
Compatible with Sn/Pb and Pb-free solder processes
RoHS/WEEE compliant

APPLICATIONS

Smartphones and feature phones
Teleconferencing systems
Digital video cameras
Bluetooth headsets
Video phones
Tablets

Omnidirectional Microphone with

GENERAL DESCRIPTION

The ADMP421 is a high performance, low power, digital output
bottom-ported omnidirectional MEMS microphone. The
ADMP421 consists of a MEMS microphone element and an
impedance converter amplifier followed by a fourth-order Σ-Δ
modulator. The digital interface allows for the pulse density
modulated (PDM) output of two microphones to be time­multiplexed on a single data line using a single clock.

The ADMP421 has a high SNR and high sensitivity, making it
an excellent choice for far field applications. The ADMP421 has
a flat wideband frequency response, resulting in natural sound
with high intelligibility. Low current consumption and a sleep
mode enable long battery life for portable applications. A built­in particle filter provides high reliability. The ADMP421 complies
with the TIA-920 Telecommunications Telephone Terminal

Equipment Transmission Requirements for Wideband Digital
Wireline Telephones standard.

The ADMP421 is available in a thin 3 mm × 4 mm × 1 mm
surface-mount package. It is reflow solder compatible with no
sensitivity degradation. The ADMP421 is halide free.

FUNCTIONAL BLOCK DIAGRAM

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Figure 1.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone]

www.analog.com

ADMP421 Data Sheet

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Timing Characteristics ................................................................ 4

Absolute Maximum Ratings ............................................................ 5

ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ............................. 6

Typical Performance Characteristics ............................................. 7

PCB Land Pattern Layout ................................................................ 8

Alternate PCB Land Patterns ...................................................... 9

REVISION HISTORY

11/11—Rev. C to Rev. D

Changed PSRR to PSR ....................................................... Universal

Changed Pb-Free Temperature from 245°C to 260°C, Table 4 .. 5

Changes to Figure 8 and Figure 9 ................................................... 8

Added Alternate PCB Land Patterns Section ............................... 9

Changes to Temperature Humidity Bias (THB) Description,

Table 6 .............................................................................................. 12

8/11—Rev. B to Rev. C

Changes to Clock Frequency and Supply Voltage Parameters,

Table 1 ................................................................................................ 3

Changes to Table 3 and Table 4 ....................................................... 5

Deleted Power-Saving Features Section ........................................ 8

Changes to Figure 9 .......................................................................... 8

Added Applications Information Section ..................................... 9

Added Supporting Documents, Evaluation Board User Guides,

Circuit Note, and Application Notes Sections .............................. 9

Changes to Interfacing with Analog Devices Codecs

Section ................................................................................................ 9

Moved Sleep Mode Section and Power Savings When Disabling
One Microphone in a Multimicrophone Application Section ... 9

Changes to Figure 10 ........................................................................ 9

Change to Pick-and-Place Equipment Section ........................... 10

Deleted Evaluation Board Section ................................................ 10

Deleted Figure 10 and Figure 11; Renumbered Sequentially ... 10

Deleted Table 6; Renumbered Sequentially................................. 10

Deleted Figure 12 ............................................................................ 11

Change to Temperature Cycle Description, Table 6 .................. 11

Changes to Ordering Guide .......................................................... 12

Applications Information .............................................................. 10

Interfacing with Analog Devices Codecs ................................ 10

Sleep Mode .................................................................................. 10

Power Savings When Disabling One Microphone in a

Multimicrophone Application .................................................. 10

Supporting Documents ............................................................. 10

Handling Instructions .................................................................... 11

Pick-and-Place Equipment ....................................................... 11

Reflow Solder .............................................................................. 11

Board Wash ................................................................................. 11

Reliability Specifications ................................................................ 12

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 13

6/11—Rev. A to Rev. B

Changes to Figure 1 ........................................................................... 1

Changes to Figure 5 ........................................................................... 7

2/11—Rev. 0 to Rev. A

Changes to Features Section, Applications Section, and

General Description Section ............................................................ 1

Added Dynamic Range Parameter, Changes to Input
Characteristics Parameter and Output Characteristics

Parameter, Deleted Polarity Parameter, Table 1 ............................ 3

Changes to Table 3 ............................................................................. 5

Changes to Table 5 ............................................................................. 6

Added Power-Saving Features Section ........................................... 8

Updated Outline Dimensions ....................................................... 13

Changes to Ordering Guide .......................................................... 13

4/10—Revision 0: Initial Version

Rev. D | Page 2 of 16

Data Sheet ADMP421

PERFORMANCE

Dynamic Range

Derived from EIN and maximum acoustic input

87 dB

Power Supply Rejection

PSR

217 Hz, 100 mV p-p square wave

80 dBFS

Output Voltage Low

VOL

I

= 0.5 mA

0 0.3 × VDD

V

SPECIFICATIONS

TA = 25°C, VDD = 1.8 V, CLK = 2.4 MHz, unless otherwise noted. All minimum and maximum specifications are guaranteed. Typical
specifications are not guaranteed.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

Directionality Omni
Sensitivity1 1 kHz, 94 dB SPL −29 −26 −23 dBFS
Signal-to-Noise Ratio SNR 20 kHz bandwidth, A-weighted 61 dBA
Equivalent Input Noise EIN 20 kHz bandwidth, A-weighted 33 dBA SPL

Frequency Response2 Low frequency −3 dB point 100 Hz
High frequency −3 dB point 15 kHz
Deviation limits from flat response within

pass band

Total Harmonic Distortion THD 105 dB SPL 3 %

superimposed on VDD = 1.8 V

Maximum Acoustic Input Peak 120 dB SPL

INPUT CHARACTERISTICS

Clock Frequency CLK 1.0 2.43 3.3 MHz
Clock Duty Ratio Clock frequency of 2.4 MHz or less 40 60 %
Input Voltage High VIH 0.65 × VDD V
Input Voltage Low VIL 0.35 × VDD V

OUTPUT CHARACTERISTICS

Output Voltage High VOH I

= 0.5 mA 0.7 × VDD VDD V

LOAD

LOAD

Latency <30 µs
Wake-Up Time From sleep mode, power on 10 ms

POWER SUPPLY

Supply Voltage VDD 1.8 3.3 V
Supply Current IS Normal mode 650 µA

Sleep mode4 50 µA

1

Relative to the rms level of a sine wave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density.

2

See Figure 5 and Figure 6.

3

The microphone operates at any clock frequency between 1.0 MHz and 3.3 MHz. Some specifications may not be guaranteed at frequencies other than 2.4 MHz.

4

The microphone enters sleep mode when the clock is turned off or the clock frequency is less than 1 kHz.

−3/+2 dB

Rev. D | Page 3 of 16

ADMP421 Data Sheet

TIMING CHARACTERISTICS

Table 2.

Parameter Description Min Max Unit

Input

t

Input clock period 310 1000 ns

CLKIN

Output

t

DATA1 driven after falling clock edge 30 ns

1OUTEN

t

DATA1 disabled after rising clock edge 20 ns

1OUTDIS

t

DATA2 driven after rising clock edge 30 ns

2OUTEN

t

DATA2 disabled after falling clock edge 20 ns

2OUTDIS

Timing Diagram

t

CLKIN

CLK

DATA1

DATA2

t

2OUTEN

t

1OUTEN

t

2OUTDIS

t

1OUTDIS

07596-002

Figure 2. Pulse Density Modulated Output Timing

Rev. D | Page 4 of 16

Data Sheet ADMP421

A

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage −0.3 V to 3.6 V
Digital Pin Input Voltage

−0.3 V to V

+ 0.3 V or 3.6 V,

DD

whichever is less
Sound Pressure Level (SPL) 160 dB
Mechanical Shock 10,000 g
Vibration

Per MIL-STD-883 Method 2007,

Test Condition B
Temperature Range −40°C to +85°C

T

P

T

L

T

SMAX

TURE

T

SMIN

TEMPER

t

S

PREHEAT

RAMP-UP

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

ESD CAUTION

t

P

RAMP-DOWN

CRITICAL ZONE

t

L

T

TO T

L

P

t

25°C TO PEAK

TIME

07596-003

Figure 3. Recommended Soldering Profile Limits

Table 4. Recommended Soldering Profile Limits

Profile Feature Sn63/Pb37 Pb Free

Average Ramp Rate (TL to TP) 1.25°C/sec max 1.25°C/sec max
Preheat

Minimum Temperature (T
Maximum Temperature (T
Time (T

Ramp-Up Rate (T

SMIN

to T

), tS 60 sec to 75 sec 60 sec to 75 sec

SMAX

to TL) 1.25°C/sec 1.25°C/sec

SMAX

) 100°C 100°C

SMIN

) 150°C 200°C

SMAX

Time Maintained Above Liquidous (tL) 45 sec to 75 sec ~50 sec

Liquidous Temperature (TL) 183°C 217°C
Peak Temperature (TP) 215°C +3°C/−3°C 260°C +0°C/−5°C
Time Within 5°C of Actual Peak Temperature (tP) 20 sec to 30 sec 20 sec to 30 sec
Ramp-Down Rate 3°C/sec max 3°C/sec max
Time 25°C (t25°C) to Peak Temperature 5 minute max 5 minute max

Rev. D | Page 5 of 16

ADMP421 Data Sheet

1

2

3

CLK

L/R SELECT

GND

DATA

V

DD

4

5

07596-007

DATA1 (right): L/R SELECT tied to GND.

5

DATA

Digital Output Signal (DATA1, DATA2).

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 4. Pin Configuration (Bottom View)

Table 5. Pin Function Descriptions

Pin No. Mnemonic Description

1 CLK Clock Input to Microphone.
2 L/R SELECT Left Channel or Right Channel Select.

D ATA2 (left): L/R SELECT pulled to VDD.
3 GND Ground.
4 VDD Power Supply. Placing a 0.1 µF (100 nF) ceramic type X7R capacitor between Pin 4 (VDD) and ground is strongly

recommended for best performance and to avoid potential parasitic artifacts. The capacitor should be placed as
close to Pin 4 as possible.

Rev. D | Page 6 of 16

Data Sheet ADMP421

–10

–8

–6

–4

–2

0

2

4

6

8

10

100

10k1k

FREQUENCY ( Hz )

(dB)

07596-004

10

0

–10

–20

100 1k 10k

FREQUENCY ( Hz )

(dB)

07596-005

–100

–90

–80

–70

–60

–50

–40

200 500 1k 2k 5k 10k 20k

07596-006

FREQUENCY ( Hz )

PSR (dBFS)

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 5. Frequency Response Mask

Figure 7. Typical Power Supply Rejection vs. Frequency

Figure 6. Typical Frequency Response (Measured)

Rev. D | Page 7 of 16

ADMP421 Data Sheet

C

R

PCB LAND PATTERN LAYOUT

The recommended PCB land pattern for the ADMP421 should
be laid out to a 1:1 ratio to the solder pads on the microphone
package, as shown in Figure 8. Care should be taken to avoid
applying solder paste to the sound hole in the PCB. A suggested

4× 0.40 × 0.60

(0.30)

solder paste stencil pattern layout is shown in Figure 9. The
diameter of the sound hole in the PCB should be larger than the
diameter of the sound port of the microphone. A minimum
diameter of 0.5 mm is recommended.

3.80

CENTER LINE

ø1.70

0.35

0.90

(0.30)

(0.30)

0.70

(1.000)

2× R0.10

(0.550)

2.80

ø1.10

(0.30)

0.352.05

07596-008

Figure 8. Suggested PCB Land Pattern Layout

ENTE

LINE

1.849

1.849

1.45

1.525

2.45

0.9

0.35

1.000

0.375

1.498 × 0.248

0.248 × 0.948 ( 2 × )

0.398 × 0.298 ( 4 × )

0.7

0.248 × 1.148 ( 2 × )

0.248 × 0.498 ( 2 × )

0.205 WIDE

0.362 CUT (3×)

07596-009

1.17

24° 24°

1.498

Figure 9. Suggested Solder Paste Stencil Pattern Layout

Rev. D | Page 8 of 16

Data Sheet ADMP421

07596-011

07596-012

ALTERNATE PCB LAND PATTERNS

The ADMP421’s standard PCB land pattern has a solid ring
around the edge of the footprint, which may make routing the
microphone signals more difficult in some board designs. This
ring is used to improve the RF immunity performance of the
ADMP421, but it is not necessary to have this full ring
connected for electrical functionality. If a design can tolerate
reduced RF immunity then this ring can either be broken or
removed completely from the PCB footprint. Figure 10 shows
an example land pattern with no enclosing ring around the edge
of the part, and Figure 11 shows an example pattern with the
ring broken on two sides so that the inner pads can be more
easily routed on the PCB.

Figure 10. Example PCB Land Pattern with No Enclosing Ring

Figure 11. Example PCB Land Pattern with Broken Enclosing Ring

Note that in both of these patterns, the solid ring around the
sound port is still present; this ring is needed to ground the
microphone and for acoustic performance. The pad on the
package connected to this ring is ground and still needs a solid
electrical connection to the PCB ground. If a pattern like one of
these two examples is used on a PCB, take care that the
unconnected ring on the bottom of the ADMP421 is not placed
directly over any exposed copper. This ring on the microphone
is still at ground and any PCB traces routed underneath it need
to be properly masked to avoid short circuits.

Rev. D | Page 9 of 16

ADMP421 Data Sheet

ADMP421

CLK

V

DD

L/R SELECT GND

DATA

0.1µF

ADMP421

CLK

V

DD

L/R SELECT GND

DATA

0.1µF

MICBIAS

AVDD

1.8V TO 3.3V

JACKDET/MICIN

BCLK/GPIO2

ADAU1361

OR

ADAU1761

07596-010

DGND AGND

APPLICATIONS INFORMATION

INTERFACING WITH ANALOG DEVICES CODECS

Analog Devices ADAU1361, ADAU1761, and ADAU1781
codecs feature digital microphone inputs that support the
ADMP421 PDM output data format. See the connection
diagrams shown in Figure 12, and refer to the AN-1003

Application Note and the codecs’ respective data sheets for

more details on the digital microphone interface.

SLEEP MODE

The microphone enters sleep mode when the clock is turned off
or the clock frequency falls below 1 kHz. In sleep mode, the
microphone data output is in high impedance state and the
current consumption is less than 50 µA.

POWER SAVINGS WHEN DISABLING ONE MICROPHONE IN A MULTIMICROPHONE APPLICATION

The ADMP421 has a unique power-saving feature when used in
systems where two or more microphones share the same clock
and/or data lines. The microphone is designed to present high
impedance on both the clock and data pins when the power
supply (V
presents no load to and consumes no power from other active
microphones.

) pin is at 0 V or floating. This disabled microphone

DD

SUPPORTING DOCUMENTS

Evaluation Board User Guides

UG-118, EVAL -ADMP421Z Bottom Port Digital Output MEMS

Microphone Evaluation Board

UG-183, EVAL -ADMP421Z-FLEX: Bottom-Ported Digital

Output MEMS Microphone Evaluation Board

Circuit Note

CN-0078, iMEMS Digital Microphone Simplifies the Interface to

a SigmaDSP Audio Codec

Application Notes

AN-1003, Recommendations for Mounting and Connecting

Analog Devices, Inc., Bottom-Ported MEMS Microphones

AN-1068, Reflow Soldering of the MEMS Microphone

AN-1112, Microphone Specifications Explained

AN-1124, Recommendations for Sealing Analog Devices, Inc.,

Bottom-Port MEMS Microphones from Dust and Liquid Ingress

Figure 12. ADAU1361 and ADAU1761 Stereo Interface Block Diagram

Rev. D | Page 10 of 16

Data Sheet ADMP421

HANDLING INSTRUCTIONS

PICK-AND-PLACE EQUIPMENT

The MEMS microphone can be handled using standard pick­and-place and chip shooting equipment. Care should be taken
to avoid damage to the MEMS microphone structure as follows:

• Use a standard pickup tool to handle the microphone.

Because the microphone hole is on the bottom of the
package, the pickup tool can make contact with any part
of the lid surface.

• Use care during pick-and-place to ensure that no high

shock events above 10 kg are experienced because such
events may cause damage to the microphone.

• Do not pick up the microphone with a vacuum tool that

makes contact with the bottom side of the microphone.
Do not pull air out of or blow air into the microphone port.

• Do not use excessive force to place the microphone on

the PCB.

REFLOW SOLDER

For best results, the soldering profile should be in accordance
with the recommendations of the manufacturer of the solder
paste used to attach the MEMS microphone to the PCB. It is
recommended that the solder reflow profile not exceed the limit
conditions specified in Figure 3 and Ta b l e 4.

BOARD WASH

When washing the PCB, ensure that water does not make
contact with the microphone port. Blow-off procedures and
ultrasonic cleaning must not be used.

Rev. D | Page 11 of 16

ADMP421 Data Sheet

Component CDM ESD

All pins, 0.5 kV

RELIABILITY SPECIFICATIONS

The microphone sensitivity after stress must deviate by no more than 3 dB from the initial value.

Table 6.

Stress Test Description

Low Temperature Operating Life −40°C, 500 hours, powered
High Temperature Operating Life +125°C, 500 hours, powered
Temperature Humidity Bias (THB) +85°C/85% relative humidity (RH), 500 hours, powered
Temperature Cycle −40°C/+125°C, one cycle per hour, 1000 cycles
High Temperature Storage +150°C, 500 hours
Low Temperature Storage −40°C, 500 hours

Component HBM ESD All pins, 1.5 kV
Component MM ESD All pins, 0.2 kV

Rev. D | Page 12 of 16

Data Sheet ADMP421

OUTLINE DIMENSIONS

4.10

4.00

1.10

1.00

0.90

3.90

P

I

TOP VIEW

SIDE VIEW

3.54 REF

1

N

2.48
REF

0.72 REF

0.24 REF

C

E

R

E

N

R

E

E

F

R

R

N

E

C

O

3.10

3.00

2.90

(

0.90

0

4

.

0

2

,

1

s

P

n

i

0.30 REF

Figure 13. 5-Terminal Chip Array Small Outline No Lead Cavity [LGA_CAV]

4 mm × 3 mm Body

Dimensions shown in millimeters

12.30

12.00

11.70

4.80

3.20

2.05

2.00

1.95

3.80

2

8.00

1

4.00

2.20

1.60 MAX

1.50 NOM

1.50 MIN
DIA

0

6

.

0

×

)

5

,

4

,

0.30 REF

1.05 REF

0.35

(CE-5-1)

DETAIL A

0.95 REF

12

0.30 REF

2.05

0.70

3

45

0.30 REF

3.80

BOTTOM VIEW

A

5.55

5.50

5.45

A

1.85

1.75

1.65

2

0.25

1.70 DIA.

1.10 DIA.

0.25 DIA.
(THRU HOLE)

R0.10(2×)

0.35

0.20

MAX

1.60

SECTION A-A

1.50

2.80

0.35

0.30

0.25

1.30 REF

06-16-2010-G

NOTES:

10 SPROCKET H OLE PI TCH CUMULATIVE TOLERANCE ± 0.20.

1.

2. POCKET POSITION RELATIVETO SPROCKET HOLE
MEASURED AS TRUE POSITION OF PO CKET, NOT
POCKET HOLE.

0.25

DETAIL A

0.50 R

062408-A

Figure 14. LGA_CAV Tape and Reel Outline Dimensions

Dimensions shown in millimeters

ORDERING GUIDE

Model1 Temperature Range Package Description Package Option2 Ordering Quantity

ADMP421BCEZ-RL −40°C to +85°C 5-Terminal LGA_CAV, 13” Tape and Reel CE-5-1 5,000
ADMP421BCEZ-RL7 −40°C to +85°C 5-Terminal LGA_CAV, 7” Tape and Reel CE-5-1 1,000
EVAL-ADMP421Z Evaluation Board
EVAL-ADMP421Z-FLEX Flex Evaluation Board

1

Z = RoHS Compliant Part.

2

This package option is halide free.

Rev. D | Page 13 of 16

ADMP421 Data Sheet

NOTES

Rev. D | Page 14 of 16

Data Sheet ADMP421

NOTES

Rev. D | Page 15 of 16

ADMP421 Data Sheet

©2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and

NOTES

registered trademarks are the property of their respective owners.
D07596-0-11/11(D)

Rev. D | Page 16 of 16