Analog Devices ADMC300AN Application Notes

a Boot loading the ADMC300 from a Motorola M68HC11 SCI Port

INTRODUCTION

In addition to its ability to boot load from a serial ROM or
EEPROM, the ADMC300 DSP Motor Controller can be boot
loaded from an external device configured as a standard
Universal Asynchronous Receiver Transmitter (UART). This
document describes how to boot load the ADMC300 from a
Motorola M68HC11 microcontroller using its Serial
Communications Interface (SCI).

UART Boot Load Requirements

To download code and data to the ADMC300 the external
device’s transmit line (TxD) must be connected to the
ADMC300’s SPORT1 receive line (DR1B pin). Similarly its
receive line (RxD) must be connected to the ADMC300’s
SPORT1 transmit line (DT1 pin). RS-232 line drivers can be
used to convert from the data receive and transmit TTL signals
to the RS-232 standard. The protocol used for asynchronous
communication is 1 start bit, 8 data bits, 1 stop bit, and no
parity.

UART Boot Load Operation

At reset the ADMC300 ROM monitor program initializes and
first tries to boot load from an SROM/EEPROM on its DR1A
pin. If no device is present on DR1A, or an invalid program is
detected, the monitor will fail this interface and switch its input
to the DR1B pin. It takes approximately 1250 DSP cycles
following reset for this to happen (50us @ 25 MHz
CLKOUT). Next the monitor waits to receive 2 bytes of
information on DR1B. For the monitor to recognize an
external UART boot loading device these 2 bytes must be
0x70, 0x71 respectively.

The first byte received (0x70) is called the autobaud byte. It is
used to calculate the baud rate at which the data is coming in.
This is known as the autobaud feature. The ADMC300 will
lock onto the baud rate of the external device automatically up
to a maximum baud rate of 300 kHz for a 25 MHz CLKOUT.

The second byte received (0x71) is called the header byte. It
tells the monitor what type of interface it is connected to. For
the UART boot loader the header byte is 0x71.

Following these first two bytes the monitor then receives the
code and data to be loaded into the ADMC300 program and
data memory. The required syntax for the file being loaded is

shown in Table 1. Each row of the table represents 1 byte in
the file.

Both the program and data memory portions of the boot load
file contain checksums that are used by the monitor to verify
correct loading operation. The PM checksum is calculated by
accumulating, in the MR0 register, the upper 16 bits of each
PM location received. The lower 8 bits are accumulated in the
MR1 register. When all locations have been received, the
MR1 register is masked with 0xFF, removing any overflow out
of the 8 bits. The MR0 register is then compared to the upper
16 bits of the received checksum and the MR1 register is
compared to the lower 8 bits of the received checksum. The
DM checksum is calculated in the same way as the upper 16
bits of the PM checksum. You can use the MAKEPROM tool
(included in the evaluation kit software) to calculate these
expected checksums for you. Use the -c option and
MAKEPROM will print out the expected checksums that you
can then enter into your boot load file.

Each byte received by the ADMC300, including the header
byte, is echoed back over DT1. The autobaud byte is not
echoed back. The external device may use this echo as a
means of synchronization and verification that the data has
been received correctly. As the monitor receives the boot load
file it extracts the program and data memory blocks, stores
them in memory, and calculates the checksums. The monitor
compares the checksums against the expected checksums that
it receives. If the monitor detects a checksum miscompare it
will fail the boot load and restart itself.

If the monitor successfully loads the program and data
memories without error then it starts execution of the loaded
program at location 0x0060.

Boot Loading Example 1 from the M68HC11

The program listed in Appendix A boot loads the program
example1.dsp (included in the evaluation kit software) from
the M68HC11 SCI port to the ADMC300. The data array
“TESTFILE” was created by extracting the bytes from the
example1.exe file. The checksums were calculated by running
the MAKEPROM tool with the -c option on the example1.exe
file.

As can be seen in the program the autobaud and header bytes
seem different from the required 0x70, 0x71 as stated earlier.

REV. A Motion Control Group, Analog Devices,  1997

Analog Devices, Inc., 1997 Boot loading the ADMC300 from a Motorola M68HC11 SCI Port

This is because a UART sends and receives LSB first, while
the SPORT on the ADMC300 sends and receives MSB first.
Also the UART sends a start bit (0) first and a stop bit (1) last.
Therefore a 0x87 written to the SCDAT register on the
M68HC11 will be received by the ADMC300 as a 0x70.
Likewise a 0xC7 sent by the M68HC11 will be received as a
0x71 by the ADMC300.

The program sci_ex1.asm was tested on a Motorola
M68HC11EVB board connected to an ADMC300 evaluation
board. A serial cable was connected from the host port
connector on the M68HC11EVB to the UART connector on
the ADMC300 evaluation board. The test procedure was as
follows:

1. Reset the ADMC300 board.

2. Download the sci_ex1.s19 file to the
M68HC11EVB.

3. Execute “call c400” on the M68HC11EVB.

4. Observe the PWM signals come alive on the
ADMC300.

Number of PM Blocks
PM Start Address Block 1 (MSB)
PM Start Address Block 1 (LSB)
Number of PM Lines in Block 1 (MSB)
Number of PM Lines in Block 1 (LSB)
.
. Block 1 Code
.
PM Start Address Block N (MSB)
PM Start Address Block N (LSB)
Number of PM Lines in Block N (MSB)
Number of PM Lines in Block N (LSB)
.
. Block N Code
.
PM Checksum (Upper Byte)
PM Checksum (Middle Byte)
PM Checksum (Lower Byte)
Number of DM Blocks
DM Start Address Block 1 (MSB)
DM Start Address Block 1 (LSB)
Number of DM Lines in Block 1 (MSB)
Number of DM Lines in Block 1 (LSB)
.
. Block 1 Data
.
DM Start Address Block N (MSB)
DM Start Address Block N (LSB)
Number of DM Lines in Block N (MSB)
Number of DM Lines in Block N (LSB)
.
. Block N Data
.
DM Checksum (Upper Byte)
DM Checksum (Lower Byte)

Table 1. File Syntax For UART Boot Loading

REV. A Page 2

Analog Devices, Inc., 1997 Boot loading the ADMC300 from a Motorola M68HC11 SCI Port

M68HC11 Program Listing (sci_ex1.asm)

* Download's the example1 program to the ADMC300

HOSTCO EQU $E330 * connect sci to host port
TARGCO EQU $E338
IODEV EQU $AA
SCSR EQU $102E
SCDAT EQU $102F
FILESIZE EQU 164

ORG $C400
* connect to ADMC300 over host I/O port
CLR IODEV * IODEV=SCI
JSR HOSTCO * connect SCI to host I/O port

LDAA #$87 * send autobaud character
JSR OUTBYTE

LDAA #$C7 * send header byte
JSR OUTBYTE

JSR INBYTE * receive echo of header byte

STAA HBYTE

* load the ADMC300 with the user program

LDX #TESTFILE
LDY #FILESIZE

LOADLP LDAA 0,X

JSR OUTBYTE * send 1 byte
JSR INBYTE * receive echo

STAA ECHO
INX
DEY
CPY #0
BNE LOADLP

* disconnect from ADMC300 and return to BUFFALO program
LDAA #$01
STAA IODEV * IODEV=ACIA
JSR TARGCO * connect SCI to target on evb board

RTS

**********
* INBYTE() - Read SCI. Returns a=char or 0.
* NOTE: Routine is identical to BUFFALO INPUT routine except
* no cop reset and only SCI portion of code is used.
**********
INBYTE EQU *

PSHX
PSHY
JSR INSCIBYT read sci

PULY
PULX
RTS

**********
* OUTBYTE() - Output character in A.
* NOTE: Routine is identical to BUFFALO OUTPUT routine except
* only SCI portion of code is used.

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