Analog Devices ADM8840 prg Datasheet

PRELIMINAR Y TECHNICAL D A T A

Charge Pump Regulator & COM Driver

a

Preliminary Technical Data

FEATURES
Programmable COM Driver to prevent Screen-Burn
3 Voltages (5.0V,15.0V,-15.0V) from one 3V Supply
Power Efficiency optimised for use with TFT in mobile
phones
Low Quiescent Current
Low Shutdown Current (<5uA)
Shutdown Function

APPLICATIONS
Handheld Instruments
TFT LCD Panels
Cellular Phones

4.7␮F

GENERAL DESCRIPTION

The ADM8840 combines a charge pump regulator and a
Common Line (COM) driver in a single chip solution for use
in TFT LCD’s. The device provides an LCD controller and
grayscale DAC supply voltage of 5.0V (±2%), 2 gate drive
voltages of +15V and -15V and a COM driver voltage. This
COM Driver voltage alternates the polarity of the Common
line voltage every line (or every frame) on the display in order
to prevent screen-burn occuring over time. The ADM8840
is powered by a single 3.0V supply.

The ADM8840 has an internal 100KHz oscillator for driving
the charge pumps.

The COM Driver section of the ADM8840 can be used to
generate the alternate frame or line inversion of the COM
line of the LCD panel. The ADM8840 receives the COM
clock from the controller with a frequency up to 10kHz and
allows programmable conditioning of its amplitude and
centre voltage through the use of on-board DAC’s. This
allows programmable elimination of display flicker caused
by the COM inversion.

The COM_OUT amplitude can be programmed from 4.0V
to 7.0V in steps of 28mV. The COM_OUT centre voltage
can be programmed to 0.9V to 2.8V in steps of 14mV.

for Color TFT Panel

ADM8840

FUNCTIONAL BLOCK DIAGRAM

-15V

C9

5VO UT

C4

0.22␮F

C2

0.22

C3

0.22

C1

3.3

3.3

C11

C12

C13

22nF

0.22␮F

+15V

C8

0.22

␮

␮

F

␮

F

+5V

C7

2.2␮F

VOUT

C10

3.3

␮

F

␮

F

C5

␮

F

4.7␮F

4.7␮F

4.7

␮

F

COM_OUT

C

PANEL

TM

).

VOLTAGE

C4+

INVER T ER

ADM8840

OSCILLATOR

VREF

SHUTDOWN

CONTROL

8

8

SHDN

C6

V

CC

DAC1_IN

DAC1_SD

CLK

SERIAL

DATA

INTERFACE

CS/

LDAC

COM_I N

DAC2_SD

DAC2_IN

DAC 1

DAC 2

TIMING

GENERATOR

DISCHA RGE

CONTROL

LOGIC

INT/EXT

DAC 1

INT/EXT

DAC 2

GND

REGUL ATOR

VOLTAGE

ADDER

+

-

LEVEL

TRANSLATOR

+

5.5k

-

⍀

TRIPLE

VOLTAGE

TRIPLER
DOUBLE

LDO

VOLTAGE

VOLTAGE
DOUBLER

POWER
BUFFER

C4-

C2+

C2-

C3+

C3-

5VIN

C1+

C1-

C5+

C5-

ADD_OUT

TRANS_OUT

COM_OUT_AC

The ADM8840 provides power up sequencing of the -15V
and +15V gate drive outputs, ensuring the -15V starts to
power up before the +15V.

The ADM8840 has a number of power save features, includ­ing low power Shutdown. The 5.0V output consumes the
most power, so Power Efficiency is also maximised on this
output with an oscillator enabling scheme (Green Idle

The ADM8840 is fabricated using CMOS technology for
minimal power consumption. The part is packaged in a 32­pin LFCSP package.

F

REV. PrG 2/03

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

TM

Green Idle is a registered trademark of Analog Devices Inc.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] Analog Devices, Inc., 2003

ADM8840

SHDN

C6

4.7␮F

DAC1_IN

DAC1_SD

PRELIMINAR Y TECHNICAL D A T A

-15V

C9

C8

C7

VOUT

+15V

0.22␮F

0.2 2

+5V

2.2␮F

C10

␮

3.3

␮

F

F

VOLTAGE
INVERTER

ADM8840

TRIPLE

VOLTAG E

TRIPLER

DOUBLE

OSCILLATOR

SHUTDOWN

CONT RO L

V

CC

TIMING

GENERATOR

DISCHAR G E

CO NT RO L

LOGIC

VOLTAGE

ADDER

LDO

VOLTAGE

REG UL ATOR

VOLTAG E

DOUBLER

C4+

C4-

C2+

C2-

C3+

C3-

5VIN

5VO U T

C1+

C1-

C5+

C5-

C4

0.22␮F

C2

0.22

C3

0.22

C1

3.3

␮

C5

␮

3.3

␮

F

␮

F

F

F

CLK

DATA

CS /

LDAC

COM_IN

DAC2_SD

DAC2_IN

VREF

SERIAL

INTERFACE

8

8

DAC 1

DAC 2

INT /EXT

DAC 1

INT/EXT

DAC 2

GND

+

-

+

-

ADM8840 FUNCTIONAL BLOCK DIAGRAM

LEVEL

TRANS L ATOR

5.5k

⍀

POWER

BUFFER

ADD_OUT

C11

4.7␮F

TRANS_OUT

C12

4.7␮F

COM_OUT_AC

C13

␮

F

4.7

C

PANEL

22nF

COM_OUT

–2– REV. PrG 2/03

PRELIMINAR Y TECHNICAL D A T A

(VCC = +3V-10%,+20%, TA=-40°C to +85°C unless otherwise noted )
C1,C5,C10=3.3

␮␮

␮F; C2,C3,C4,C8,C9=0.22

␮␮

PARAMETER Min Typ Max Units Test Conditions

Input Voltage,V
Supply Current,I

CC

CC

CHARGE PUMP REGULATOR
+5.0V OUTPUT

Output Voltage 4.9 5.0 5.1 V I
Output Current 5 mA
Output Ripple 10 mV p-p 5mA load
Transient Response 5 us I

+15.0V OUTPUT

Output Voltage 14.0 15.0 16.0 V I
Output Current 50 150 uA

Output Ripple 50 mV p-p I

-15.0V OUTPUT

Output Voltage -16.0 -15.0 -14.0 V I
Output Current -150 -5 0 uA
Output Ripple 50 mV p-p I

Charge-Pump Frequency T BD 100 TB D kHz

DIGITAL INPUT PINS

Input Voltage, V

IH

Digital Input Current 1 ␮A
Digital Input Capacitance 10 pF Note 1.

COM DRIVER

COM_OUT
Amplitude 4 7 V

Amplitude Stepsize 28 mV
Amplitude Accuracy <10% % V

Center Voltage 0.9 1.8 2.8 V
Center Voltage Stepsize 14 m V
Center Voltage Accuracy <10% % V

Rise/Fall Time 1 ␮sC
Center Voltage Settling Time TBD us

PANEL

Load Capacitance 20 nF

POWER EFFICIENCY 70 % 5V

NOTES

1. Guaranteed by Design. Not 100% Production Tested.

2. COM Driver load is defined as the load current flowing through C13 with DACs loaded with preset values.
* Specifications are target values and are subject to change without notice.

␮␮

␮F; C6,C11,C12,C13=4.7

␮␮

␮␮

␮F; C7 =2.2

␮␮

␮␮

␮F

␮␮

2.7 3.3 3.6 V
750 uA O/Ps Unloaded; COM_IN Low;

5 uA Shutdown Mode

0.7V

CC

0.3V

CC

ADM8840-SPECIFICATIONS

DAC1_SD, DAC2_SD Low

DAC1_IN and DAC2_IN should
be open circuit because there
is a voltage on these pins due to
the output of the DAC.

= 10uA to 5mA

L

stepped from 10uA to 5mA

L

= 1uA to 100uA

L

=100uA

L

= -1uA to -100uA

L

=-100uA

L

V
V

COM_OUT

DAC1 loaded with preset values;
Measured at TRANS_OUT
DAC1 preset values is 1V and
Vcom should be 6V

CENTER

DAC2 loaded with preset values
DAC2 preset values is 500mV and
Vcentre should be 1.5V.

PANEL

OUT

+/-15V Load = +/-100uA;
COM_IN Freq = 10kHz;
C

PANEL

Vcc=2.7V;
Note 2

=5V;

=1.8V;

=20nF

Load = 5mA;

= 20nF;

–3–REV. PrG 2/03