Precision 1.8V to 5V Power Supply Monitoring
31 Reset Threshold Options:
1.58V to 5.0V
Four Reset Timeouts:
1ms, 20ms, 140ms, 1120ms
Manual Reset Input
Reset Output Stage- Push-Pull Active-Low
Guaranteed Reset Output valid to V
Power Supply Glitch Immunity
Specified Over -40°C to +125°C Temperature Range
4-Lead SC70 Package
APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Portable Equipment
GENERAL DESCRIPTION
The ADM6384 is a supervisory circuit which monitors power
supply voltage levels in microprocessor-based systems. A
power-on-reset signal is generated when the supply voltage rises
to a preset threshold level. The ADM6384’s debounced manual
reset input can be used to initiate a reset by means of an
external push-button or logic signal.
The part is available in a choice of the following 31 reset
threshold options, from 1.58V to 5.0V. The minimum reset
timeout periods are 1ms, 20ms, 140ms and 1120ms.
The ADM6384 is available in a 4-lead SC70 package and
typically consumes only 7µA, making it suitable for use in low
power portable applications
CC
=1V
Circuit in 4-Lead SC70
ADM6384
FUNCTIONAL BLOCK DIAGRAM
ADM6384
V
CC
MR
V
REF
DEBOUNCE
ADM6384
MR
Figure 1. Typical ADM6384 Operating Circuit
V
CC
GND
RESET
GENERATOR
RESET
100K
RESET
GND
V
CC
MICROPROCESSOR
SYSTEM
RESET
GND
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
Parameter Min Typ Max Units Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range 1 5.5 V
Supply Current 7 13 µA VCC=5.5V, no load
6 11 µA VCC=3.6V, no load
4 7 µA VCC=2.5V, no load1
3 6 µA VCC=1.8V, no load1
RESET THRESHOLD VOLTAGE
ADM6384_50_
ADM6384_49_ 4.78 4.90 5.02 V
ADM6384_48_
ADM6384_47_ 4.58 4.70 4.82 V
ADM6384_46_
ADM6384_45_ 4.39 4.5 4.61 V
ADM6384_44_
ADM6384_43_ 4.19 4.30 4.41 V
ADM6384_42_ 4.1 4.2 4.31 V
ADM6384_41_ 4.0 4.1 4.2 V
ADM6384_40_ 3.9 4.0 4.1 V
ADM6384_39_ 3.8 3.9 4.0 V
ADM6384_38_ 3.71 3.8 3.9 V
ADM6384_37_ 3.61 3.7 3.79 V
ADM6384_36_ 3.51 3.6 3.69 V
ADM6384_35_ 3.41 3.5 3.59 V
ADM6384_34_ 3.32 3.4 3.49 V
ADM6384_33_ 3.22 3.3 3.38 V
ADM6384_32_ 3.12 3.2 3.28 V
ADM6384_31_
ADM6384_30_ 2.93 3.0 3.08 V
ADM6384_29_
ADM6384_28_ 2.73 2.8 2.87 V
ADM6384_27_ 2.63 2.70 2.77 V
ADM6384_26_
ADM6384_25_ 2.44 2.5 2.56 V
ADM6384_24_ 2.34 2.4 2.46 V
ADM6384_23_
ADM6384_22_
ADM6384_17_
ADM6384_16_
RESET THRESHOLD TEMPERATURE COEFFICIENT 40 ppm/°C
RESET THRESHOLD HYSTERESIS 3 mV
RESET TIMEOUT PERIOD
ADM6384_ _D1 1 2 ms
ADM6384_ _D2 20 40 ms
ADM6384_ _D3 140 280 ms
ADM6384_ _D4 1120 2240 ms
VCC to RESET DELAY
RESET
Output Voltage
VOL 0.3 V VCC>=1.0V, I
0.3 V VCC>=2.5V, I
4.88 5.00 5.12 V
4.68 4.80 4.92 V
4.51 4.63 4.74 V
4.27 4.38 4.48 V
3.00 3.08 3.15 V
2.85 2.93 3.00 V
2.56 2.63 2.69 V
2.26 2.31 2.37 V
2.13 2.19 2.24 V
1.62 1.67 1.71 V
1.54 1.58 1.61 V
35 µs V
falling at 10mV/µs
CC
=80µA
SINK
=1.2mA
SINK
Rev. PrD | Page 2 of 10
Preliminary Technical Data ADM6384
Parameter Min Typ Max Units Test Conditions/Comments
0.4 V VCC>=4.5V, I
VOH 0.8x VCC V VCC>=2.5V, I
0.8x VCC V VCC>=4.5V, I
RESET
Rise Time
MANUAL RESET INPUT
MR Input Threshold
VIL 0.3xVCC V VCC <4V
0.8 V VCC <4V
VIH 0.7xVCC V VCC >4V
2.4 V VCC >4V
MR Input Pulse Width
MR Glitch Rejection
MR Pull-up Resistance
MR to Reset Delay
1
T
= 25oC Only
A
5 25 ns
1 µs
100 ns
32 63 100
200 ns
k⍀
From 10% to 90% V
=3.3V
V
CC
=3.2mA
SINK
SOURCE
SOURCE
=500µA
=800µA
, CL=5pF,
CC
ABSOLUTE MAXIMUM RATINGS
Table 2. TA = 25°C unless otherwise noted.
ParameterRating
VCC -0.3V to +6V
RESET
Output Current (
Operating Temperature Range -40°C to +125°C
Storage Temperature Range -65°C to +150°C
θJA Thermal Impedance, SC70
Lead Temperature
Soldering (10 sec) 300°C
Vapour Phase (60 sec) 215°C
Infrared (15 sec) 220°C
RESET
)
-0.3V to +6V
20mA
146°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. PrD | Page 3 of 10
ADM6384 Preliminary Technical Data
PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
1
ADM6384
TOP VIEW
(Not to Scale)
RESET
Table 3. Pin Functional Descriptions
Pin No. Name Description
1 GND Ground
2
3
4 VCC Power Supply Voltage being Monitored.
RESET
MR
Active-Low Reset Output, which is asserted whenever V
Push-Pull Output Stage.
Manual Reset Input. This is an active-low input which, when forced low for at least 1µs,
generates a reset.
Features a 52k⍀ internal pull-up.
2
Pin Configuration
V
4GND
CC
3
MR
is below the reset.threshold, VTH.
CC
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. PrD | Page 4 of 10
ADM6384 Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS
10.0
9.5
9.0
8.5
VCC = 5V
8.0
7.5
7.0
(µA)
6.5
CC
I
6.0
5.5
5.0
4.5
4.0
3.5
VCC = 3V
VCC = 1.5V
–40–200 20406080
TEMPERATURE (°C)
Figure 2. Supply Current vs. Temperature
04533-0-006
100
90
80
70
60
50
40
30
TO RESET DELAY (µs)
CC
V
20
10
0
–4040200–206080
Figure 5. V
Falling to Reset Propagation Delay vs. Temperature
CC
TEMPERATURE (°C)
04533-0-009
80
75
70
65
60
55
50
45
40
(µA)
35
CC
I
30
25
20
15
10
5
0
VCC (V)
Figure 3. Supply Current vs. Supply Voltage
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
NORMALIZED RESET THRESHOLD
0.96
0.95
–4040200–206080
TEMPERATURE (°C)
Figure 4. Normalized Reset Threshold vs. Temperature
340
320
300
280
260
240
220
200
180
160
140
MANUAL RESET TO RESET DELAY (ns)
120
100
5.502.01.51.00.52.5 3.0 3.5 4.0 4.5 5.0
04533-0-007
04533-0-008
–4040200–206080
TEMPERATURE (°C)
Figure 6. Manual Reset to Reset Propagation Delay vs. Temperature
1.20
1.15
1.10
1.05
1.00
0.95
0.90
NORMALIZED RESET TIMEOUT
0.85
0.80
–4040200–206080
TEMPERATURE (°C)
04533-0-010
04533-0-011
Figure 7. Normalized Reset Timeout Period vs. Temperature
Rev. PrD | Page 5 of 10
ADM6384 Preliminary Technical Data
160
140
120
100
80
60
40
20
MAXIMUM TRANSIENT DURATION (µs)
VTH = 4.63V
VTH = 2.93V
0
Figure 8. Maximu m V
RESET OCCURS ABOVE CURVE
OVER DRIVE VOD (mV)
Transient Duration vs. Reset Threshold Overdrive
CC
100010100
04533-0-013
190
180
170
160
150
140
130
120
MR MINIMUM PULSE WIDTH (ns)
110
100
–50050
TEMPERATURE (°C)
Figure 9. Manual Reset Minimum Pulse Width vs. Temperature
04533-0-014
Rev. PrD | Page 6 of 10
ADM6384 Preliminary Technical Data
CIRCUIT DESCRIPTION
The ADM6384 provides microprocessor supply voltage
supervision by controlling the microprocessor’s reset input.
Code execution errors are avoided during power-up, powerdown, and brownout conditions by asserting a reset signal when
the supply voltage is below a preset threshold and by allowing
supply voltage stabilization with a fixed-timeout reset pulse
after the supply voltage rises above the threshold. If the user
detects a problem with the system’s operation, a manual reset
input is available to reset the microprocessor by means of an
external push-button, for example.
RESET OUTPUT
The ADM6384 features an active-low, push-pull reset output.
The reset signal is guaranteed to be logic low for V
1V.
down to
CC
The reset output is asserted when V
threshold (V
) or when MR is driven low. Reset remains
TH
asserted for the duration of the reset active timeout period (t
after V
rises above the reset threshold or after MR transitions
CC
is below the reset
CC
)
RP
from low-to-high. Figure 10 illustrates the behavior of the reset
outputs.
V
V
CC
RESET
CC
1V
0V
V
CC
0V
Figure 10. Reset Timing Diagram
V
TH
t
RP
V
TH
t
RD
MANUAL RESET INPUT
The ADM6384 features a manual reset input (MR) which, when
MR
driven low, asserts the reset output. When
low to high, reset remains asserted for the duration of the reset
active timeout period before deasserting. The
kΩ internal pull-up so that the input is always high when
unconnected. An external push-button switch can be connected
between
MR
and ground so that the user can generate a reset.
Debounce circuitry for this purpose is integrated on-chip. Noise
immunity is provided on the
MR
input, and fast, negative-going
transients of up to 100 ns (typ) are ignored. A 0.1 µF capacitor
between
MR
and ground provides additional noise immunity.
transitions from
MR
input has a 52
Rev. PrD | Page 7 of 10
ADM6384 Preliminary Technical Data
APPLICATION INFORMATION
NEGATIVE-GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply
transients, the ADM6384 is equipped with glitch rejection
circuitry. The typical performance characteristic in Figure 8
plots V
curves show combinations of transient magnitude and duration
for which a reset is not generated for 4.63 V and 2.93 V reset
threshold parts. For example, with the 2.93 V threshold, a
transient that goes 100 mV below the threshold and lasts 8 µs
typically does not cause a reset, but if the transient is any bigger
in magnitude or duration, a reset is generated. An optional 0.1
µF bypass capacitor mounted close to V
glitch rejection.
ENSURING RESET VALID TO VCC= 0 V
Both active-low and active-high reset outputs are guaranteed to
be valid for V
resistor with push-pull configured reset outputs, valid outputs
for V
a resistor connected between
output low when it is unable to sink current. For the active-high
case, a resistor connected between RESET and V
output high when it is unable to source current. A large
resistance such as 100 kΩ should be used so that it does not
overload the reset output when V
transient duration versus the transient magnitude. The
CC
provides additional
CC
as low as 1 V. However, by using an external
CC
as low as 0 V are possible. For an active-low reset output,
CC
RESET
and ground pulls the
pulls the
CC
is above 1 V.
CC
V
CC
ADM6384
Figure 11. Ensuring Reset Valid to V
RESET
100k⍀
GND
CC
= 0 V
Rev. PrD | Page 8 of 10
Preliminary Technical Data ADM6384
OUTLINE DIMENSIONS
2.20
1.35
1.15
PIN 1
0.65 BSC
1.80
4 3
1
2
0.50 BSC
2.40
1.80
1.00
0.80
0.10 MAX
0.30
0.15
0.10 COPLANARITY
PACKAGE OUTLINE CORRESPONDS IN FULL TO EIAJ SC82
EXCEPT FOR WIDTH OF PIN-2 AS SHOWN
Figure 2. 4-Lead Plastic Surface Mount Package [SC70]