Precision power supply monitoring
31 reset threshold options: 1.58 V to 5.0 V
Four reset timeouts: 1 ms, 20 ms, 140 ms, and 1120 ms
Manual reset input
Reset output stage
Push-pull active-low
Guaranteed reset output valid to V
Power supply glitch immunity
Specified over the −40°C to +125°C temperature range
4-lead SC70 package
APPLICATIONS
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
GENERAL DESCRIPTION
The ADM6384 is a supervisory circuit that monitors power supply
voltage levels in microprocessor-based systems. A power-on reset
signal is generated when the supply voltage rises to a preset
threshold level. The debounced manual reset input of the
ADM6384 can be used to initiate a reset by means of an external
push button or logic signal.
The part is available in a choice of 31 reset threshold options,
from 1.58 V to 5.0 V. The minimum reset timeout periods are
1 ms, 20 ms, 140 ms, and 1120 ms.
The ADM6384 is available in a 4-lead SC70 package and typically consumes only 7 μA, making it suitable for use in low
power, portable applications.
= 1 V
CC
Circuit in 4-Lead SC70
ADM6384
FUNCTIONAL BLOCK DIAGRAMS
ADM6384
V
CC
V
REF
MR
DEBOUNCE
V
CC
ADM6384
RESETRESETMR
GNDGND
RESET
GENERATOR
Figure 1.
100kΩ
Figure 2.
V
CC
MICROPROCESSOR
RESE
GND
05305-001
05305-002
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
VCC = full operating range, TA = −40°C to +125°C, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
SUPPLY
VCC Operating Voltage Range 1 5.5 V
Supply Current 7 13 μA VCC = 5.5 V, no load
6 11 μA VCC = 3.6 V, no load
4 7 μA VCC = 2.5 V, no load1
3 6 μA VCC = 1.8 V, no load1
RESET THRESHOLD VOLTAGE
ADM6384x50x
ADM6384x49x 4.78 4.90 5.02 V
ADM6384x48x
ADM6384x47x 4.58 4.70 4.82 V
ADM6384x46x
ADM6384x45x 4.39 4.5 4.61 V
ADM6384x44x
ADM6384x43x 4.19 4.30 4.41 V
ADM6384x42x 4.1 4.2 4.31 V
ADM6384x41x 4.0 4.1 4.2 V
ADM6384x40x 3.9 4.0 4.1 V
ADM6384x39x 3.8 3.9 4.0 V
ADM6384x38x 3.71 3.8 3.9 V
ADM6384x37x 3.61 3.7 3.79 V
ADM6384x36x 3.51 3.6 3.69 V
ADM6384x35x 3.41 3.5 3.59 V
ADM6384x34x 3.32 3.4 3.49 V
ADM6384x33x 3.22 3.3 3.38 V
ADM6384x32x 3.12 3.2 3.28 V
ADM6384x31x
ADM6384x30x 2.93 3.0 3.08 V
ADM6384x29x
ADM6384x28x 2.73 2.8 2.87 V
ADM6384x27x 2.63 2.70 2.77 V
ADM6384x26x
ADM6384x25x 2.44 2.5 2.56 V
ADM6384x24x 2.34 2.4 2.46 V
ADM6384x23x
ADM6384x22x
ADM6384x17x
ADM6384x16x
RESET THRESHOLD TEMPERATURE COEFFICIENT 60 ppm/°C
VCC to Reset Delay
RESET THRESHOLD HYSTERESIS 2 × VTH mV
RESET TIMEOUT PERIOD
ADM6384xxD1 1 2 ms
ADM6384xxD2 20 40 ms
ADM6384xxD3 140 280 ms
ADM6384xxD4 1120 2240 ms
4.88 5.00 5.12 V
4.68 4.80 4.92 V
4.51 4.63 4.74 V
4.27 4.38 4.48 V
3.00 3.08 3.15 V
2.85 2.93 3.00 V
2.56 2.63 2.69 V
2.26 2.31 2.37 V
2.13 2.19 2.24 V
1.62 1.67 1.71 V
1.54 1.58 1.61 V
35 μs
falling at 10 mV/μs from VTH +
V
CC
100 mV to V
− 100 mV
TH
Rev. B | Page 3 of 12
ADM6384
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Parameter Min Typ Max Unit Test Conditions/Comments
MANUAL RESET INPUT
MR Input Threshold
VIL 0.3 × VCC V VCC < 4 V
0.8 V VCC > 4 V
VIH 0.7 × VCC V VCC < 4 V
2.4 V VCC > 4 V
MR Input Pulse Width
MR Glitch Rejection
MR Pull-Up Resistance
MR to Reset Delay
RESET OUTPUT VOLTAGE
VOL 0.3 V VCC ≥ 1.0 V, I
0.3 V VCC ≥ 2.5 V, I
0.4 V VCC ≥ 4.5 V, I
VOH 0.8 × VCC V VCC ≥ 2.5 V, I
0.8 × VCC V VCC ≥ 4.5 V, I
1
TA = 25°C only.
1 μs
100 ns
32 63 100 kV
200 ns
= 80 μA
SINK
= 1.2 mA
SINK
= 3.2 mA
SINK
SOURCE
SOURCE
= 500 μA
= 800 μA
Rev. B | Page 4 of 12
ADM6384
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ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 2.
ParameterRating
VCC −0.3 V to +6 V
RESET
Output Current (RESET)
Operating Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
θJA Thermal Impedance, SC70
Soldering Temperature
Sn/Pb 240°C, 30 sec
Pb-Free 260°C, 40 sec
−0.3 V to +6 V
20 mA
331°C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. B | Page 5 of 12
ADM6384
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
GND
ADM6384
TOP VIEW
(Not to Scal e)
2
RESET
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 GND Ground.
2
Active-Low Reset Output. This is an active-low output that is asserted whenever VCC is
RESET
below the reset threshold (V
3
Manual Reset Input. This is an active-low input that, when forced low for at least 1 μs,
MR
generates a reset. It features a 52 kV internal pull-up.
4 VCC Power Supply Voltage Being Monitored.
V
4
CC
3
MR
05305-003
). It features a push-pull output stage.
TH
Rev. B | Page 6 of 12
ADM6384
A
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TYPICAL PERFORMANCE CHARACTERISTICS
10.0
9.5
9.0
8.5
8.0
7.5
7.0
(µA)
6.5
CC
I
6.0
5.5
5.0
4.5
4.0
3.5
VCC = 5V
VCC = 3.3V
VCC = 1.5V
TEMPERATURE (°C )
120–40–20020406080100
05305-004
Figure 4. Supply Current vs. Temperature
1.20
1.15
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
NORMALIZED RESET THRESHO LD (V)
0.96
0.95
TEMPERATURE ( °C)
Figure 7. Normalized Reset Threshold vs. Temperature
0.20
VCC = 2.9V
120–400–2040201008060
05305-007
1.10
1.05
1.00
0.95
0.90
0.85
NORMALIZED RESET TI MEOUT (ms)
0.80
TEMPERATURE (° C)
Figure 5. Normalized Reset Timeout Period vs. Temperature
100
90
80
Y (µs)
70
60
50
40
30
TO RESET OUT PUT DEL
20
CC
V
10
0
TEMPERATURE ( °C)
Figure 6. V
to Reset Output Delay vs. Temperature
CC
0.15
0.10
(V)
OL
V
0.05
120–400–2040201008060
05305-005
0
I
(mA)
SINK
Figure 8. Output Voltage Low vs. I
SINK
70123456
05305-008
2.92
VCC = 2.9V
2.90
2.88
(V)
OH
V
2.86
2.84
120–400–2040201008060
05305-006
2.82
I
(mA)
SOURCE
Figure 9. Output Voltage High vs. I
SOURCE
1.000.20.40.60.8
05305-009
Rev. B | Page 7 of 12
ADM6384
R
A
T
A
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160
140
120
TION (µs)
TRANSIENT DU
CC
MAXIMUM V
100
80
60
40
20
VTH = 4.63V
VTH = 2.93V
0
Figure 10. Maximum V
Transient Duration vs. Reset Threshold Overdrive
CC
RESET OCCURS ABOVE CURVE
OVERDRIVE VOD (mV)
340
320
300
Y (ns)
280
260
240
220
TO RESET DEL
200
180
160
140
MANUAL RESE
120
100010100
05305-010
100
–40–20020406080100120
VCC = 3.3V
VCC = 5V
TEMPERATURE (° C)
05305-011
Figure 11. Manual Reset Minimum Pulse Width vs. Temperature
Rev. B | Page 8 of 12
ADM6384
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CIRCUIT DESCRIPTION
The ADM6384 provides microprocessor supply voltage supervision by controlling the microprocessor reset input. Code execution
errors are avoided during power-up, power-down, and brownout
conditions by asserting a reset signal when the supply voltage is
below a preset threshold. In addition, the ADM6384 allows
supply voltage stabilization with a fixed timeout before the reset
deasserts after the supply voltage rises above the threshold. If the
user detects a problem with the system operation, a manual reset
input is available to reset the microprocessor by means of an
external push-button, for example.
RESET OUTPUT
The ADM6384 features an active-low, push-pull reset output.
The reset signal is guaranteed to be logic low for V
The reset output is asserted when V
(V
) or when MR is driven low. Reset remains asserted for the
TH
is below the reset threshold
CC
duration of the reset active timeout period (t
above the reset threshold or after
MR
transitions from low to high.
Figure 12 illustrates the behavior of the reset outputs.
down to 1 V.
CC
) after VCC rises
RP
MANUAL RESET INPUT
The ADM6384 features a manual reset input (MR) that, when
driven low, asserts the reset output. When
low to high, reset remains asserted for the duration of the reset
active timeout period before deasserting. The
52 kΩ internal pull-up so that the input is always high when
unconnected. An external push-button switch can be connected
between
Debounce circuitry for this purpose is integrated on-chip. Noise
immunity is provided on the
transients of up to 100 ns (typical) are ignored. A 0.1 μF capacitor
between
V
RESET
V
CC
CC
1V
0V
V
CC
0V
V
TH
t
RP
Figure 12. Reset Timing Diagram
MR
transitions from
MR
MR
and ground so that the user can generate a reset.
MR
input, and fast, negative-going
MR
and ground provides additional noise immunity.
V
TH
t
input has a
RD
05305-012
Rev. B | Page 9 of 12
ADM6384
V
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APPLICATIONS INFORMATION
NEGATIVE-GOING VCC TRANSIENTS
To avoid unnecessary resets caused by fast power supply transients, the ADM6384 is equipped with glitch rejection circuitry.
The typical performance characteristic shown in Figure 10 plots
V
transient duration vs. the transient magnitude. The curves
CC
show combinations of transient magnitude and duration for which
a reset is not generated for 4.63 V and 2.93 V reset threshold
parts. For example, with the 2.93 V threshold, a transient that
goes 100 mV below the threshold and lasts 8 μs typically does not
cause a reset, but if the transient is any greater in magnitude or
duration, a reset is generated. An optional 0.1 μF bypass capacitor
mounted close to V
provides additional glitch rejection.
CC
ENSURING RESET VALID TO VCC = 0 V
Both active-low and active-high reset outputs are guaranteed to
be valid for V
resistor with push-pull configured reset outputs, valid outputs
for V
as low as 0 V are possible. For an active-low reset out-
CC
put, a resistor connected between
output low when it is unable to sink current. A large resistance
such as 100 kΩ should be used to avoid overloading the reset
output when V
as low as 1 V. However, by using an external
CC
RESET
and ground pulls the
is above 1 V.
CC
CC
ADM6384
RESET
GND
Figure 13. Ensuring Reset Valid to V
100kΩ
05305-013
CC
= 0 V
Rev. B | Page 10 of 12
ADM6384
7
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OUTLINE DIMENSIONS
2.20
1.35
1.15
PIN 1
0.65 BSC
1.00
0.80
1.80
4
1
3
2
0.50 BSC
2.40
1.80
1.10
0.80
0.40
0.10
12°
8°
0.30
0.10
0.10 MAX
0.30
0.15
0.10 COPLANARITY
*
PACKAGE OUTLINE CORRESPONDS IN FULL TO EIAJ SC82
EXCEPT FOR WIDTH OF PIN 2 AS SHOWN.
*
0.70
0.50
SEATING
PLANE
0.18
0.10
Figure 14. 4-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-4)
Dimensions shown in millimeters
ADM6384YKS x D x x -RL
GENERIC NUMBER
TEMPERATURE RANGE
Y: –40°C TO +125°C
PACKAGE CODE
KS: 4-LEAD SC70
RESET THRESHO LD NUMBER
(16 TO 50)
Figure 15. Ordering Code Structure
ORDERING QUANT ITY
RL7: 3,000 PI ECE REEL
R7: 3,000 PIECE REEL RoHS CO MPLIANT
If ordering nonstandard models, complete the ordering code shown in Figure 15 by inserting reset timeout and reset threshold suffixes. Contact sales for availability of